Texas Instruments TLV1570CPW
- Part No.:
- TLV1570CPW
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 20-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TLV1570CPW.pdf
- Description:
- IC ADC 10BIT SAR 20TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TLV1570CPW from Texas Instruments is a 10-bit, 8-channel serial analog-to-digital converter (ADC) with 1.25 MSPS throughput at 5 V and 625 KSPS at 3 V, operating from a single 2.7–5.5 V supply. It integrates an on-chip 8-input multiplexer, programmable internal reference (2.3 V or 3.8 V), SAR architecture, and SPI/QSPI-compatible 4-/5-wire serial interface. It serves in high-speed DSP-acquired sensor data acquisition for automotive and industrial control systems.
For engineers reviewing the TLV1570CPW datasheet, TLV1570CPW pinout, TLV1570CPW application, or TLV1570CPW equivalent, key selection considerations include its channel auto-scan capability, differential nonlinearity < ±1 LSB, software- and auto-power-down modes (10 µA / 300 µA), and direct glueless interfacing to TMS320 DSPs and SPI microcontrollers.
Technical Context
The TLV1570CPW implements a successive-approximation register (SAR) ADC architecture with binary-weighted capacitor array sampling, where REF– is tied to AGND and REF+ connects to the REF pin or internal reference. Conversion requires 16 SCLK cycles per sample, limiting maximum sampling frequency to fSCLK/16.
It supports two operational modes-DSP mode (5-wire: CS, SCLK, SDIN, SDOUT, FS) and microcontroller mode (4-wire, FS pulled high)-with mode detection at CS falling edge. Internal control register configuration via SDIN enables channel selection, reference mode, power-down state, and auto-scan sequence programming before each conversion cycle.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 10-bit SAR ADC - delivers 1024 discrete output codes with monotonic transfer function. |
| Throughput Rate | 1.25 MSPS at 5.5 V (20 MHz SCLK); 625 KSPS at 2.7 V (10 MHz SCLK) - defines real-time sampling bandwidth per channel. |
| DNL / INL | < ±1 LSB (typ. ±0.65 / ±0.6 LSB) - guarantees no missing codes and accurate code-edge placement across full scale. |
| Signal-to-Noise + Distortion | 57 dB (typ. 58–61 dB, external ref, 100 kHz input @ 5 V) - determines dynamic range for medium-fidelity signal digitization. |
| Power Consumption | 8 mW at 2.7 V / 40 mW at 5.5 V active; 10 µA software power-down - enables battery-sensitive or thermally constrained designs. |
| Analog Input Range | 0 V to AVDD - simplifies signal conditioning by eliminating level-shifting for rail-to-rail unipolar sensors. |
| Reference Options | Internal (2.3 V @ 3 V supply, 3.8 V @ 5 V) or external - eliminates need for external reference IC in cost-sensitive applications. |
Pinout & Package
Texas Instruments TLV1570CPW is housed in a 20-pin TSSOP (PW) package, 6.5 mm × 4.4 mm, 0.65 mm pitch, RoHS-compliant, rated for 0°C to 70°C operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CH0–CH7 | Analog input channels | Eight independent single-ended inputs selectable via MUX; support antialiasing filter insertion between MUX and ADC. |
| AIN | ADC analog input | Final analog node fed to SAR core; accepts 0 V to AVDD range; high-impedance when MUX is not routing to it. |
| MO | MUX analog output | Provides access to MUX output prior to ADC sampling - enables shared signal conditioning for all eight channels. |
| REF | Reference voltage input | Accepts external reference or floats in internal reference mode; decoupling required only in external mode. |
| CS | Chip select | Active-low enable; places device in 3-state and power-down when high; determines DSP/µC mode at falling edge. |
| SCLK | Serial clock input | Drives both data transfer and internal conversion timing; 16 edges required per conversion cycle. |
| SDIN | Serial data input | Loads 16-bit configuration register (channel, ref mode, power-down, auto-scan) - new settings take effect next cycle. |
| SDOUT | Serial data output | Shifts out 10-bit conversion result MSB-first, synchronized to SCLK; tri-stated when CS is high. |
| FS | Frame sync | Indicates start of serial frame in DSP mode; must be pulled high in µC mode to disable frame sync logic. |
| AVDD / DVDD | Analog/digital supplies | Separate 2.7–5.5 V rails with |AVDD − DVDD| < 0.5 V; require local 0.1 µF ceramic decoupling per supply pin. |
| AGND / DGND | Analog/digital grounds | Must be shorted externally under package; prevents digital noise coupling into analog measurement path. |
Key Features
| Feature | Design Value |
|---|---|
| Channel auto-scan | Configurable 8-channel sequential or subset scanning (e.g., CH0→CH7, CH1→CH3→CH5→CH7) without host intervention. |
| Glueless SPI/QSPI interface | Direct connection to TMS320 DSPs and SPI microcontrollers using only CS, SCLK, SDIN, SDOUT (and FS for DSP) - zero external logic. |
| Programmable internal reference | Selectable 2.3 V (for 3 V systems) or 3.8 V (for 5 V systems) reference - reduces BOM count and layout area vs. external reference ICs. |
| Two power-down modes | Autopower-down (300 µA, resumes in 1 SCLK) and software power-down (10 µA, resumes in 16 SCLKs) - balances wake latency vs. quiescent current. |
| Independent MUX access | MO pin exposes MUX output - allows one anti-aliasing filter or amplifier to serve all eight analog inputs, cutting component cost and board space. |
Applications
| Automotive Sensor Hub | Digital Servo Control |
|---|---|
|
Use Scenario: Monitoring multiple position, temperature, and current sensors in engine control units or ADAS domain controllers. IC Role / Device Role / Timing Role: Simultaneous multi-channel analog acquisition with deterministic 1.25 MSPS throughput and low-latency SPI readout. Use Value: Enables closed-loop feedback at ≤800 ns conversion time per channel while maintaining < ±1 LSB linearity for precise actuator positioning. |
Use Scenario: Real-time sampling of motor phase currents, encoder signals, and thermal feedback in industrial servo drives. IC Role / Device Role / Timing Role: High-speed 10-bit digitization of 8 analog inputs with auto-scan sequencing synchronized to PWM cycles. Use Value: Reduces MCU interrupt load via autonomous channel cycling and provides consistent 57 dB SINAD for accurate current loop resolution. |
| Process Control I/O Module | Image Sensor Preprocessing |
|
Use Scenario: Analog input expansion in PLC analog input cards handling 4–20 mA transmitters, RTDs, and thermocouples. IC Role / Device Role / Timing Role: Multiplexed acquisition front-end with programmable reference and low-power modes for fanless field enclosures. Use Value: Supports dual supply (2.7–5.5 V) and achieves 8 mW active power at 2.7 V - extends thermal margin in dense I/O modules. |
Use Scenario: Digitizing analog outputs from CMOS image sensors or CCDs in embedded vision systems with limited PCB area. IC Role / Device Role / Timing Role: Compact 10-bit ADC with integrated MUX and serial interface - replaces discrete MUX + ADC + SPI bridge solution. Use Value: MO pin enables shared gain/offset correction circuitry across all sensor channels, reducing analog component count by up to 8×. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 10-bit, multi-channel serial ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS7822U | 8-channel, 12-bit, 200 kSPS, SPI-only, no auto-scan, 2.7–5.25 V supply | Higher resolution but lower speed; lacks channel sequencing logic and DSP frame-sync interface | Choose for precision over speed where 12-bit accuracy outweighs 1.25 MSPS requirement and DSP integration is unnecessary. |
| MAX11131ETE+ | 8-channel, 10-bit, 1 MSPS, SPI/QSPI, internal ref, 2.7–3.6 V only | Narrower supply range; no 5 V operation; software-configurable scan order but no hardware auto-scan trigger | Prefer for 3.3 V-only systems needing lower power (5.5 mW) and smaller 16-pin TQFN, but verify 1 MSPS meets timing budget. |
Compared with ADS7822U and MAX11131ETE+, the TLV1570CPW uniquely combines 1.25 MSPS speed, hardware auto-scan, DSP frame-sync compatibility, and dual-voltage reference selection - making it optimal for high-throughput, low-latency, mixed-supply embedded DSP acquisition.
Availability
TLV1570CPW is available at Aetrix Electronics and suitable for automotive sensor hubs, digital servo control, process control I/O modules, and image sensor preprocessing requiring stable component supply and long-term industrial availability.
Supply support for TLV1570CPW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in precision data converters and industrial-grade IC design.
The TLV1570CPW belongs to TI's legacy high-speed serial ADC product line, engineered specifically for cost-sensitive, multi-channel data acquisition in DSP-centric systems requiring minimal external components and deterministic timing.
FAQ
What is the maximum sampling rate of the TLV1570CPW and what clock frequency is required?
The TLV1570CPW achieves a maximum throughput of 1.25 MSPS at 5.5 V, requiring a 20 MHz SCLK; at 2.7 V, maximum rate drops to 625 KSPS with a 10 MHz SCLK. Each conversion consumes exactly 16 SCLK cycles, so fs = fSCLK/16. The TLV1570CPW does not support oversampling or internal decimation - output data rate equals conversion rate.
Does the TLV1570CPW support true differential input channels?
No, the TLV1570CPW accepts only single-ended analog inputs on CH0–CH7 and AIN. Its architecture uses a pseudo-differential SAR core referenced to AGND (REF–), but it lacks dedicated differential input pairs or programmable input polarity. For differential signal acquisition, external instrumentation amplifiers must condition signals before routing to CHx pins.
How does the TLV1570CPW handle channel auto-scan sequencing and reset?
The TLV1570CPW implements hardware auto-scan via control bits DI10 (enable), DI9–DI7 (start channel), and DI8–DI7 (sequence pattern). A write to DI7 = 1 resets the scan counter. Sequences include full 0→7, odd-only, even-only, or reverse order - all executed autonomously without host CPU involvement after initial configuration of the TLV1570CPW.
Can the TLV1570CPW operate with separate analog and digital supply voltages?
Yes - TLV1570CPW supports independent AVDD (2.7–5.5 V) and DVDD (2.7–5.5 V) supplies, but |AVDD − DVDD| must remain below 0.5 V per datasheet specification. Both supplies require individual 0.1 µF ceramic decoupling capacitors placed adjacent to their respective pins, and AGND/DGND must be shorted externally under the package to maintain PSRR and SNR performance.
What is the purpose of the MO (MUX Output) pin on the TLV1570CPW?
The MO pin exposes the analog output of the internal 8:1 multiplexer prior to the ADC sampling capacitor. This allows designers to insert a single shared signal conditioning stage - such as an anti-aliasing filter, gain amplifier, or offset adjust circuit - between MO and AIN, serving all eight input channels and reducing component count, board area, and matching errors compared to per-channel conditioning.
TLV1570CPW Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 10
- Sampling Rate (Per Second):
- 1.25M
- Number of Inputs:
- 8
- Input Type:
- Single Ended
- Data Interface:
- SPI
- Configuration:
- MUX-ADC
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 2.7V ~ 5.5V
- Voltage - Supply, Digital:
- 2.7V ~ 5.5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 20-TSSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
TLV1570CPW FAQ
1.How can I place an order for TLV1570CPW through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV1570CPW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV1570CPW reliable?
The price and inventory of TLV1570CPW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV1570CPW is usually 5 days.
3.What payment methods are accepted for TLV1570CPW?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLV1570CPW transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLV1570CPW?
TLV1570CPW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLV1570CPW order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLV1570CPW?
For technical support, including TLV1570CPW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV1570CPW requirements.
6.How does Aetrix verify that TLV1570CPW is sourced from the original manufacturer or authorized distributors?
All TLV1570CPW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV1570CPW meets industry standards.
7.What is the process for return or replacement of TLV1570CPW?
All TLV1570CPW units undergo pre-shipment inspection (PSI). If there is an issue with TLV1570CPW, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV1570CPW part is unused and in its original packaging.
Return procedure for TLV1570CPW:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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