Texas Instruments TLV1570IDW
- Part No.:
- TLV1570IDW
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 20-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
TLV1570IDW.pdf
- Description:
- IC ADC 10BIT SAR 20SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,152
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TLV1570IDW from Texas Instruments is a 10-bit, 8-channel serial analog-to-digital converter (ADC) with 1.25 MSPS throughput at 5 V and 625 KSPS at 3 V, operating from a single 2.7–5.5 V supply. It integrates an on-chip 8-input MUX, programmable internal reference (2.3 V or 3.8 V), SAR architecture, and SPI/QSPI-compatible 4-/5-wire serial interface - used in automotive sensor acquisition and digital servo control.
For engineers reviewing the TLV1570IDW datasheet, TLV1570IDW pinout, TLV1570IDW application, or TLV1570IDW equivalent, this page delivers verified electrical specs, validated pin functions, confirmed operating modes (DSP/µC), real-world power-down behavior (10 µA software, 300 µA auto), and precise channel auto-scan sequencing logic per TI SLAS169B Rev. October 2000.
Technical Context
The TLV1570IDW implements a successive-approximation register (SAR) ADC using binary-weighted capacitor switching with REF– tied to AGND and REF+ driven by internal or external reference. Conversion requires 16 SCLK cycles per sample, limiting maximum sampling frequency to fSCLK/16.
It supports two operational modes: DSP mode (FS-driven frame sync) and microcontroller mode (FS = high), with distinct power-down recovery timing - 1 SCLK for autopower-down, 16 SCLKs for software power-down. Channel selection is controlled via a 16-bit configuration register written to SDIN, enabling channel auto-scan, internal reference selection (DI6/DI5), and power management (DI15/DI4).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 10-bit SAR ADC - delivers 1024 discrete output codes with no missing codes (DNL < ±1 LSB). |
| Throughput Rate | 1.25 MSPS at 5 V / 625 KSPS at 3 V - requires 20 MHz SCLK (5 V) or 10 MHz SCLK (3 V) for full speed. |
| Analog Input Range | 0 V to AVDD - accepts rail-to-rail input without external level-shifting circuitry. |
| Reference Options | Internal (2.3 V @ 3 V AVDD, 3.8 V @ 5 V AVDD) or external - selected via DI6 bit; REF pin unused in internal mode. |
| Power Consumption | 8 mW @ 2.7 V / 40 mW @ 5.5 V active; 10 µA software power-down; 300 µA autopower-down. |
| INL / DNL | ±0.6 LSB typical INL, ±0.65 LSB typical DNL - ensures high DC accuracy for process control and servo feedback. |
| SNR + Distortion | 57 dB min (typ. 61 dB) at 100 kHz input, 5 V, external reference - suitable for image sensor digitization and audio preprocessing. |
Pinout & Package
TLV1570IDW is housed in a 20-pin SOIC (DW) package rated for –40°C to +85°C operation. Pin functions are electrically validated per TI SLAS169B and match the top-view DW package diagram.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CH0–CH7 (Pins 1–5, 16–18) | Analog input channels | Independent MUX inputs - selectable individually or via auto-scan; MUX output accessible at MO pin for signal conditioning. |
| AIN (Pin 20) | ADC analog input | Final analog input node after MUX; accepts 0 V to AVDD range; 15 pF input capacitance. |
| MO (Pin 19) | MUX analog output | Provides buffered MUX output before ADC sampling - enables shared antialiasing filter or gain stage across all 8 channels. |
| REF (Pin 13) | Reference voltage input | Accepts external reference or left floating in internal reference mode; decoupling required only in external mode. |
| CS (Pin 12) | Chip select | Active-low enable; device enters 3-state and power-down when high; determines DSP/µC mode at falling edge. |
| FS (Pin 8) | Frame sync | Falling edge initiates serial data frame in DSP mode; must be pulled high for µC mode. |
| SCLK (Pin 9) | Serial clock | Drives both data transfer and internal conversion timing; 16 cycles per conversion. |
| SDIN (Pin 10) | Serial data input | Writes 16-bit configuration register (channel, ref, power mode); takes effect on next cycle. |
| SDOUT (Pin 11) | Serial data output | Shifts out 10-bit conversion result MSB-first; synchronized to SCLK rising edge. |
| AVDD / DVDD (Pins 15 / 6) | Analog/digital supplies | Separate 2.7–5.5 V rails; |AVDD − DVDD| < 0.5 V required; AGND and DGND shorted externally under package. |
Key Features
| Feature | Design Value |
|---|---|
| Channel auto-scan with programmable sequence | Enables continuous round-robin sampling of CH0–CH7 or custom subsets (e.g., CH1/CH3/CH5/CH7) without host CPU intervention. |
| Glueless SPI/QSPI and TMS320 DSP interface | Direct connection to TI DSPs and SPI-compatible µCs using only CS, SCLK, SDIN, SDOUT (and FS for DSP) - zero external logic required. |
| On-chip MUX with accessible MO pin | Allows insertion of one shared signal-conditioning circuit (e.g., antialiasing filter) between MUX and ADC - reduces BOM and board area. |
| Dual power-down modes | Autopower-down (300 µA, 10 ns after conversion) and software power-down (10 µA, configurable via DI15) - optimized for burst-mode sensing. |
| Programmable internal reference | Selectable 2.3 V (for 3 V systems) or 3.8 V (for 5 V systems) reference - eliminates need for external precision reference in many applications. |
Applications
| Automotive Sensor Acquisition | Digital Servo Control |
|---|---|
|
Use Scenario: Reading position, temperature, and current feedback signals from multiple sensors in engine control units or ADAS modules. IC Role / Device Role / Timing Role: 8-channel multiplexed ADC acquiring synchronized analog sensor data at up to 1.25 MSPS for real-time closed-loop control. Use Value: Single-chip solution replaces discrete MUX + ADC combinations, reducing PCB footprint and interconnect noise in harsh automotive environments. |
Use Scenario: Sampling motor phase currents, encoder signals, and thermal sensors in industrial servo drives. IC Role / Device Role / Timing Role: High-speed, low-latency ADC providing timely feedback for PWM update cycles in motion control systems. Use Value: 10-bit resolution with ±0.6 LSB INL ensures accurate torque/current regulation; software power-down minimizes idle power in standby mode. |
| Process Control Monitoring | Image Sensor Digitization |
|
Use Scenario: Monitoring pressure, flow, and chemical concentration transducers in factory automation PLC I/O modules. IC Role / Device Role / Timing Role: Simultaneous multi-sensor digitization with channel auto-scan and configurable reference for varying sensor output ranges. Use Value: Internal 2.3 V/3.8 V reference eliminates external voltage dividers; 8 mW power at 2.7 V enables battery-backed field instruments. |
Use Scenario: Converting analog outputs from CMOS/CCD image sensors in machine vision cameras or document scanners. IC Role / Device Role / Timing Role: High-SNR (57 dB) 10-bit ADC capturing fast-moving image data with minimal distortion at 1.25 MSPS. Use Value: 57 dB SINAD at 100 kHz supports >8-bit effective resolution for grayscale imaging; SPI interface simplifies FPGA or ASIC integration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-channel, 10-bit serial ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS7822U | 8-channel, 12-bit, 200 kSPS, SPI-only, no internal reference, 2.7–5.25 V supply | Higher resolution but lower speed; lacks auto-scan and internal reference - requires external ref and host-managed channel sequencing. | Choose ADS7822U when 12-bit DC accuracy outweighs throughput and configurability needs. |
| TLV2548IPW | 8-channel, 12-bit, 200 kSPS, SPI, internal 2.5 V ref, 2.7–5.5 V, 20-pin TSSOP | Same pin count and supply range, but slower (200 kSPS vs. 1.25 MSPS) and fixed 2.5 V reference - no 2.3/3.8 V option. | Choose TLV2548IPW for cost-sensitive, lower-speed applications where 12-bit resolution and simpler configuration are prioritized. |
Compared with ADS7822U and TLV2548IPW, the TLV1570IDW uniquely combines 1.25 MSPS throughput, dual-voltage internal reference, hardware auto-scan, and glueless DSP interface - making it optimal for high-speed embedded control where timing determinism and minimal host overhead are critical.
Availability
TLV1570IDW is available at Aetrix Electronics and suitable for automotive sensor acquisition, digital servo control, process monitoring, and image sensor digitization requiring stable component supply across extended temperature ranges.
Supply support for TLV1570IDW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with over 50 years of innovation in precision data converters and signal chain solutions.
The TLV1570IDW belongs to TI's legacy high-speed serial ADC product line, designed specifically for resource-constrained embedded systems needing multi-channel digitization, low-power operation, and direct interfacing to DSPs and SPI microcontrollers.
FAQ
What is the maximum sampling rate of the TLV1570IDW and what clock frequency is required?
The TLV1570IDW achieves a maximum sampling rate of 1.25 MSPS at 5 V, requiring a 20 MHz SCLK; at 3 V, its maximum rate drops to 625 KSPS with a 10 MHz SCLK. Each conversion consumes exactly 16 SCLK cycles, so fs = fSCLK/16. This fixed ratio means timing is deterministic and easily synchronized with host processors - a key advantage in real-time control loops using the TLV1570IDW.
How does the TLV1570IDW handle channel selection and auto-scan functionality?
The TLV1570IDW uses a 16-bit configuration register written via SDIN to control channel selection: DI10 enables auto-scan, while DI9–DI7 define the starting channel (if disabled) or DI8–DI7 set the sweep pattern (if enabled). Auto-scan sequences include CH0–CH7, odd/even subsets, or reverse order - all executed autonomously by the TLV1570IDW without host CPU involvement during conversion cycles.
Can the TLV1570IDW operate with a single supply, and how are AVDD and DVDD related?
Yes, the TLV1570IDW operates from a single 2.7–5.5 V source applied to both AVDD and DVDD, but TI specifies |AVDD − DVDD| < 0.5 V for reliable operation. Although separate pins exist, they are intended for independent analog/digital supply routing - not dual-voltage operation. Proper PCB layout requires shorting AGND and DGND under the TLV1570IDW package to minimize ground bounce and maintain 10-bit accuracy.
What are the power-down modes supported by the TLV1570IDW and how do they differ?
The TLV1570IDW supports two distinct power-down modes: autopower-down (enabled via DI4) automatically enters 300 µA state 10 ns after conversion completes, recovering on next FS or SCLK; software power-down (DI15 = 1) forces 10 µA state with 16-SCLK recovery latency. Both modes preserve no register state - the TLV1570IDW requires full reconfiguration after wake-up, ensuring predictable initialization in safety-critical applications.
Is the TLV1570IDW compatible with modern microcontrollers that support SPI?
Yes, the TLV1570IDW is fully SPI-compatible in 4-wire mode (CS, SCLK, SDIN, SDOUT) with FS held high, supporting standard SPI clock polarity and phase configurations. Its 16-cycle frame, MSB-first data format, and lack of mandatory dummy cycles allow seamless integration with ARM Cortex-M, PIC, and ESP32 microcontrollers - confirmed by TI's application notes and verified in production designs using the TLV1570IDW.
TLV1570IDW Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-SOIC (0.295", 7.50mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Number of Bits:
- 10
- Sampling Rate (Per Second):
- 1.25M
- Number of Inputs:
- 8
- Input Type:
- Single Ended
- Data Interface:
- SPI
- Configuration:
- MUX-ADC
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 2.7V ~ 5.5V
- Voltage - Supply, Digital:
- 2.7V ~ 5.5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 20-SOIC
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
TLV1570IDW FAQ
1.How can I place an order for TLV1570IDW through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV1570IDW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV1570IDW reliable?
The price and inventory of TLV1570IDW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV1570IDW is usually 5 days.
3.What payment methods are accepted for TLV1570IDW?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLV1570IDW transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLV1570IDW?
TLV1570IDW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLV1570IDW order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLV1570IDW?
For technical support, including TLV1570IDW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV1570IDW requirements.
6.How does Aetrix verify that TLV1570IDW is sourced from the original manufacturer or authorized distributors?
All TLV1570IDW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV1570IDW meets industry standards.
7.What is the process for return or replacement of TLV1570IDW?
All TLV1570IDW units undergo pre-shipment inspection (PSI). If there is an issue with TLV1570IDW, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV1570IDW part is unused and in its original packaging.
Return procedure for TLV1570IDW:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TLV1570IDW Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

