Texas Instruments TLV1572CDR
- Part No.:
- TLV1572CDR
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TLV1572CDR.pdf
- Description:
- IC ADC 10BIT SAR 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TLV1572CDR from Texas Instruments is a 10-bit successive-approximation analog-to-digital converter (ADC) with 1.25 MSPS throughput, single 2.7–5.5 V supply operation, auto-powerdown mode (≤10 µA), and SPI/QSPI- and TMS320 DSP-compatible serial interface in an 8-pin SOIC package. It digitizes 0–VCC analog inputs and is used in high-speed embedded data acquisition systems requiring low power and compact layout.
For engineers reviewing the TLV1572CDR datasheet, TLV1572CDR pinout, TLV1572CDR application, or TLV1572CDR equivalent, key selection criteria include its 10-bit resolution, 1.25 MSPS max sampling rate at 5 V, ≤±1 LSB INL/DNL, 59 dB SINAD at 500 kHz input, and glueless serial interface to DSPs and microcontrollers.
Technical Context
The TLV1572CDR implements a SAR architecture with inherent sample-and-hold, supporting two serial interface modes-DSP mode (4-wire: CS/SCLK/DO/FS) and µC mode (3-wire: CS/SCLK/DO, FS tied high). Mode selection is latched on CS falling edge via dual-sampled FS input.
Timing is tightly coupled to SCLK: conversion requires 10 clock cycles, reset/sampling takes 6 cycles, and full 16-bit frame transfer includes 6 leading zero bits. Auto-powerdown activates after LSB output, exiting on next SCLK rising edge (µC mode) or FS rising edge (DSP mode).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 10-bit - delivers 1024 discrete digital codes for precise amplitude quantization of analog sensor or signal chain outputs. |
| Max Throughput Rate | 1.25 MSPS at 5 V - supports real-time sampling of fast transients in servo control or HDD read channels without undersampling. |
| INL / DNL | < ±1 LSB - ensures monotonicity and absence of missing codes, critical for closed-loop feedback accuracy in process control. |
| SINAD | 59 dB at fIN = 500 kHz - enables ≥8.8 effective bits for medium-bandwidth signals like motor current sensing or image sensor digitization. |
| Supply Range | 2.7 V to 5.5 V - allows direct interfacing with 3.3 V or 5 V logic domains without level-shifting, simplifying mixed-voltage system design. |
| Power Consumption | 8 mW at 3 V / 25 mW at 5 V - enables battery-powered or thermally constrained applications such as portable test equipment or remote sensors. |
| Auto-Powerdown Current | ≤10 µA - reduces standby power by >2500× vs active mode, extending operational life in duty-cycled data loggers or wake-on-event systems. |
Pinout & Package
TLV1572CDR is housed in an 8-pin SOIC (D) package per JEDEC MS-012, with 1.27 mm pitch, 3.9 mm body width, and RoHS-compliant NiPdAu lead finish. MSL Level-1 rating supports standard reflow without dry-pack requirements.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: CS | Chip Select / Powerdown Enable | Active-low digital input controlling device enable; high state forces 3-state DO and auto-powerdown (≤10 µA). |
| 2: VREF | Reference Voltage Input | Defines full-scale analog input range (0 to VREF); accepts 2.7 V to VCC, enabling flexible scaling for ratiometric or absolute measurements. |
| 3: GND | Analog & Digital Ground | Common reference for analog input, reference, and digital I/O; requires low-impedance connection to minimize noise coupling into ADC core. |
| 4: AIN | Analog Input | Single-ended input accepting 0 to VREF range; 15 pF input capacitance and 50 µA leakage support direct connection to low-impedance sources ≤1 kΩ. |
| 5: SCLK | Serial Clock Input | Synchronizes all data transfers; supports 10 MHz (3 V) or 20 MHz (5 V); idle-low polarity with phase-1 sampling aligns with standard SPI timing. |
| 6: VCC | Power Supply | Single supply for analog and digital sections; recommended to connect to clean analog rail to preserve SNR performance. |
| 7: FS | Frame Sync Input | Mode-select control: low = DSP mode (4-wire), high = µC mode (3-wire); sampled at CS falling edge with internal dual-latch validation. |
| 8: DO | Serial Data Output | 3-state CMOS output delivering 16-bit frame (6 leading zeros + 10-bit result); high-impedance when CS is high or during powerdown. |
Key Features
| Feature | Design Value |
|---|---|
| Glueless Serial Interface | Direct connection to TMS320 DSPs and SPI/QSPI microcontrollers eliminates level shifters, buffers, or protocol translators-reducing BOM count and PCB area. |
| Inherent Sample-and-Hold | Integrated S/H circuit captures analog input at precise SCLK edges, removing need for external hold capacitor or driver op-amp in most signal conditioning paths. |
| Dual-Mode Serial Protocol | Hardware-mode selection (DSP vs µC) via FS pin enables reuse across heterogeneous platforms-e.g., same ADC on both TI C2000-based motor drives and ARM Cortex-M sensor nodes. |
| Low-Power Auto-Powerdown | Automatic entry into ≤10 µA standby between conversions eliminates software-controlled sleep sequencing, reducing firmware complexity and timing jitter in burst-sampling applications. |
| Wide Supply Voltage Range | 2.7–5.5 V operation supports legacy 5 V systems and modern 3.3 V embedded designs without external regulators or LDOs-simplifying power tree architecture. |
Applications
| Mass Storage & HDD | Automotive Sensor Interface |
|---|---|
|
Use Scenario: Digitizing read/write channel signals in hard disk drive servo positioning circuits. IC Role / Device Role / Timing Role: High-speed 10-bit ADC capturing position error signals at up to 1.25 MSPS with deterministic latency for real-time actuator correction. Use Value: 59 dB SINAD at 500 kHz ensures accurate detection of track misalignment within tight servo loop bandwidth constraints. |
Use Scenario: Converting throttle position, coolant temperature, or oxygen sensor outputs in engine control units (ECUs). IC Role / Device Role / Timing Role: Single-supply ADC interfacing directly to 3.3 V microcontrollers via SPI, operating across –40°C to 125°C ambient (with external thermal margin). Use Value: ≤±1 LSB INL guarantees linear response over full temperature range, critical for emissions compliance and fuel efficiency calibration. |
| Digital Servo Control | Contact Image Sensor Processing |
|
Use Scenario: Sampling motor current and rotor position feedback in industrial servo drives for field-oriented control (FOC). IC Role / Device Role / Timing Role: Low-latency ADC synchronized to PWM carrier frequency via SCLK, delivering 10-bit samples every 800 ns at 1.25 MSPS. Use Value: 12 MHz full-power bandwidth supports accurate reconstruction of high-frequency current harmonics for torque ripple suppression. |
Use Scenario: Digitizing analog outputs from linear CCD or CIS arrays in document scanners and barcode readers. IC Role / Device Role / Timing Role: Compact SOIC ADC with 16-bit serial frame (6 leading zeros + 10-bit data) matching CIS line-rate timing and µC DMA burst capture. Use Value: 8 mW power at 3 V enables integration into space-constrained, battery-operated handheld scanning devices. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 10-bit serial ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS7822U | 12-bit resolution, 200 kSPS max, SPI-only interface, no FS pin or DSP mode. | Better resolution but lower speed; lacks TMS320 compatibility and auto-powerdown (150 µA standby). | Select when higher precision outweighs speed and DSP integration needs-e.g., precision instrumentation over real-time control. |
| TLV2544IDW | 12-bit, 200 kSPS, 4-channel mux, SPI interface, 10 µA powerdown, wider temp range (–40°C to 125°C). | Multi-channel capability adds flexibility but increases latency per channel; slower than TLV1572CDR by 6×. | Prefer for multi-sensor monitoring where channel count > speed-e.g., HVAC controller with temperature, humidity, and pressure inputs. |
Compared with ADS7822U and TLV2544IDW, the TLV1572CDR uniquely balances 1.25 MSPS speed, DSP-native interface, and ultra-low 10 µA powerdown-making it optimal for time-critical, low-power embedded control where single-channel throughput and hardware-level protocol alignment are decisive.
Availability
TLV1572CDR is available at Aetrix Electronics and suitable for mass storage systems, automotive ECU signal conditioning, digital servo feedback loops, and contact image sensor digitization requiring stable component supply across production lifecycles.
Supply support for TLV1572CDR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in precision data converters and industrial-grade ICs.
The TLV1572CDR belongs to TI's legacy high-speed serial ADC product line, designed specifically for cost-sensitive, space-constrained embedded systems needing fast, low-power digitization with minimal external components and direct DSP/microcontroller interoperability.
FAQ
What is the maximum sampling rate of the TLV1572CDR and under what conditions?
The TLV1572CDR achieves a maximum throughput rate of 1.25 MSPS when operated at VCC = 5 V with SCLK = 20 MHz. At 3 V, the maximum rate drops to 625 kSPS due to reduced clock tolerance (10 MHz max). This rate assumes continuous conversion with back-to-back frame sync pulses in DSP mode or uninterrupted SCLK in µC mode. The TLV1572CDR does not support oversampling or decimation modes-each 16-clock cycle yields one 10-bit result.
Does the TLV1572CDR require external components for basic operation?
No, the TLV1572CDR operates autonomously with only VCC, GND, VREF, AIN, CS, SCLK, FS, and DO connections. Its integrated sample-and-hold eliminates the need for external hold capacitors or driver amplifiers in most applications. Reference bypassing (e.g., 0.1 µF ceramic near VREF) is recommended for noise reduction, but no external clock generator, level shifter, or logic glue is required-enabling true "glueless" interface to TMS320 DSPs and SPI microcontrollers.
How does the TLV1572CDR enter and exit auto-powerdown mode?
The TLV1572CDR enters auto-powerdown automatically after the LSB of a conversion frame is shifted out on DO-requiring no software command. It exits powerdown on the next SCLK rising edge in µC mode, or on the rising edge of FS in DSP mode. During powerdown, supply current drops to ≤10 µA and DO enters high-impedance state. CS high also forces immediate powerdown, while CS low initiates mode detection and prepares the interface for next conversion.
Can the TLV1572CDR interface with non-TI microcontrollers using SPI?
Yes, the TLV1572CDR supports standard SPI protocol with clock polarity = 0 (SCLK idles low) and clock phase = 1 (data sampled on falling edge, changed on rising edge). It requires only CS, SCLK, and DO lines in µC mode-FS must be tied to VCC. The 16-bit frame (6 leading zeros + 10-bit result) is compatible with common SPI peripherals; partial reads (e.g., 8-bit chunks) are supported if CS remains low and inter-chunk delay stays under 100 µs.
What is the meaning of the 'R' suffix in TLV1572CDR?
The 'R' in TLV1572CDR denotes tape-and-reel packaging: the device is supplied in a 2500-unit large reel (330 mm diameter, 12.4 mm width) with Q1 pin-1 orientation, compliant with JEDEC standards. This differs from the tube-packaged TLV1572CD (75 units/tube). Electrical, thermal, and functional specifications are identical between TLV1572CDR and TLV1572CD-the 'R' suffix indicates only packaging format and reel logistics, not performance or qualification differences.
TLV1572CDR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 10
- Sampling Rate (Per Second):
- 1.25M
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.7V ~ 5.5V
- Voltage - Supply, Digital:
- 2.7V ~ 5.5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 8-SOIC
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
TLV1572CDR FAQ
1.How can I place an order for TLV1572CDR through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV1572CDR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV1572CDR reliable?
The price and inventory of TLV1572CDR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV1572CDR is usually 5 days.
3.What payment methods are accepted for TLV1572CDR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLV1572CDR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLV1572CDR?
TLV1572CDR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLV1572CDR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLV1572CDR?
For technical support, including TLV1572CDR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV1572CDR requirements.
6.How does Aetrix verify that TLV1572CDR is sourced from the original manufacturer or authorized distributors?
All TLV1572CDR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV1572CDR meets industry standards.
7.What is the process for return or replacement of TLV1572CDR?
All TLV1572CDR units undergo pre-shipment inspection (PSI). If there is an issue with TLV1572CDR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV1572CDR part is unused and in its original packaging.
Return procedure for TLV1572CDR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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