Texas Instruments TLV2545IDGK
- Part No.:
- TLV2545IDGK
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
TLV2545IDGK.pdf
- Description:
- IC ADC 12BIT SAR 8VSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TLV2545IDGK from Texas Instruments is a 12-bit pseudo-differential serial analog-to-digital converter (ADC) operating from a single 2.7 V to 5.5 V supply, delivering up to 200 kSPS throughput with ±1 LSB INL/DNL, 72 dB SINAD at 20 kHz, and rail-to-rail analog input bandwidth of 500 kHz. It serves as a low-power data acquisition front-end in sensor signal conditioning and industrial monitoring systems.
For engineers reviewing the TLV2545IDGK datasheet, TLV2545IDGK pinout, TLV2545IDGK application, or TLV2545IDGK equivalent, key selection considerations include its MSOP-8 package, SPI/DSP-compatible 3-wire interface, autopower-down current of 2 μA (2.7 V), pseudo-differential input architecture, and −40°C to +85°C industrial temperature rating.
Technical Context
The TLV2545IDGK implements a successive approximation register (SAR) ADC architecture with charge redistribution DAC and an integrated 4 MHz conversion clock oscillator, enabling a fixed 3.5 μs conversion time independent of SCLK frequency. Its pseudo-differential input pair (AIN(+) on Pin 4, AIN(−) on Pin 5) supports ground-noise rejection with ±0.2 V common-mode ripple tolerance.
Control logic accepts chip select (CS) only - no frame sync (FS) pin - and operates exclusively in CS-triggered mode compatible with SPI microcontrollers and TMS320 DSPs using CS-as-FS configuration. The device outputs 12-bit unipolar straight binary data (MSB first) over SDO after a falling-edge CS transition, with timing validated for SCLK up to 15 MHz at 4.5 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit SAR ADC with ±1 LSB integral nonlinearity (INL) max - ensures accurate digitization of small-signal variations in precision sensor interfaces. |
| Throughput Rate | Up to 200 kSPS at VDD = 4.5 V - supports real-time sampling of fast transients in motor control feedback loops. |
| Analog Input | Pseudo-differential (AIN(+)/AIN(−)) with 500 kHz −1 dB bandwidth - rejects common-mode noise while preserving dynamic range for single-ended source interfacing. |
| Supply Current | 0.95 mA typical at 2.7 V, 1.5 mA at 5 V - enables battery-powered operation with minimal thermal impact in compact enclosures. |
| Autopower-Down | 2 μA at 2.7 V (tpowerdown ≥ 0.5 μs) - reduces idle power by >99% between conversions without external control logic. |
| Reference Interface | External VREF input (2 V to VDD) with 20–25 kΩ dynamic impedance during conversion - allows flexible scaling of full-scale range via precision external reference ICs. |
| Digital Interface | SPI/DSP-compatible 3-wire serial (CS/SCLK/SDO), MSB-first, no frame sync required - simplifies host processor integration with standard peripheral drivers. |
Pinout & Package
TLV2545IDGK is housed in an 8-pin MSOP (DGK) package measuring 3.0 mm × 3.0 mm × 1.0 mm, optimized for space-constrained PCB layouts in portable instrumentation and embedded controllers.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - CS | Chip Select input | Falling-edge active control signal that initiates sampling, enables SDO output, and resets internal state - must be held low for full 16-SCLK conversion cycle. |
| 2 - VREF | External reference voltage input | Defines full-scale analog input range (0 V to VREF); accepts 2 V to VDD; high-impedance when CS = high, ~25 kΩ when active. |
| 3 - GND | Analog/digital ground reference | Common return for all internal circuitry; requires low-inductance connection to system ground plane to maintain AC performance. |
| 4 - AIN(+) | Pseudo-differential positive input | Main analog signal input; sampled relative to AIN(−); supports rail-to-rail input swing up to VDD with 500 kHz bandwidth. |
| 5 - AIN(−) | Pseudo-differential negative input | Common-mode reference node; tolerates ±0.2 V ripple vs. GND - used for ground noise rejection in noisy industrial environments. |
| 6 - VDD | Positive supply voltage | Single 2.7 V to 5.5 V supply powering analog core, digital logic, and reference buffer; requires local 1-μF + 0.1-μF decoupling. |
| 7 - SCLK | Serial clock input | Host-provided clock (100 kHz–15 MHz) synchronizing data transfer; rising edge clocks internal logic, falling edge validates SDO output. |
| 8 - SDO | Serial data output | 3-state MSB-first 12-bit result (D11–D0), valid on first falling SCLK after CS fall; returns to Hi-Z after 16th SCLK edge. |
Key Features
| Feature | Design Value |
|---|---|
| Built-in conversion clock oscillator | 4 MHz internal oscillator eliminates need for external timing components and ensures consistent 3.5 μs conversion time across voltage/temperature. |
| Pseudo-differential input architecture | AIN(+) / AIN(−) pair enables rejection of ground bounce and shared-impedance noise without requiring differential amplifiers or matched layout. |
| Autopower-down mode | Reduces supply current to 2 μA (2.7 V) within 0.5 μs after conversion completion - ideal for duty-cycled sensor polling in energy-sensitive applications. |
| Rail-to-rail analog input | Supports full-scale input from GND to VDD with 500 kHz bandwidth - accommodates direct connection of op-amp buffers and passive sensors without level-shifting. |
| SPI/DSP serial interface | 3-wire CS/SCLK/SDO protocol with no frame sync pin required - interoperable with ARM Cortex-M, MSP430, and TMS320C2000 peripherals using standard SPI drivers. |
Applications
| Industrial Sensor Interface | Portable Data Logger |
|---|---|
|
Use Scenario: Digitizing thermocouple, RTD, or strain gauge outputs in PLC analog input modules under electrically noisy factory conditions. IC Role / Device Role / Timing Role: Pseudo-differential front-end ADC acquiring conditioned sensor signals at ≤100 kSPS with noise immunity from ground potential shifts. Use Value: AIN(−) pin absorbs ground noise up to ±0.2 V, maintaining 12-bit accuracy without additional isolation or shielding components. |
Use Scenario: Battery-powered environmental monitor capturing temperature, humidity, and light levels over extended field deployments. IC Role / Device Role / Timing Role: Low-power data acquisition engine performing periodic wake-up sampling with autopower-down between readings. Use Value: 0.95 mA operating current at 2.7 V and 2 μA deep sleep current extend coin-cell or Li-ion battery life to months per charge. |
| Motor Control Feedback | Medical Instrumentation |
|
Use Scenario: Sampling current-sense amplifier outputs in BLDC motor drives for real-time commutation and overcurrent protection. IC Role / Device Role / Timing Role: High-speed 200 kSPS ADC capturing fast current transients during PWM switching periods. Use Value: 3.5 μs conversion time and deterministic timing enable precise alignment with gate driver dead-time windows. |
Use Scenario: Analog front-end for portable ECG or pulse oximeter devices requiring clean biopotential signal digitization. IC Role / Device Role / Timing Role: Precision 12-bit ADC with ±1 LSB INL converting amplified bio-signals with minimal harmonic distortion. Use Value: 72 dB SINAD at 20 kHz and −85 dB SFDR preserve diagnostic fidelity of low-amplitude cardiac waveforms. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit pseudo-differential ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS7822U | 8-pin SOIC only; 200 kSPS; 2.7–5.25 V supply; no autopower-down; requires external clock | Lacks integrated oscillator and low-power sleep mode - less suitable for battery operation but offers simpler timing control | Select when board space permits SOIC and external clock generation is already available in system design |
| MCP3201-I/P | 8-pin PDIP/SOIC; 100 kSPS; 2.7–5.5 V; SPI-only interface; no pseudo-differential input - single-ended only | Requires external instrumentation amplifier for noise rejection; lower throughput limits high-speed control loop use | Choose for cost-sensitive, non-noisy environments where pseudo-differential capability is not required |
Compared with ADS7822U and MCP3201-I/P, TLV2545IDGK uniquely combines MSOP-8 miniaturization, built-in oscillator, autopower-down, and true pseudo-differential input - making it optimal for space- and power-constrained industrial and portable designs demanding noise resilience.
Availability
TLV2545IDGK is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable data loggers, motor control feedback systems, and medical instrumentation requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for TLV2545IDGK includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of innovation in precision data converters and low-power signal chain solutions.
The TLV2545IDGK belongs to TI's TLV254x family of low-power 12-bit SAR ADCs, designed specifically for battery-operated and noise-sensitive industrial measurement applications requiring high accuracy in miniature packages.
FAQ
What is the maximum SCLK frequency supported by TLV2545IDGK at 2.7 V supply?
The TLV2545IDGK supports up to 10 MHz SCLK at VDD = 2.7 V in CS-only mode, as specified in Table 1 of the SLAS245E datasheet. This enables minimum total conversion cycles of approximately 4.35 μs, allowing the TLV2545IDGK to achieve up to 175 kSPS throughput under these conditions while maintaining timing margin.
Does TLV2545IDGK require an external frame sync (FS) signal for operation?
No, TLV2545IDGK does not require an FS signal. Unlike the TLV2541, it uses CS-only control and has no FS pin (Pin 7 is SCLK). The TLV2545IDGK is fully functional with standard SPI microcontrollers using CS, SCLK, and SDO - eliminating the need for dedicated DSP frame sync resources.
What is the purpose of the AIN(−) pin on TLV2545IDGK?
The AIN(−) pin (Pin 5) on TLV2545IDGK serves as the pseudo-differential reference input, enabling common-mode noise rejection. It accepts up to ±0.2 V ripple relative to GND and allows the device to digitize the voltage difference between AIN(+) and AIN(−), improving accuracy in electrically noisy environments without requiring a full differential amplifier stage.
How does autopower-down work on TLV2545IDGK, and what current does it draw?
TLV2545IDGK enters autopower-down automatically at the end of each conversion. With tpowerdown ≥ 0.5 μs, it draws 2 μA at 2.7 V; with ≥2 ms inactive time, it reaches deep power-down at 1 μA. No software command or external pin control is needed - the feature is fully hardware-managed and transparent to the host interface.
Can TLV2545IDGK operate with a 3.3 V supply and 2.5 V external reference?
Yes, TLV2545IDGK supports VDD = 3.3 V and VREF = 2.5 V simultaneously, as both fall within the recommended operating conditions (VDD: 2.7–5.5 V; VREF: 2 V to VDD). This configuration yields a 0–2.5 V input range with full 12-bit resolution, commonly used with precision 2.5 V reference ICs like REF5025 in metrology-grade systems.
TLV2545IDGK Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 200k
- Number of Inputs:
- 1
- Input Type:
- Pseudo-Differential
- Data Interface:
- SPI
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.7V ~ 5.5V
- Voltage - Supply, Digital:
- 2.7V ~ 5.5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 8-VSSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
TLV2545IDGK FAQ
1.How can I place an order for TLV2545IDGK through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV2545IDGK on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV2545IDGK reliable?
The price and inventory of TLV2545IDGK are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV2545IDGK is usually 5 days.
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Once your TLV2545IDGK order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLV2545IDGK?
For technical support, including TLV2545IDGK datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV2545IDGK requirements.
6.How does Aetrix verify that TLV2545IDGK is sourced from the original manufacturer or authorized distributors?
All TLV2545IDGK products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV2545IDGK meets industry standards.
7.What is the process for return or replacement of TLV2545IDGK?
All TLV2545IDGK units undergo pre-shipment inspection (PSI). If there is an issue with TLV2545IDGK, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV2545IDGK part is unused and in its original packaging.
Return procedure for TLV2545IDGK:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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