Texas Instruments TLV2623IDGS
- Part No.:
- TLV2623IDGS
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
TLV2623IDGS.pdf
- Description:
- IC CMOS 2 CIRCUIT 10VSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:399
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TLV2623IDGS from Texas Instruments is a dual-channel, rail-to-rail output CMOS operational amplifier with shutdown, designed for low-power, wide-bandwidth signal conditioning in single-supply systems. It delivers 11 MHz gain-bandwidth, 10 V/µs slew rate, 27 nV/√Hz input voltage noise, 800 µA per channel supply current, and operates from 2.7 V to 5.5 V across –40°C to 125°C - enabling use in battery-powered data acquisition front-ends.
For engineers reviewing the TLV2623IDGS datasheet, TLV2623IDGS pinout, TLV2623IDGS application, or TLV2623IDGS equivalent, key selection criteria include its 10-pin VSSOP package with integrated shutdown control, rail-to-rail output swing, positive-rail–inclusive input common-mode range (1 V to VDD + 0.2 V), and ultralow 4 µA/channel shutdown current - critical for portable instrumentation and precision sensor interfaces.
Technical Context
The TLV2623IDGS implements a CMOS input stage with rail-to-rail output drive capability, supporting operation down to 2.7 V while maintaining 11 MHz bandwidth and 63° phase margin into 2 kΩ//10 pF loads. Its input voltage range extends to the positive supply rail, allowing direct interfacing with high-side referenced sensors and ADC reference buffers.
Shutdown functionality is controlled via dedicated SHDN pins (pins 5 and 8), each independently disabling one amplifier channel with 200 ns turnoff and 1.5–4.5 µs turnon delay. The device uses internal biasing optimized for stability under varying supply (2.7–5.5 V) and temperature (–40°C to 125°C), with PSRR of 75–90 dB and CMRR of 78–99 dB.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain-bandwidth product | 11 MHz - enables stable unity-gain buffer or gain-of-10 amplification up to ~1.1 MHz in precision signal chains |
| Slew rate | 10 V/µs - supports clean 1-Vpp output at 1.5 MHz without slewing distortion |
| Input voltage noise | 27 nV/√Hz at 10 kHz - suitable for 16-bit SAR ADC driver applications with <0.1% noise contribution |
| Supply current per channel | 800 µA - allows dual-channel operation from coin-cell or Li-ion sources with minimal quiescent drain |
| Shutdown current per channel | 4 µA - reduces total system standby power by >99% when amplifiers are inactive |
| Common-mode input range | 1 V to VDD + 0.2 V - accepts inputs at or above ground and up to 0.2 V beyond VDD, simplifying level-shifting |
| Operating temperature | –40°C to 125°C - qualified for industrial-grade embedded control and automotive cabin electronics |
Pinout & Package
TLV2623IDGS is housed in a 10-pin Very Thin Shrink Small Outline Package (VSSOP, DGS), 3.0 mm × 3.0 mm × 0.9 mm body, with exposed pad not electrically connected. Pin 1 is marked by a molded "U" shape or beveled edge.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | NC | No internal connection - must be left floating or tied to GND for mechanical stability |
| 2 | IN− (A) | Inverting input of amplifier A - high-impedance CMOS node (2 pA typical IIB) |
| 3 | IN+ (A) | Non-inverting input of amplifier A - accepts signals up to VDD + 0.2 V |
| 4 | GND | Analog ground reference - shared return for both amplifiers and shutdown logic |
| 5 | SHDN (A) | Active-low enable for amplifier A - drives output to high-impedance state when <0.4 V |
| 6 | VDD | Positive supply rail - supports 2.7 V to 5.5 V; decoupling capacitor required within 1 cm |
| 7 | OUT (A) | Rail-to-rail output of amplifier A - sources/sinks ±28 mA, swings within 200 mV of rails at 10 mA |
| 8 | SHDN (B) | Active-low enable for amplifier B - independent control from amplifier A |
| 9 | OUT (B) | Rail-to-rail output of amplifier B - electrically isolated from OUT(A); same drive strength |
| 10 | NC | No internal connection - must be left floating or tied to GND |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail output swing | Drives within 200 mV of VDD and GND at 10 mA load - preserves dynamic range in 3.3-V data converters |
| Positive-rail–inclusive input range | Accepts common-mode voltages up to VDD + 0.2 V - eliminates need for external level-shifters with high-side sensors |
| Dual independent shutdown controls | Separate SHDN pins (5 and 8) allow per-amplifier power gating - essential for time-multiplexed sensor readout |
| Low-noise, low-distortion performance | 27 nV/√Hz input noise and 0.019% THD+N at 10 kHz - meets requirements for 16-bit audio and precision measurement |
| Industrial temperature qualification | Specified over –40°C to 125°C with guaranteed parameters - suitable for under-hood and factory-floor environments |
Applications
| Portable Data Loggers | Medical Sensor Signal Conditioning |
|---|---|
Use Scenario: Battery-powered environmental monitoring unit acquiring thermocouple, RTD, and humidity sensor outputs at 1 kSPS. IC Role / Device Role / Timing Role: Dual op-amp configured as precision instrumentation amplifier front-end and reference buffer, with shutdown synchronized to ADC sampling intervals. Use Value: 800 µA/channel active current and 4 µA/channel shutdown current extend AA battery life to >2 years in sleep-dominated duty cycles. | Use Scenario: Wearable ECG patch digitizing microvolt-level cardiac signals with motion artifact rejection. IC Role / Device Role / Timing Role: First-stage differential amplifier (A) and right-leg drive buffer (B), both powered only during heartbeat detection windows. Use Value: Rail-to-rail output and 1 V to VDD+0.2 V input range enable full-swing signal capture from ±1.25 V electrode offsets without external biasing. |
| Industrial PLC Analog Input Modules | Automotive Cabin Temperature Controllers |
Use Scenario: 4–20 mA loop receiver and 0–10 V sensor interface in DIN-rail mounted programmable logic controller. IC Role / Device Role / Timing Role: Dual-channel signal conditioner: one amp for current-to-voltage conversion, second for filtering and level-shifting to MCU ADC. Use Value: 11 MHz GBW and 10 V/µs slew rate support fast transient response to step changes in process variables, meeting SIL-2 timing constraints. | Use Scenario: HVAC control module measuring NTC thermistors and driving PWM fan drivers in vehicle dashboards. IC Role / Device Role / Timing Role: Precision thermistor interface amplifier (A) and fan speed feedback comparator buffer (B), operating from 3.3 V LDO. Use Value: –40°C to 125°C rating and 75–90 dB PSRR ensure stable offset and gain across engine-off cold soak to cabin heat-soak conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel rail-to-rail op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLV2622IDGKR | Same family, 8-pin VSSOP (DGK), no NC pins; identical electrical specs but lacks pin 1 and pin 10 NC terminals | Requires PCB layout change due to different pin count and footprint; no independent SHDN per channel (shared SHDN on pin 8) | Select TLV2622IDGKR only if board space is constrained and per-amplifier shutdown is unnecessary |
| OPA2333AIDGSR | Zero-drift architecture; 0.02 µV/°C offset drift vs. TLV2623IDGS's 3 µV/°C; higher 350 µA/channel supply current; no shutdown function | Better DC accuracy for long-term sensor calibration; unsuitable for power-gated architectures requiring shutdown | Choose OPA2333AIDGSR when offset drift dominates error budget and continuous operation is acceptable |
Compared with TLV2622IDGKR, TLV2623IDGS provides true per-amplifier shutdown control and NC pins for enhanced layout flexibility; compared with OPA2333AIDGSR, it trades zero-drift precision for lower power and integrated power management - making TLV2623IDGS optimal for battery-constrained, multiplexed analog front-ends.
Availability
TLV2623IDGS is available at Aetrix Electronics and suitable for portable instrumentation, medical wearables, industrial PLC analog input modules, and automotive cabin controllers requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for TLV2623IDGS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in precision op-amps and low-power signal chain solutions.
The TLV262x family was engineered for high-speed, low-power, single-supply operation in portable and industrial sensing systems - emphasizing rail-to-rail output, wide bandwidth, and ultralow shutdown current without sacrificing AC performance.
FAQ
What is the maximum capacitive load the TLV2623IDGS can drive while maintaining stability?
The TLV2623IDGS is characterized for stability with up to 10 pF capacitive load when driving a 2 kΩ resistive load, delivering 63° phase margin per the datasheet Figure 16. For loads exceeding 10 pF, external isolation resistance (e.g., 10–100 Ω in series with the output) is required to prevent peaking or oscillation - a design constraint confirmed in the Phase Margin vs Load Capacitance plot (Figure 16) and Electrical Characteristics table.
Does the TLV2623IDGS support true rail-to-rail input operation?
No, the TLV2623IDGS does not support rail-to-rail input. Its common-mode input voltage range is specified as 1 V to VDD + 0.2 V - meaning the input cannot go below 1 V (i.e., not to GND) but does extend 0.2 V beyond VDD. This positive-rail–inclusive range is explicitly documented in the Recommended Operating Conditions table and distinguishes it from true RRI op-amps.
How does the shutdown functionality of the TLV2623IDGS behave during power-up?
During power-up, the TLV2623IDGS requires VDD to reach ≥1.5 V before the internal shutdown circuitry becomes active; below this threshold, both amplifiers remain disabled. Once powered, amplifiers A and B stay enabled until their respective SHDN pins (5 and 8) are pulled ≤0.4 V. The datasheet specifies t(off) = 200 ns and t(on) = 1.5–4.5 µs, confirming fast, predictable state transitions - verified in Figure 23 and Electrical Characteristics section.
Can the NC pins (1 and 10) on the TLV2623IDGS be connected to ground or left floating?
Per TI's official datasheet Package Pinouts diagram and Absolute Maximum Ratings note, pins 1 and 10 of the TLV2623IDGS are designated "NC - No internal connection." They may be left floating or tied to GND for mechanical reinforcement or EMI reduction; neither connection affects electrical performance. This is explicitly shown in the TLV2623 DGS PACKAGE pinout figure and confirmed in the Package Option Addendum.
What is the output current capability of the TLV2623IDGS at 3.3 V supply?
At VDD = 3.3 V, the TLV2623IDGS delivers ±28 mA short-circuit output current (IOS) and sustains ±19 mA continuous sourcing/sinking while maintaining rail-to-rail swing within 200 mV of the rails - values interpolated from the IO specification table (28 mA at 5 V, 19 mA at 2.7 V) and validated by the VOH/VOL vs output current curves (Figures 4–7) across the 2.7–5.5 V range.
TLV2623IDGS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Amplifier Type:
- CMOS
- Number of Circuits:
- 2
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 7V/µs
- Gain Bandwidth Product:
- 11 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 2 pA
- Voltage - Input Offset:
- 250 µV
- Current - Supply:
- 800µA (x2 Channels)
- Current - Output / Channel:
- 28 mA
- Voltage - Supply Span (Min):
- 2.7 V
- Voltage - Supply Span (Max):
- 5.5 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-VSSOP
TLV2623IDGS FAQ
1.How can I place an order for TLV2623IDGS through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV2623IDGS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV2623IDGS reliable?
The price and inventory of TLV2623IDGS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV2623IDGS is usually 5 days.
3.What payment methods are accepted for TLV2623IDGS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLV2623IDGS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLV2623IDGS?
TLV2623IDGS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLV2623IDGS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLV2623IDGS?
For technical support, including TLV2623IDGS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV2623IDGS requirements.
6.How does Aetrix verify that TLV2623IDGS is sourced from the original manufacturer or authorized distributors?
All TLV2623IDGS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV2623IDGS meets industry standards.
7.What is the process for return or replacement of TLV2623IDGS?
All TLV2623IDGS units undergo pre-shipment inspection (PSI). If there is an issue with TLV2623IDGS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV2623IDGS part is unused and in its original packaging.
Return procedure for TLV2623IDGS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TLV2623IDGS Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
