Texas Instruments TLV320AIC28IRGZ
- Part No.:
- TLV320AIC28IRGZ
- Manufacturer:
- Texas Instruments
- Category:
- CODECS
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
TLV320AIC28IRGZ.pdf
- Description:
- IC STEREO AUDIO CODEC LP 48-VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TLV320AIC28IRGZ from Texas Instruments is a low-power, highly integrated stereo audio DAC and mono audio ADC with 95-dB SNR playback, 48 ksps sampling, capless 16-Ω headphone drivers, 400-mW 8-Ω BTL speaker amplifier, and integrated PLL for flexible clock generation - deployed in cellular smartphones and digital camcorders.
For engineers reviewing the TLV320AIC28IRGZ datasheet, TLV320AIC28IRGZ pinout, TLV320AIC28IRGZ application, or TLV320AIC28IRGZ equivalent, key selection criteria include dual-mic AGC support (up to 59.5 dB), battery voltage monitoring up to 6 V, on-chip temperature sensing (0.3°C resolution), programmable digital audio effects (bass/treble/EQ/de-emphasis), and I²S/SPI interface compatibility with master/slave mode operation.
Technical Context
The TLV320AIC28IRGZ integrates stereo 24-bit DAC and mono 24-bit ADC with Σ-Δ architecture, supporting independent sampling rates up to 48 ksps via programmable interpolation filters and on-chip PLL. It features dual microphone inputs (handset and headset) with independent bias control and hardware AGC, plus three analog output paths: capless 16-Ω headphone drivers (SPK1/SPK2), 8-Ω differential loudspeaker driver (OUT8P/OUT8N), and 32-Ω differential earpiece driver (SPK1/OUT32N).
Digital audio interface supports I²S, left/right-justified, and DSP serial formats at 16/20/24/32-bit word lengths in master or slave mode; SPI controls register configuration including SAR ADC (8–12-bit programmable), battery monitor (±15 mV accuracy), and auxiliary input measurement. Power management enables 19-mW stereo playback at 48 ksps with 3.3-V analog supply.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Audio DAC SNR | 95 dBA typical - enables high-fidelity stereo playback into 16-Ω loads without audible noise floor interference. |
| Audio ADC SNR | 90 dBA typical - supports clean mono recording from dual mic inputs with A-weighted idle-channel noise performance. |
| Max Sampling Rate | 48 ksps - matches CD-quality audio timing and aligns with standard mobile baseband processor interfaces. |
| Headphone Output Power | 44 mW per channel into 16 Ω - sufficient for direct drive of consumer-grade earphones without external amplification. |
| Loudspeaker Output Power | 400 mW into 8 Ω differential - delivers audible volume from compact mobile speakers using direct battery supply (BVDD). |
| Battery Monitor Input Range | 0.5–6.0 V - allows direct connection to single-cell Li-ion (3.0–4.2 V) or dual-cell configurations without external scaling. |
| SAR ADC Resolution | Programmable 8/10/12-bit - provides configurable trade-off between measurement speed (up to 1 MSPS) and precision for auxiliary sensing. |
| Operating Temperature | −40°C to +85°C - qualified for use in handheld consumer devices exposed to ambient thermal cycling. |
Pinout & Package
TLV320AIC28IRGZ is housed in a 48-pin QFN package (7 mm × 7 mm, RGZ designation) with exposed thermal pad. Pin functions are validated per TI SLAS418B datasheet (May 2005 revision), including dedicated analog/digital power domains (AVDD1/AVDD2/DRVDD/BVDD/DVDD/IOVDD), dual mic bias outputs (MICBIAS_HND/MICBIAS_HED), and separate audio data paths (SDIN/SDOUT/WCLK/BCLK/MCLK).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IOVDD) | IO Supply | Supplies 1.1–3.6 V to SPI interface and digital I/O buffers; decoupling required for noise-sensitive serial communication. |
| 2 (PWR_DN) | Hardware Power Down | Active-low signal enabling full chip shutdown with <50 µA quiescent current; used for system-level power gating. |
| 3 (RESET) | Hardware Reset | Asynchronous active-low reset that clears all registers and reinitializes internal state machines to default values. |
| 25 (MIC_DETECT_IN) | Microphone Detect Input | Monitors headset insertion status via resistance threshold detection; enables automatic jack-type recognition. |
| 26 (OUT32N) | Receiver Driver Output | Negative output of 32-Ω differential earpiece driver; paired with SPK1 for low-noise telephone receiver applications. |
| 27 (SPK1) | Headset/Receiver Output | Common output node for both headset driver (16 Ω) and earpiece driver (32 Ω); requires external coupling capacitor unless VGND is used. |
| 28 (SPK2) | Headset Driver Output | Second channel of stereo 16-Ω headphone driver; supports capless operation when referenced to VGND (Pin 31). |
| 34 (BVDD) | Battery Power Supply | Direct connection to battery rail (3–4.2 V); powers loudspeaker driver and enables >400 mW output without DC-DC conversion. |
| 35 (OUT8P) | Loudspeaker Driver Output (+) | Positive terminal of 8-Ω BTL speaker amplifier; delivers high-current differential swing for portable speaker drive. |
| 36 (DRVSS2) | Driver Ground | Separate ground return for speaker/headphone drivers; isolation prevents coupling of high-current transients into sensitive analog circuits. |
| 37 (DAV) | Auxiliary Data Available | Open-drain interrupt flag signaling completion of SAR ADC conversion or auxiliary input measurement. |
| 38 (SS) | SPI Slave Select | Active-low chip select for SPI register access; must be asserted before SCLK transitions to avoid bus contention. |
| 43 (SDOUT) | Audio Data Output | Serial audio data output in I²S/DSP/LJF/RJF format; synchronized to WCLK/BCLK and configurable for left/right channel mapping. |
| 44 (SDIN) | Audio Data Input | Serial audio data input supporting same formats as SDOUT; enables full-duplex streaming between host processor and codec. |
| 45 (WCLK) | Audio Word Clock | Indicates left/right channel boundary; configured as input (slave) or output (master) depending on D11 bit in Register 06h/Page 2. |
| 46 (BCLK) | Audio Bit Clock | Bit-synchronous clock for SDIN/SDOUT; rate set to 256×WCLK (256-S mode) or 2×word-length×WCLK (continuous mode). |
| 47 (DVDD) | Digital Core Supply | 1.65–1.95 V supply for digital logic, SPI interface, and internal state machines; requires tight regulation for timing integrity. |
| 48 (DVSS) | Digital Core and IO Ground | Reference plane for DVDD and IOVDD; must be connected to PCB ground plane with low-inductance vias to minimize digital noise coupling. |
Key Features
| Feature | Design Value |
|---|---|
| Capless Headphone Output | Eliminates 2× 220-µF DC-blocking capacitors per channel by generating virtual ground (VGND) reference, reducing BOM cost and PCB area. |
| Integrated PLL | Generates precise audio clocks from wide-range MCLK inputs (e.g., 12/13/19.2/26 MHz), enabling single-crystal support across multiple sampling rates. |
| Dual-Mic Hardware AGC | Provides 0.5-dB-step gain control up to 59.5 dB per mic path without CPU intervention, maintaining consistent recording level during voice calls. |
| Auto Jack/Headset Detection | Detects 3-pole vs. 4-pole TRRS connectors and button press events (e.g., play/pause) via MIC_DETECT_IN and GPIO lines, enabling UI feedback. |
| On-Chip Temperature Sensor | Delivers 0.3°C resolution measurements over −40°C to +85°C range using internal diode; calibrated against AVDD1/AVSS1 references. |
| Programmable Digital Audio Effects | Real-time bass/treble/EQ/de-emphasis processing applied in digital domain prior to DAC, preserving analog signal chain integrity. |
Applications
| Smartphone Voice Call System | Digital Camcorder Audio Capture |
|---|---|
|
Use Scenario: Full-duplex cellular voice call with simultaneous headset mic input and earpiece/speaker output, including sidetone and button-press detection. IC Role / Device Role / Timing Role: TLV320AIC28IRGZ serves as primary audio codec handling ADC (mic), DAC (earpiece/speaker), AGC, and jack detection in real time. Use Value: Integrated 59.5-dB AGC ensures consistent voice level despite varying acoustic environments; capless headphone output reduces component count by 4× large electrolytics. |
Use Scenario: High-fidelity stereo audio recording synchronized with video capture at 48 ksps, with battery voltage monitoring during extended field operation. IC Role / Device Role / Timing Role: TLV320AIC28IRGZ acts as stereo ADC front-end and clock generator, interfacing directly with image sensor SoC via I²S master mode. Use Value: 90-dB ADC SNR enables clean audio capture under noisy conditions; BVDD input up to 6 V supports long-duration recording on dual-cell batteries. |
| MP3 Player Playback System | PDA Audio Interface |
|
Use Scenario: Portable music playback through headphones and built-in speaker, with EQ customization, battery gauge, and temperature-aware thermal throttling. IC Role / Device Role / Timing Role: TLV320AIC28IRGZ functions as DAC, headphone/speaker driver, SAR ADC (battery/temp), and digital audio processor in standalone audio subsystem. Use Value: 95-dB DAC SNR delivers audiophile-grade playback; programmable EQ allows user-tuned sound profiles without host CPU load. |
Use Scenario: Audio I/O for enterprise PDA with voice memo, speakerphone, and accessory detection (e.g., cradle docking, headset insertion). IC Role / Device Role / Timing Role: TLV320AIC28IRGZ provides mono recording, stereo playback, GPIO-based peripheral detection, and SPI-configurable register map for firmware flexibility. Use Value: Dual mic inputs support noise-canceling algorithms; GPIO1/GPIO2 enable custom accessory identification without additional ICs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar audio codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLV320AIC3104IRGZR | Lower power (12 mW playback), no loudspeaker driver, 32-QFN package, enhanced jack detection algorithm. | Targeted at ultra-portable devices where speaker output is handled externally; lacks 400-mW BTL driver and BVDD direct battery interface. | Select when system uses external Class-D amplifier and prioritizes lowest possible active power draw over integrated speaker drive. |
| WM8960GEFL/V | Higher SNR (98 dB DAC), integrated Class-D speaker amp (500 mW), but no battery monitor or temperature sensor; 32-QFN package. | Optimized for premium audio quality and speaker output; omits auxiliary measurement functions critical for battery-powered system health monitoring. | Choose when maximum audio fidelity and speaker output power are primary, and battery/temperature sensing is implemented elsewhere. |
Compared with TLV320AIC28IRGZ, TLV320AIC3104IRGZR trades integrated speaker drive and battery monitoring for lower power and smaller footprint, while WM8960GEFL/V emphasizes audio performance and speaker output at the expense of embedded system monitoring capability.
Availability
TLV320AIC28IRGZ is available at Aetrix Electronics and suitable for smartphone voice call systems, digital camcorder audio capture, and MP3 player playback requiring stable component supply, long-term lifecycle support, and traceable sourcing for industrial and consumer OEM programs.
Supply support for TLV320AIC28IRGZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and consumer markets.
The TLV320AIC28IRGZ belongs to TI's low-power audio codec product line, designed specifically for portable multimedia devices requiring integrated analog I/O, intelligent power management, and system-level monitoring functions.
FAQ
What is the maximum sampling rate supported by the TLV320AIC28IRGZ?
The TLV320AIC28IRGZ supports a maximum sampling rate of 48 ksps for both its stereo DAC and mono ADC. This rate is fully compliant with CD-quality audio standards and aligns with common mobile baseband processor interfaces. The device also supports lower standard rates including 8, 11.025, 12, 16, 22.05, 24, 32, and 44.1 kHz via programmable interpolation filters, with independent rate configuration for ADC and DAC paths.
Does the TLV320AIC28IRGZ support capless headphone output?
Yes, the TLV320AIC28IRGZ supports capless headphone output using its integrated virtual ground (VGND) pin (Pin 31). When enabled, VGND provides a stable 1.5-V reference that allows direct coupling of SPK1 and SPK2 outputs to 16-Ω headphones without external DC-blocking capacitors - reducing BOM cost, PCB area, and low-frequency distortion associated with large electrolytic capacitors.
How does the TLV320AIC28IRGZ handle battery voltage monitoring?
The TLV320AIC28IRGZ includes a dedicated battery monitor input (VBAT, Pin 15) capable of measuring voltages from 0.5 V to 6.0 V with ±15 mV accuracy after system calibration. It uses the internal 12-bit SAR ADC and programmable gain to digitize battery voltage without external resistive dividers, enabling accurate state-of-charge estimation in single- or dual-cell Li-ion systems powered directly from BVDD.
Can the TLV320AIC28IRGZ operate in I²S master mode?
Yes, the TLV320AIC28IRGZ can operate in I²S master mode by setting bit D11 in Register 06h (Page 2). In this configuration, the device generates WCLK and BCLK signals on Pins 45 and 46 respectively, synchronizing audio data transfer with the host processor. Master mode is commonly used when the host lacks a dedicated audio clock source or requires precise timing control over the codec's sampling engine.
What thermal management provisions exist for the TLV320AIC28IRGZ loudspeaker driver?
The TLV320AIC28IRGZ loudspeaker driver (OUT8P/OUT8N) requires thermal design attention at high output power: when driving 400 mW into 8 Ω at ambient temperatures above 80°C, TI recommends using multiple vias to connect the QFN thermal pad to an internal PCB ground plane. This improves heat dissipation and maintains junction temperature below the 105°C maximum, ensuring reliable operation during sustained audio playback.
TLV320AIC28IRGZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Bulk
- Product Status:
- Active
- Type:
- Stereo Audio
- Data Interface:
- Serial
- Resolution (Bits):
- 24 b
- Number of ADCs / DACs:
- 1 / 2
- Sigma Delta:
- Yes
- S/N Ratio, ADCs / DACs (db) Typ:
- 90 / 95
- Dynamic Range, ADCs / DACs (db) Typ:
- -
- Voltage - Supply, Analog:
- 3V ~ 3.6V
- Voltage - Supply, Digital:
- 1.65V ~ 1.95V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-VQFN (7x7)
TLV320AIC28IRGZ FAQ
1.How can I place an order for TLV320AIC28IRGZ through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV320AIC28IRGZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV320AIC28IRGZ reliable?
The price and inventory of TLV320AIC28IRGZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV320AIC28IRGZ is usually 5 days.
3.What payment methods are accepted for TLV320AIC28IRGZ?
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TLV320AIC28IRGZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLV320AIC28IRGZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLV320AIC28IRGZ?
For technical support, including TLV320AIC28IRGZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV320AIC28IRGZ requirements.
6.How does Aetrix verify that TLV320AIC28IRGZ is sourced from the original manufacturer or authorized distributors?
All TLV320AIC28IRGZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV320AIC28IRGZ meets industry standards.
7.What is the process for return or replacement of TLV320AIC28IRGZ?
All TLV320AIC28IRGZ units undergo pre-shipment inspection (PSI). If there is an issue with TLV320AIC28IRGZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV320AIC28IRGZ part is unused and in its original packaging.
Return procedure for TLV320AIC28IRGZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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