Texas Instruments TLV320AIC29IRGZT
- Part No.:
- TLV320AIC29IRGZT
- Manufacturer:
- Texas Instruments
- Category:
- CODECS
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
TLV320AIC29IRGZT.pdf
- Description:
- IC STEREO AUDIO CODEC 48-VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TLV320AIC29IRGZT from Texas Instruments is a low-power, high-performance stereo audio DAC and mono audio ADC codec with 95-dB SNR playback, 48-ksps sampling, 400-mW 8-Ω BTL speaker driver, capless 16-Ω headphone amplifier, and integrated 12-bit SAR ADC for battery/temperature monitoring. It serves as the central audio interface in portable voice-enabled devices requiring simultaneous analog input conditioning, digital signal processing, and multi-load output drive.
For engineers reviewing the TLV320AIC29IRGZT datasheet, TLV320AIC29IRGZT pinout, TLV320AIC29IRGZT application, or TLV320AIC29IRGZT equivalent, key selection criteria include its dual-microphone AGC with 59.5-dB gain range, differential cellular interface (CP_IN/CP_OUT), programmable digital EQ/de-emphasis, hardware jack/button detection, and QFN-48 package with thermal pad for handheld thermal management.
Technical Context
The TLV320AIC29IRGZT integrates a sigma-delta stereo DAC and mono ADC with independent programmable bias, preamp, and hardware AGC per microphone path (MICIN_HED/MICIN_HND). Its audio data path supports I2S, DSP, left/right-justified formats at 16/20/24/32-bit word lengths in master or slave mode, synchronized via an on-chip PLL driven by MCLK.
It embeds a 12-bit SAR ADC with selectable resolution (8/10/12-bit), ±5 LSB INL, 30 µVrms noise, and dedicated inputs for VBAT (0–6 V), AUX1/AUX2, and on-die temperature sensing (0.3°C resolution). Power management includes hardware PWR_DN, register-controlled power-down states, and supply-specific quiescent currents-e.g., 19 mW at 48 ksps playback with 3.3-V AVDD1.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Audio Performance | 95-dB SNR (A-weighted) stereo DAC playback; 90-dB SNR mono ADC recording at 48 ksps |
| Sampling Rate | Up to 48 ksps (confirmed max supported rate per datasheet; 53 ksps cited as theoretical limit but not characterized) |
| Output Drivers | 400-mW 8-Ω BTL speaker driver; capless 16-Ω stereo headphone amplifier; 32-Ω differential earpiece driver |
| Microphone Interface | Dual-input (handset/headset) with independent 0–59.5-dB hardware AGC in 0.5-dB steps and programmable bias (2.0/2.5/3.3 V) |
| SAR ADC | 12-bit resolution, ±5 LSB integral linearity, 30 µVrms noise, 0.5–6.0 V input range for VBAT monitoring |
| Digital Interface | SPI control + I2S/DSP/LJF/RJF audio serial interface; master/slave configurable; 256× or continuous BCLK modes |
| Power Supply | AVDD1/AVDD2/DRVDD = 3.0–3.6 V; BVDD = 3.0–4.2 V; DVDD = 1.65–1.95 V; IOVDD = 1.1–3.6 V |
Pinout & Package
TLV320AIC29IRGZT is housed in a thermally enhanced 48-pin QFN package (7 mm × 7 mm, RGZ designation) with exposed thermal pad. Pin functions are validated per TI SLAS494B datasheet Figure 1 and Terminal Functions table.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IOVDD) | IO supply rail | Supplies voltage (1.1–3.6 V) for SPI interface and digital I/O buffers; decoupling critical for timing integrity |
| 2 (PWR_DN) | Hardware power-down enable | Active-low signal forcing full analog/digital shutdown; draws only 1 µA in hardware power-down state |
| 3 (RESET) | Hardware reset input | Asynchronous active-low reset clearing all registers and disabling all analog blocks until reinitialized via SPI |
| 25 (MIC_DETECT_IN) | Headset detection sense input | Monitors headset insertion via resistive divider; enables automatic detection of 3-pole vs 4-pole jack and button press events |
| 26 (OUT32N) | Differential earpiece output (inverted) | Paired with SPK1 (OUT32P) to drive 32-Ω differential loads (e.g., cellular earpieces) with 82-mW max output |
| 27 (SPK1) | Differential earpiece output (non-inverted) | Non-inverted output terminal for 32-Ω receiver driver; supports CP_IN-to-SPK1 path with 101-dBA SNR |
| 29 (DRVDD) | Headphone driver supply | 3.0–3.6 V supply dedicated to headphone amplifier; separate from AVDD1/2 to isolate noise from DAC/ADC paths |
| 34 (BVDD) | Battery supply input | Accepts 3–4.2 V direct battery connection; powers loudspeaker driver and enables battery voltage measurement up to 6 V |
| 43 (SDOUT) | Audio data output | Serial audio output supporting I2S/DSP/LJF/RJF formats; MSB-first, 16/20/24/32-bit programmable word length |
| 44 (SDIN) | Audio data input | Serial audio input synchronized to BCLK/WCLK; used for ADC data transfer to host processor |
| 47 (DVDD) | Digital core supply | 1.65–1.95 V supply for digital logic, SPI controller, and register file; must be stable to prevent register corruption |
| 48 (DVSS) | Digital ground | Common return for DVDD and IOVDD; requires low-impedance PCB connection to thermal pad and analog grounds |
Key Features
| Feature | Design Value |
|---|---|
| Capless headphone output | Eliminates 2× 220-µF DC-blocking capacitors per channel, reducing BOM cost and PCB area in space-constrained handsets |
| Integrated PLL for clock generation | Derives precise audio clocks (e.g., 48 kHz WCLK) from flexible MCLK inputs (1–50 MHz), removing need for external crystal oscillator |
| Hardware jack/button detection | Autonomously identifies 3-pole/4-pole headset insertion, detects button press timing, and reports status via GPIO/registers-no host CPU polling required |
| Direct battery measurement | Measures battery voltage up to 6 V with ±15 mV accuracy post-calibration, enabling accurate fuel gauging without external ADC |
| Programmable digital audio effects | Real-time bass/treble/EQ/de-emphasis processing applied in digital domain before DAC conversion-no additional DSP resource needed |
| Differential cellular interface | CP_INP/CP_INN and CP_OUTP/CP_OUTN pins provide fully differential mic-in and speaker-out paths compliant with cellular baseband module requirements |
Applications
| Smartphone Voice Call Path | Portable Media Player Playback |
|---|---|
|
Use Scenario: Full-duplex cellular call with headset, including sidetone, noise suppression, and battery-aware power scaling. IC Role / Device Role / Timing Role: Audio codec handling simultaneous ADC (mic) and DAC (speaker/earpiece) paths with hardware AGC, PLL-synchronized 48-ksps sampling, and low-latency SPI register access. Use Value: 95-dB DAC SNR ensures clear playback; 59.5-dB AGC range adapts to varying acoustic environments; capless output saves board space in ultra-thin form factors. |
Use Scenario: High-fidelity stereo music playback from flash storage through 16-Ω headphones with bass enhancement and battery-level display. IC Role / Device Role / Timing Role: Stereo DAC with programmable EQ, 12-bit SAR ADC measuring VBAT and temperature, and I2S interface to media processor. Use Value: 95-dB SNR delivers studio-grade audio fidelity; 19-mW playback power extends battery life; integrated VBAT monitor enables real-time battery % display. |
| Digital Camcorder Audio Capture | Smart PDA Voice Recording |
|
Use Scenario: Stereo ambient audio capture during video recording, with automatic gain adjustment and wind-noise reduction. IC Role / Device Role / Timing Role: Mono ADC with dual-mic inputs (MICIN_HED/HND), hardware AGC, and digital sidetone mixing for monitoring. Use Value: 90-dB ADC SNR preserves dynamic range; differential mic inputs reject common-mode noise; 48-ksps sampling captures full audio bandwidth for HD video sync. |
Use Scenario: Voice memo recording using built-in microphone, with automatic level control and low-power standby between recordings. IC Role / Device Role / Timing Role: Mono ADC with programmable 8/10/12-bit SAR resolution, GPIO-triggered wake-up, and hardware PWR_DN for sub-1-µA deep sleep. Use Value: 12-bit SAR ADC provides sufficient resolution for voice clarity; 50-µA auto-temperature measurement enables thermal throttling; GPIO2 supports push-to-record UX. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar audio codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLV320AIC3106IRGZT | Newer TI codec with 100-dB DAC SNR, integrated Class-D speaker amp, and lower 12-mW playback power; uses same QFN-48 RGZ package but different pinout (e.g., no CP_IN/CP_OUT) | Targets next-gen smartphones needing higher SNR and Class-D efficiency; lacks differential cellular interface required for legacy baseband modules | Select TLV320AIC3106IRGZT when upgrading SNR and power efficiency is prioritized over backward compatibility with CP_IN/CP_OUT cellular signaling |
| AK4642EN | Asahi Kasei codec with 94-dB DAC SNR, 48-ksps max, 32-Ω earpiece driver, but no integrated SAR ADC or battery monitor; uses 40-pin QFN vs 48-pin | Used in MP3 players and DSCs where auxiliary measurement is handled externally; lacks hardware jack detection and VBAT input | Select AK4642EN when system already includes a separate battery monitor IC and does not require autonomous headset/button detection logic |
Compared with TLV320AIC29IRGZT, TLV320AIC3106IRGZT offers higher SNR and lower power but sacrifices differential cellular interface compatibility, while AK4642EN reduces integration (no SAR ADC/VBAT) but simplifies layout with fewer pins-making TLV320AIC29IRGZT optimal for cost-sensitive, cellular-legacy designs requiring full analog subsystem integration.
Availability
TLV320AIC29IRGZT is available at Aetrix Electronics and suitable for smartphone voice subsystems, portable media player audio stages, digital camcorder capture chains, and smart PDA voice interfaces requiring stable component supply across extended production lifecycles.
Supply support for TLV320AIC29IRGZT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and consumer applications.
The TLV320AIC29IRGZT belongs to TI's low-power audio codec product line, designed specifically for portable voice-enabled devices requiring integrated analog front-end, multi-load drivers, and intelligent power/peripheral management in minimal footprint.
FAQ
What is the maximum supported audio sampling rate for TLV320AIC29IRGZT?
The TLV320AIC29IRGZT supports audio sampling rates up to 48 ksps, as confirmed by electrical characteristics tables, timing diagrams, and application notes in the official datasheet (SLAS494B). While the functional description mentions a theoretical 53-ksps capability, all characterized performance metrics-including SNR, THD, and filter response-are specified strictly at 48 ksps, making it the validated maximum operational rate for production designs using TLV320AIC29IRGZT.
Does TLV320AIC29IRGZT support capless headphone output?
Yes, TLV320AIC29IRGZT supports capless (DC-coupled) stereo headphone output via its SPK1/SPK2 drivers. This is explicitly stated in the Features section and verified in the Electrical Characteristics table, which specifies "capless as well as ac-coupled output configurations" for the 16-Ω headphone drivers. The device generates a virtual ground (VGND/CP_OUTN) to serve as the reference for capless operation, eliminating the need for large DC-blocking capacitors in TLV320AIC29IRGZT-based designs.
What interfaces does TLV320AIC29IRGZT use for control and audio data transfer?
TLV320AIC29IRGZT uses SPI for register-level control (via MOSI/MISO/SCLK/SS pins) and a separate configurable audio serial interface (SDIN/SDOUT/BCLK/WCLK) for PCM data transfer. The audio interface supports I2S, DSP, left-justified, and right-justified formats at 16/20/24/32-bit word lengths and operates in master or slave mode-configurable via register 06h, page 2. Both interfaces are electrically validated per TI SLAS494B timing specifications for TLV320AIC29IRGZT.
Can TLV320AIC29IRGZT measure battery voltage directly?
Yes, TLV320AIC29IRGZT includes a dedicated VBAT pin (Pin 15) that accepts input voltages from 0.5 V to 6.0 V and digitizes them using its integrated 12-bit SAR ADC. The datasheet specifies ±15 mV accuracy after system calibration at room temperature, and the measurement is usable for battery fuel gauging without external components. This function is enabled independently of audio paths and consumes only 58 µA quiescent current from AVDD1 when active.
What is the thermal pad connection requirement for TLV320AIC29IRGZT?
The TLV320AIC29IRGZT QFN package includes an exposed thermal pad that must be soldered to a PCB copper plane for reliable thermal dissipation. Per SLAS494B Section 4, when driving high power to an 8-Ω load at ambient temperatures above 80°C, multiple vias should connect the thermal pad to an internal ground plane. The datasheet specifies θJA = 27°C/W with proper thermal pad soldering-failure to implement this compromises thermal performance and risks junction temperature exceeding 105°C in TLV320AIC29IRGZT applications.
TLV320AIC29IRGZT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Stereo Audio
- Data Interface:
- Serial
- Resolution (Bits):
- 24 b
- Number of ADCs / DACs:
- 1 / 2
- Sigma Delta:
- Yes
- S/N Ratio, ADCs / DACs (db) Typ:
- 90 / 95
- Dynamic Range, ADCs / DACs (db) Typ:
- -
- Voltage - Supply, Analog:
- 3V ~ 3.6V
- Voltage - Supply, Digital:
- 1.65V ~ 1.95V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-VQFN (7x7)
TLV320AIC29IRGZT FAQ
1.How can I place an order for TLV320AIC29IRGZT through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV320AIC29IRGZT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV320AIC29IRGZT reliable?
The price and inventory of TLV320AIC29IRGZT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV320AIC29IRGZT is usually 5 days.
3.What payment methods are accepted for TLV320AIC29IRGZT?
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4.How is shipping managed for TLV320AIC29IRGZT?
TLV320AIC29IRGZT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLV320AIC29IRGZT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLV320AIC29IRGZT?
For technical support, including TLV320AIC29IRGZT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV320AIC29IRGZT requirements.
6.How does Aetrix verify that TLV320AIC29IRGZT is sourced from the original manufacturer or authorized distributors?
All TLV320AIC29IRGZT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV320AIC29IRGZT meets industry standards.
7.What is the process for return or replacement of TLV320AIC29IRGZT?
All TLV320AIC29IRGZT units undergo pre-shipment inspection (PSI). If there is an issue with TLV320AIC29IRGZT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV320AIC29IRGZT part is unused and in its original packaging.
Return procedure for TLV320AIC29IRGZT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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