Texas Instruments TLV320AIC29IRGZTG4
- Part No.:
- TLV320AIC29IRGZTG4
- Manufacturer:
- Texas Instruments
- Category:
- CODECS
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
TLV320AIC29IRGZTG4.pdf
- Description:
- IC STEREO AUDIO CODEC 48-VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TLV320AIC29IRGZTG4 from Texas Instruments is a low-power, high-performance stereo audio DAC and mono audio ADC with 95-dB SNR playback, 48-ksps sampling, integrated 400-mW BTL speaker driver, capless 16-Ω headphone amplifier, and on-chip SAR ADC for battery/temperature monitoring. It serves as a full-featured audio codec in portable voice-enabled devices requiring simultaneous analog I/O, jack detection, and power-efficient signal processing.
For engineers reviewing the TLV320AIC29IRGZTG4 datasheet, TLV320AIC29IRGZTG4 pinout, TLV320AIC29IRGZTG4 application, or TLV320AIC29IRGZTG4 equivalent, key selection criteria include its dual-microphone AGC support (up to 59.5 dB), differential cellular interface (CP_INP/CP_OUTP), programmable digital audio effects (bass/treble/EQ/de-emphasis), and QFN-48 package thermal performance under 3.3-V analog supply.
Technical Context
The TLV320AIC29IRGZTG4 integrates Σ-Δ ADC and DAC cores with independent programmable sample-rate control (8–48 ksps), configurable I²S/DSP/LJF/RJF serial interfaces, and an on-chip PLL supporting flexible MCLK-to-audio-clock synthesis. Its analog front end includes two microphone input paths-handset (MICIN_HND) and headset (MICIN_HED)-each with dedicated bias (2.0/2.5/3.3 V), preamp, and hardware AGC.
Digital audio processing includes sidetone generation, programmable bass/treble/midrange/EQ/de-emphasis, and automatic jack insertion/button press detection. The device supports capless headphone output via virtual ground (VGND/CP_OUTN) and delivers 400 mW into 8 Ω with 99-dB SNR, while maintaining 19-mW stereo playback at 48 ksps with 3.3-V AVDD1.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Audio Performance | 95-dB SNR stereo DAC playback; 90-dB SNR mono ADC recording at 48 ksps - enables high-fidelity voice capture and media playback in space-constrained handhelds |
| Sampling Rate | Up to 48 ksps (ADC & DAC); supports 8/11.025/12/16/22.05/24/32/44.1/48 kHz - matches standard audio protocols without external clock synthesis |
| Output Drivers | 400-mW BTL speaker driver (8 Ω); 44-mW per-channel capless headphone driver (16 Ω); 32-Ω differential earpiece driver - eliminates need for DC-blocking capacitors and supports direct battery connection (BVDD up to 4.2 V) |
| Microphone Interface | Dual independent inputs: MICIN_HND (handset) and MICIN_HED (headset), each with programmable bias (2.0/2.5/3.3 V) and hardware AGC (0–59.5 dB in 0.5-dB steps) - enables robust noise-adaptive voice capture in mixed acoustic environments |
| Integrated Measurement | 12-bit SAR ADC with ±15-mV battery monitor accuracy (0.5–6 V range); 0.3°C-resolution temperature sensor; AUX1/AUX2 auxiliary inputs - provides system-level health monitoring without external components |
| Digital Interface | SPI (MOSI/MISO/SCLK/SS) + I²S/DSP/LJF/RJF audio serial bus (SDIN/SDOUT/BCLK/WCLK/MCLK); master/slave mode selectable - simplifies host processor integration across ARM, DSP, and microcontroller platforms |
| Power Consumption | 19 mW stereo playback (48 ksps, 3.3-V AVDD1); 50 µA hardware power-down with headset detection active - extends battery life in always-on audio sensing applications |
Pinout & Package
TLV320AIC29IRGZTG4 is housed in a thermally enhanced 48-pin QFN package (7 mm × 7 mm, RGZ designation) with exposed thermal pad. Pin functions are validated per TI SLAS494B datasheet (Rev. October 2007), including dedicated analog/digital power domains (AVDD1/AVDD2/DRVDD/BVDD/DVDD/IOVDD), dual ground planes (AVSS1/AVSS2/DRVSS1/DRVSS2/DVSS), and functional grouping for audio I/O, control, and measurement.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (IOVDD) | IO supply voltage | Supplies 1.1–3.6 V to SPI interface and digital I/O buffers - decoupling required for stable register access and timing compliance |
| 2 (PWR_DN) | Hardware power-down control | Active-low signal enabling ultra-low-power state (50 µA) while retaining jack/button detection - critical for standby-mode voice trigger systems |
| 25 (MIC_DETECT_IN) | Microphone detect input | Monitors headset insertion via resistance threshold; used with GPIO1/GPIO2 for 3-pole/4-pole jack identification - enables automatic audio path reconfiguration |
| 26 (OUT32N) | 32-Ω receiver driver output (inverted) | Differential output paired with SPK1 for earpiece drive; supports 82-mW output into 32 Ω - meets cellular handset acoustic requirements |
| 29 (DRVDD) | Headphone driver power supply | 3.0–3.6 V supply for capless headphone amplifiers; must be separated from BVDD to avoid coupling noise into audio outputs |
| 34 (BVDD) | Battery power supply | Direct connection to Li-ion battery (3.0–4.2 V); powers loudspeaker driver and internal regulators - enables efficient single-supply architecture |
| 42 (MCLK) | Master clock input | Accepts 12–100 MHz crystal or oscillator input; feeds PLL for generating WCLK/BCLK - determines maximum supported sampling rate and jitter performance |
| 44 (SDIN) | Audio data input | I²S/DSP/LJF/RJF serial data input (MSB-first, 16/20/24/32-bit); synchronized to BCLK/WCLK - receives PCM from baseband or application processor |
Key Features
| Feature | Design Value |
|---|---|
| Capless headphone output | Eliminates 2× 220-µF DC-blocking capacitors per channel by using VGND/CP_OUTN virtual ground - reduces BOM cost and PCB area in slim form factors |
| Dual-microphone AGC with bias control | Independent 0–59.5-dB gain adjustment (0.5-dB steps) and programmable 2.0/2.5/3.3-V bias per MICIN_HND/MICIN_HED - ensures consistent SNR across varying headset impedances and ambient noise |
| Differential cellular interface | CP_INP/CP_INN and CP_OUTP/CP_OUTN pins support direct connection to RF module baseband - avoids level-shifting and preserves THD+N below −75 dB in handset mode |
| Programmable digital audio effects | Real-time bass/treble/midrange/EQ/de-emphasis processing in digital domain - enables OEM-specific sound tuning without external DSP or firmware overhead |
| Auto-detection of jack, headset type, and button press | On-chip state machine identifies 3-pole vs. 4-pole jacks and detects mechanical button closures via MIC_DETECT_IN and GPIO lines - removes need for external detection ICs |
| Integrated battery/temperature monitoring | 12-bit SAR ADC measures VBAT (0.5–6 V, ±15 mV accuracy) and die temperature (0.3°C resolution) using internal reference - replaces discrete fuel gauges and thermal sensors |
Applications
| Smartphone Voice Subsystem | Portable Media Player Audio Hub |
|---|---|
Use Scenario: Dual-microphone noise suppression during VoIP calls with simultaneous headset and handset operation. IC Role / Device Role / Timing Role: TLV320AIC29IRGZTG4 acts as primary audio codec, managing independent AGC paths for MICIN_HND and MICIN_HED while routing processed audio to baseband via CP_OUTP/CP_OUTN. Use Value: Hardware AGC and differential cellular interface deliver >25 dB noise rejection at 1020 Hz without host CPU intervention, reducing call drop rates in moving vehicles. | Use Scenario: High-SNR music playback with capless headphone output and programmable EQ for user-customized sound profiles. IC Role / Device Role / Timing Role: TLV320AIC29IRGZTG4 serves as stereo DAC and headphone driver, using VGND/CP_OUTN to eliminate coupling caps and applying real-time treble/bass boost via register-programmed digital filters. Use Value: 95-dB SNR and 44-mW/channel output enable lossless 24-bit/48-kHz playback into 16-Ω headphones, extending battery runtime by 12% versus capacitor-coupled alternatives. |
| Digital Camcorder Audio Capture | Industrial Handheld Recorder |
Use Scenario: Stereo line-in recording with automatic gain control and battery voltage telemetry during extended field operation. IC Role / Device Role / Timing Role: TLV320AIC29IRGZTG4 operates as mono ADC with AUX1/AUX2 auxiliary inputs, using SAR ADC to log VBAT every 5.59 minutes while recording at 48 ksps. Use Value: Integrated 12-bit battery monitor (±15 mV accuracy) and 90-dB SNR ADC eliminate external ADC and fuel gauge, reducing component count by 3 and PCB area by 18 mm². | Use Scenario: Ruggedized voice logger with push-to-talk button detection, temperature compensation, and low-power standby. IC Role / Device Role / Timing Role: TLV320AIC29IRGZTG4 performs headset detection, button press recognition, and on-die temperature measurement while consuming only 70 µA in mixed detection/monitoring mode. Use Value: Hardware-based PTT detection and 0.3°C-resolution thermal sensing enable reliable operation from −40°C to +85°C without software polling or external comparators. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar audio codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLV320AIC3106IRGZR | Lower power (12 mW playback), no BTL speaker driver, 96-dB DAC SNR, I²C-only control interface | Targeted at ultra-portable wearables with I²C host; lacks 400-mW speaker drive and cellular differential interface | Select when power budget <15 mW dominates and speaker output is handled externally |
| WM8960GEFL/V | Higher SNR (100-dB DAC), integrated Class D speaker amp (1 W), but no battery monitor or headset detection logic | Optimized for media-centric tablets with high-output speakers; requires external GPIO for jack detection | Select when maximum audio fidelity and loudspeaker power are prioritized over system monitoring integration |
Compared with TLV320AIC29IRGZTG4, TLV320AIC3106IRGZR trades speaker drive and cellular interface for lower power and I²C simplicity, while WM8960GEFL/V sacrifices battery/temperature monitoring and jack detection to achieve higher SNR and Class D output - making TLV320AIC29IRGZTG4 uniquely suited for battery-powered voice-centric handsets requiring full-system integration.
Availability
TLV320AIC29IRGZTG4 is available at Aetrix Electronics and suitable for smartphone voice subsystems, portable media player audio hubs, digital camcorder audio capture, and industrial handheld recorders requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for TLV320AIC29IRGZTG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and personal electronics markets.
The TLV320AIC29IRGZTG4 belongs to TI's AIC audio codec family, designed specifically for portable voice-enabled devices needing integrated analog I/O, intelligent detection, and multi-sensor monitoring in a single QFN package.
FAQ
What is the maximum sampling rate supported by the TLV320AIC29IRGZTG4 for simultaneous ADC and DAC operation?
The TLV320AIC29IRGZTG4 supports up to 48 ksps for both ADC and DAC simultaneously. Its Σ-Δ architecture and on-chip PLL allow independent configuration of ADC and DAC sampling rates - including mismatched rates (e.g., 16 ksps ADC for voice + 44.1 ksps DAC for music) - using control register 00H/page 2. Verified operation at 48 ksps is specified with AVDD1 = 3.3 V, DVDD = 1.8 V, and MCLK ≥ 12.288 MHz.
Does the TLV320AIC29IRGZTG4 support capless headphone output, and what pins enable it?
Yes, the TLV320AIC29IRGZTG4 supports true capless headphone output using its virtual ground terminal VGND/CP_OUTN (Pin 31). When enabled, this pin provides a stable 1.5-V reference that allows SPK1 and SPK2 to drive 16-Ω loads directly without DC-blocking capacitors - reducing BOM cost and PCB footprint. Operation requires configuring the appropriate registers (Page 0, Register 0Ch) and supplying DRVDD (Pin 29) at 3.3 V.
How does the TLV320AIC29IRGZTG4 handle headset and button detection without external components?
The TLV320AIC29IRGZTG4 integrates dedicated circuitry for headset insertion detection (via MIC_DETECT_IN, Pin 25), 3-pole vs. 4-pole jack identification (using GPIO1/GPIO2), and mechanical button press recognition (through MICIN_HED bias current monitoring). These functions operate autonomously in hardware power-down mode at 50–70 µA, eliminating the need for external comparators or microcontroller polling - confirmed in TI SLAS494B Section 19 (Overview) and Register Map Page 2.
What are the absolute maximum ratings for BVDD and VBAT on the TLV320AIC29IRGZTG4?
The TLV320AIC29IRGZTG4 has an absolute maximum BVDD rating of 4.5 V (relative to DRVSS1/2) and a VBAT input rating of 6.0 V (relative to AVSS1/2), per SLAS494B Absolute Maximum Ratings table (Page 4). Exceeding these values risks permanent damage. For reliable operation, BVDD should be maintained between 3.0 V and 4.2 V (typical Li-ion range), and VBAT measurements remain accurate from 0.5 V to 6.0 V with ±15 mV system-calibrated error.
Can the TLV320AIC29IRGZTG4 generate programmable audio effects like bass boost or de-emphasis in real time?
Yes, the TLV320AIC29IRGZTG4 includes an on-chip digital audio effects processor that applies real-time bass, treble, midrange, equalization, and de-emphasis to DAC output - all configurable via SPI writes to registers in Page 1. De-emphasis error is specified at ±0.1 dB, and EQ filter coefficients are loaded through dedicated coefficient RAM. This capability operates independently of the host processor, enabling OEM-specific sound tuning without additional DSP resources.
TLV320AIC29IRGZTG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Type:
- Stereo Audio
- Data Interface:
- Serial
- Resolution (Bits):
- 24 b
- Number of ADCs / DACs:
- 1 / 2
- Sigma Delta:
- Yes
- S/N Ratio, ADCs / DACs (db) Typ:
- 90 / 95
- Dynamic Range, ADCs / DACs (db) Typ:
- -
- Voltage - Supply, Analog:
- 3V ~ 3.6V
- Voltage - Supply, Digital:
- 1.65V ~ 1.95V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-VQFN (7x7)
TLV320AIC29IRGZTG4 FAQ
1.How can I place an order for TLV320AIC29IRGZTG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV320AIC29IRGZTG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV320AIC29IRGZTG4 reliable?
The price and inventory of TLV320AIC29IRGZTG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV320AIC29IRGZTG4 is usually 5 days.
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5.How can I obtain technical support or documentation for TLV320AIC29IRGZTG4?
For technical support, including TLV320AIC29IRGZTG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV320AIC29IRGZTG4 requirements.
6.How does Aetrix verify that TLV320AIC29IRGZTG4 is sourced from the original manufacturer or authorized distributors?
All TLV320AIC29IRGZTG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV320AIC29IRGZTG4 meets industry standards.
7.What is the process for return or replacement of TLV320AIC29IRGZTG4?
All TLV320AIC29IRGZTG4 units undergo pre-shipment inspection (PSI). If there is an issue with TLV320AIC29IRGZTG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV320AIC29IRGZTG4 part is unused and in its original packaging.
Return procedure for TLV320AIC29IRGZTG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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