Texas Instruments TLV320AIC3253IRGET
- Part No.:
- TLV320AIC3253IRGET
- Manufacturer:
- Texas Instruments
- Category:
- CODECS
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
TLV320AIC3253IRGET.pdf
- Description:
- IC STEREO AUD CODEC ADJ 24VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:220
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TLV320AIC3253 from Texas Instruments is a low-power stereo audio codec IC with integrated miniDSP, dual 100dB SNR DACs, stereo digital microphone interface, and programmable headphone drivers. It supports 8kHz–192kHz sample rates, operates from 1.26V–1.95V DVdd and 1.5V–1.95V AVdd, and delivers up to 47mW into 16Ω single-ended loads - ideal for battery-powered mobile handsets and portable computing audio subsystems.
For engineers reviewing the TLV320AIC3253 datasheet, TLV320AIC3253 pinout, TLV320AIC3253 application, or TLV320AIC3253 equivalent, key selection considerations include PowerTune™ configurable power-performance trade-offs, I²C/SPI dual-control interface flexibility, embedded miniDSP programmability, analog bypass mode support, and QFN-24 (RGE) package compatibility with space-constrained PCB layouts.
Technical Context
The TLV320AIC3253 implements a fully register-controlled audio signal path with independent left/right DAC and ADC processing blocks, configurable PLL clock synthesis (512kHz–50MHz input), and flexible pin-multiplexing for BCLK/WCLK/DIN/DOUT across primary and secondary I²S interfaces. Its PowerTune™ architecture enables dynamic adjustment of clock domains, processing depth, and analog bias currents to optimize for voice playback (8kHz) or high-fidelity stereo (192kHz).
It integrates an LDO generating AVdd from 1.9V–3.6V LDOIN, supports dual supply domains (DVdd, IOVdd, AVdd), and provides programmable microphone bias (Micbias Mode 0–3) with up to 3mA sourcing capability. The miniDSP runs at up to 55.3MHz and accepts custom firmware for real-time filtering, equalization, and effects processing in both DAC and ADC paths.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DAC SNR | 100dB A-weighted - enables high-fidelity headphone playback with minimal audible noise floor |
| Power Consumption | 4.1mW at 48ksps stereo playback - extends battery life in portable devices |
| Sample Rate Support | 8kHz to 192kHz - covers narrowband telephony through studio-grade audio |
| Headphone Output Power | 47mW into 16Ω (LDOIN = 3.3V, differential mode) - drives standard earbuds without external amplification |
| Integrated LDO | 1.63–1.73V output, ±2% accuracy - eliminates need for external analog supply regulator |
| Digital Microphone Interface | PDM input with programmable clock (64Fs/128Fs) - supports modern low-power digital mics without external decimation |
| Control Interface | I²C (400kHz) or SPI (50MHz SCLK) - allows host processor flexibility and noise-immune communication |
Pinout & Package
The TLV320AIC3253IRGET uses a 4mm × 4mm, 24-pin QFN (RGE) package with exposed thermal pad. Pin functions are fully programmable via register control, except RESET and SPI_SELECT which are hardware-configured.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| MCLK | Master Clock Input | Primary source for internal PLL or direct codec clocking; supports 50MHz max frequency |
| BCLK / WCLK / DIN / DOUT | Primary I²S Interface Signals | Configurable as input/output; support left-justified, right-justified, and I²S formats |
| DMDIN / DMCLK | Digital Microphone Interface | Accepts PDM data and generates clock for external digital mics when SPI_Select = 0 |
| HPL / HPR | Stereo Headphone Outputs | High-power drivers configurable as single-ended or differential; support BTL mono mode |
| MICBIAS | Programmable Mic Bias Output | Four modes (0–3) deliver 1.25V–2.5V or AVdd/LDOin; up to 3mA sourcing for electret mics |
| SCL/SS & SDA/MOSI | I²C/SPI Control Interface | Shared pins auto-configured by SPI_SELECT logic level; enable compact two-wire or four-wire control |
| LDOIN / AVdd / DVdd / IOVdd | Power Supply Inputs | Independent rails: LDOIN (1.9–3.6V), AVdd (1.5–1.95V), DVdd (1.26–1.95V), IOVdd (1.1–3.6V) |
Key Features
| Feature | Design Value |
|---|---|
| PowerTune™ Technology | Dynamic power/performance scaling across 8kHz–192kHz operation - reduces active current by >50% in voice mode vs. full-rate playback |
| Embedded miniDSP | 55.3MHz clocked programmable core - executes custom FIR/IIR filters, EQ, and acoustic echo cancellation without host CPU load |
| Analog Bypass Mode | Direct INL→HPL / INR→HPR routing with ±0.4dB gain error - enables ultra-low-latency, zero-DSP audio path |
| Flexible Clock Architecture | PLL accepts MCLK/BCLK/DIN/GPIO inputs; fractional-N synthesis supports non-integer audio ratios (e.g., 44.1kHz from 12MHz crystal) |
| Low-Power Headphone Drivers | 13mW (AVdd=1.5V) to 47mW (LDOIN=3.3V) output - eliminates need for discrete Class-AB amps in space-constrained designs |
| Dual Digital Microphone Support | Simultaneous PDM input on DMDIN with programmable clock - enables stereo beamforming and noise suppression in compact form factors |
Applications
| Mobile Handset Audio Subsystem | Portable Computing Audio Interface |
|---|---|
Use Scenario: Integrated audio solution for smartphones supporting voice calls, music playback, and voice assistant wake-word detection. IC Role / Device Role / Timing Role: Stereo codec handling simultaneous DAC playback (speaker/headset), ADC recording (dual mics), and miniDSP-based noise suppression. Use Value: 4.1mW playback power and PowerTune™ extend talk time; embedded DSP offloads host CPU during always-on voice processing. |
Use Scenario: Audio subsystem in ultrabooks or tablets requiring high-SNR headphone output, line-in capture, and headset detection. IC Role / Device Role / Timing Role: Central audio hub managing I²S streams from baseband/CPU, analog mic inputs, and programmable headphone drive. Use Value: 100dB DAC SNR ensures clean headphone output; GPIO/MFP5 supports headset plug-in detection without external components. |
| Wireless Headset Baseband Interface | Industrial Voice-Enabled Terminal |
Use Scenario: Audio bridge between Bluetooth SoC and analog transducers in true wireless stereo (TWS) earbuds. IC Role / Device Role / Timing Role: Low-latency DAC/ADC interface with analog bypass mode for call audio path and miniDSP for adaptive ANC. Use Value: 2.7mm × 2.7mm WCSP alternative available; QFN-24 (RGE) variant enables compact layout with integrated LDO and mic bias. |
Use Scenario: Ruggedized handheld terminal used in warehouses or field service requiring clear voice capture and playback in noisy environments. IC Role / Device Role / Timing Role: Audio front-end providing programmable mic preamp gain, digital AGC, and robust I²C control under ESD-prone conditions. Use Value: ±0.4dB analog bypass gain accuracy ensures consistent loudness; 100dB SNR maintains speech intelligibility even at low volume levels. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar stereo audio codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLV320AIC3101IRGET | No miniDSP; lower 92dB DAC SNR; no digital mic interface; fixed 48kHz-only PLL | Targeted at cost-sensitive voice-only applications without programmable audio processing | Select when miniDSP, PDM input, or wide sample rate range are unnecessary and BOM cost is critical |
| PCM3168AIPF | 8-channel, 113dB SNR, no integrated LDO or mic bias; requires external regulators and mic bias circuitry | Designed for professional audio interfaces requiring multi-channel I/O and higher dynamic range | Select for multi-mic array systems needing >6 channels or SNR >100dB, accepting added board area and component count |
Compared with TLV320AIC3253IRGET, TLV320AIC3101IRGET reduces feature set and power efficiency for basic voice, while PCM3168AIPF trades integration for channel count and SNR - making TLV320AIC3253IRGET optimal for space-constrained, battery-powered stereo audio with programmable signal processing.
Availability
TLV320AIC3253IRGET is available at Aetrix Electronics and suitable for mobile handset audio subsystems, portable computing audio interfaces, wireless headset baseband bridges, and industrial voice-enabled terminals requiring stable component supply and long-term manufacturability.
Supply support for TLV320AIC3253IRGET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in precision audio signal chains and low-power system solutions.
The TLV320AIC3253 belongs to TI's ultra-low-power audio codec product line, designed specifically for portable battery-operated devices demanding high-fidelity audio, intelligent power management, and software-defined signal processing in minimal footprint.
FAQ
What is the maximum sample rate supported by the TLV320AIC3253IRGET?
The TLV320AIC3253IRGET supports stereo DAC and ADC operation up to 192kHz, with full signal processing path functionality including miniDSP, programmable filters, and headphone driver operation. At 192kHz, PowerTune™ configuration PTM_P1 enables optimized performance, and the device maintains 100dB SNR in DAC path with appropriate clocking (e.g., MCLK = 12.288MHz × 32).
Does the TLV320AIC3253IRGET support digital microphones?
Yes, the TLV320AIC3253IRGET supports stereo digital microphone inputs via its PDM interface on DMDIN/MFP3 and DMCLK/MFP4 pins. This capability is active only when SPI_SELECT = 0 (I²C mode). It supports 64Fs and 128Fs sampling ratios and integrates clock generation and decimation, eliminating need for external PDM-to-I²S converters in TLV320AIC3253IRGET-based designs.
What are the power supply requirements for the TLV320AIC3253IRGET?
The TLV320AIC3253IRGET requires four independent supplies: LDOIN (1.9V–3.6V), AVdd (1.5V–1.95V), DVdd (1.26V–1.95V), and IOVdd (1.1V–3.6V). An integrated LDO generates AVdd from LDOIN, simplifying design. All grounds (AVss, DVss, IOVss) must be tied together with <0.2V potential difference. Minimum DVdd is 1.65V for PLL operation.
Can the TLV320AIC3253IRGET operate in analog bypass mode?
Yes, the TLV320AIC3253IRGET supports analog bypass mode where left/right analog inputs (INL/INR) are routed directly to headphone outputs (HPL/HPR) with ±0.4dB gain accuracy and A-weighted noise of 3mVRMS. This mode disables DAC/ADC paths and miniDSP, achieving ultra-low latency (<1µs) and minimal power consumption - ideal for voice call audio paths requiring deterministic timing.
What package type is used for the TLV320AIC3253IRGET?
The TLV320AIC3253IRGET uses a 4mm × 4mm, 24-pin QFN package with exposed thermal pad (package code RGE). It is distinct from the YZK (2.7mm × 2.7mm WCSP) variant. The RGE package supports standard reflow assembly, offers excellent thermal performance, and is compatible with automated optical inspection (AOI) and X-ray void detection for high-reliability manufacturing.
TLV320AIC3253IRGET Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- PowerTune™
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Stereo Audio
- Data Interface:
- I2C, Serial, SPI™
- Resolution (Bits):
- 32 b
- Number of ADCs / DACs:
- 0 / 2
- Sigma Delta:
- Yes
- S/N Ratio, ADCs / DACs (db) Typ:
- 100 / 99
- Dynamic Range, ADCs / DACs (db) Typ:
- 99 / 98
- Voltage - Supply, Analog:
- 1.5V ~ 1.95V
- Voltage - Supply, Digital:
- 1.26V ~ 1.95V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-VQFN (4x4)
TLV320AIC3253IRGET FAQ
1.How can I place an order for TLV320AIC3253IRGET through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV320AIC3253IRGET on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV320AIC3253IRGET reliable?
The price and inventory of TLV320AIC3253IRGET are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV320AIC3253IRGET is usually 5 days.
3.What payment methods are accepted for TLV320AIC3253IRGET?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLV320AIC3253IRGET transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLV320AIC3253IRGET?
TLV320AIC3253IRGET orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLV320AIC3253IRGET order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLV320AIC3253IRGET?
For technical support, including TLV320AIC3253IRGET datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV320AIC3253IRGET requirements.
6.How does Aetrix verify that TLV320AIC3253IRGET is sourced from the original manufacturer or authorized distributors?
All TLV320AIC3253IRGET products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV320AIC3253IRGET meets industry standards.
7.What is the process for return or replacement of TLV320AIC3253IRGET?
All TLV320AIC3253IRGET units undergo pre-shipment inspection (PSI). If there is an issue with TLV320AIC3253IRGET, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV320AIC3253IRGET part is unused and in its original packaging.
Return procedure for TLV320AIC3253IRGET:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TLV320AIC3253IRGET Tags

-
NAU88C22YG
Nuvoton Technology Corporation

-
TLV320AIC3100IRHBR
Texas Instruments

-
DA7212-01UM2
Renesas

-
NAU8810YG
Nuvoton Technology Corporation

-
DA7218-00U32
Renesas

-
CMX655DQ6-TR1K
CML Micro

-
SGTL5000XNLA3
NXP Semiconductors

-
TLV320AIC3104IRHBR
Texas Instruments

-
MAX9867EWV+T
Analog Devices Inc./Maxim Integrated

-
MAX9860ETG+T
Analog Devices Inc./Maxim Integrated

-
TLV320AIC3106IRGZR
Texas Instruments

-
SGTL5000XNLA3R2
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

