Texas Instruments TLV7111323DDSET

Overview

TLV7111323DDSET from Texas Instruments is a dual-channel, 200mA low-dropout linear regulator with fixed 1.3V and 2.3V outputs, 2% accuracy over temperature, 35µA quiescent current per channel, and 150mV dropout at 200mA load - designed for power-sensitive portable devices such as smartphones and handheld audio players.

For engineers reviewing the TLV7111323DDSET datasheet, TLV7111323DDSET pinout, TLV7111323DDSET application, or TLV7111323DDSET equivalent, key selection considerations include independent enable control per channel, active pulldown on both EN pins (D-series), thermal/overcurrent protection, and stability with ≥0.1µF ceramic output capacitance.

Technical Context

The TLV7111323DDSET integrates two independent PMOS-based LDO regulators sharing a common input but featuring dedicated VREF and feedback paths to minimize crosstalk. Each channel includes internal current limiting and thermal shutdown, with EN1/EN2 logic thresholds of 0.9V (enable) and 0.4V (shutdown).

As a TLV711-D series device, it incorporates pull-down resistors on both EN pins to ensure reliable disable during indeterminate GPIO states - a critical feature for processor-powered systems during boot or sleep transitions.

Key Specifications

Pinout & Package

Package: 1.5mm × 1.5mm SON-6 (DSE), thermally enhanced, exposed pad (not electrically connected).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-LDO regulator applications.

Compared with TLV7111323DDSET, TLV7101323DDSET lacks integrated EN pulldowns and requires external components for robust disable behavior, while TPS70245PWPR offers higher current and thermal capability in a larger package - neither is pin-compatible, but both serve adjacent dual-LDO use cases.

Availability

TLV7111323DDSET is available at Aetrix Electronics and suitable for smartphone power management, wireless headset audio subsystems, portable medical instrumentation, and industrial handheld scanners requiring stable component supply across extended temperature ranges.

Supply support for TLV7111323DDSET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs with broad industrial, automotive, and consumer design expertise.

The TLV711 series was engineered specifically for ultra-low-power portable electronics, emphasizing minimal quiescent current, small footprint, and robust enable behavior in battery-constrained systems.

FAQ

What output voltages does the TLV7111323DDSET provide?

The TLV7111323DDSET delivers fixed 1.3V on OUT1 and 2.3V on OUT2, programmed at factory via OTP. These values are confirmed in the Electrical Characteristics table and ordering nomenclature ('13' = 1.3V, '23' = 2.3V). The TLV7111323DDSET does not support adjustable output or external feedback networks - both rails are internally set and trimmed to ±2% over temperature.

Does the TLV7111323DDSET require external pull-down resistors on EN1 and EN2?

No - the TLV7111323DDSET is a TLV711-D series device and includes internal 150kΩ pull-down resistors on both EN1 and EN2 pins. This eliminates the need for external components to ensure reliable disable during processor reset or floating GPIO conditions, a key differentiator from non-D variants like TLV7101323DDSET.

What is the minimum output capacitance required for stability with the TLV7111323DDSET?

The TLV7111323DDSET is stable with an effective output capacitance of ≥0.1µF. While 1µF ceramic capacitors are recommended for optimal transient response, the device remains stable down to 0.1µF X5R/X7R MLCCs - enabling use of smaller, cost-effective capacitors in space-constrained designs without compromising loop stability.

How does the TLV7111323DDSET handle thermal overload?

The TLV7111323DDSET features thermal shutdown at +165°C (trip) with automatic recovery at +145°C (reset). During sustained overload, it cycles between current limit and thermal shutdown to protect the die. This behavior is documented in the Absolute Maximum Ratings and Functional Block Diagram - no external thermal monitoring is needed for basic fault protection.

Can the TLV7111323DDSET be used with input voltages below 2.0V?

No - the TLV7111323DDSET has a specified input voltage range of 2.0V to 5.5V per the Electrical Characteristics table. Operation below 2.0V violates absolute maximum ratings and may result in undefined regulation, increased dropout, or failure to enable. For sub-2.0V inputs, consider alternative LDO families such as TPS7A05.