Texas Instruments TLV7111533DDSET
- Part No.:
- TLV7111533DDSET
- Manufacturer:
- Texas Instruments
- Package:
- 6-WFDFN
- Datasheet:
-
TLV7111533DDSET.pdf
- Description:
- IC REG LIN 1.5V/3.3V 200MA 6WSON
- Quantity:
- Payment:

- Shipping:

Inventory:2,284
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Product details
Overview
TLV7111533DDSET from Texas Instruments is a dual-channel, 200mA low-dropout linear regulator with fixed 1.5V and 3.3V outputs, 2% accuracy over –40°C to +125°C, 150mV dropout at 200mA (VOUT = 2.8V), and 70dB PSRR at 1kHz - designed for power-sensitive portable electronics including smartphones and handheld audio devices.
For engineers reviewing the TLV7111533DDSET datasheet, TLV7111533DDSET pinout, TLV7111533DDSET application, or TLV7111533DDSET equivalent, key selection criteria include independent enable control per channel, active pulldown on both EN pins, stable operation with ≥0.1µF ceramic output capacitance, and thermal/overcurrent protection in the 1.5mm × 1.5mm SON-6 package.
Technical Context
The TLV7111533DDSET integrates two independent PMOS-based LDO regulators sharing a common input but featuring dedicated VREF and feedback paths per channel to minimize crosstalk. Each regulator includes internal current limiting and thermal shutdown circuitry, with undervoltage lockout (UVLO) activating below 1.9V VIN.
Its TLV711-D series designation confirms integrated 150kΩ pull-down resistors on EN1 and EN2 pins - ensuring reliable disable when GPIOs float during processor startup - and active pulldown circuitry on both outputs to rapidly discharge loads upon shutdown.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output voltages | 1.5V (OUT1) and 3.3V (OUT2) - factory OTP-programmed fixed outputs, no external resistors required |
| Max output current | 200mA per channel - supports simultaneous dual-rail powering of core logic and I/O peripherals |
| Dropout voltage | 150mV at 200mA, VOUT = 2.8V - enables regulation from 3.45V input for 3.3V rail, critical for battery-powered systems |
| Quiescent current | 35µA per regulator (70µA total enabled) - extends battery life in always-on subsystems |
| PSRR @ 1kHz | 70dB - suppresses switching noise from upstream DC/DC converters feeding the LDO input |
| Accuracy | ±2% over –40°C to +125°C - ensures reliable operation across industrial temperature range without calibration |
| Enable threshold | VEN(HI) = 0.9V, VEN(LO) = 0.4V - compatible with 1.8V and 3.3V GPIO logic levels |
Pinout & Package
Package: 1.5mm × 1.5mm SON-6 (DSE), wettable flank, 0.5mm pitch, exposed thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1 | Enable input for OUT1 | Active-high control with 150kΩ internal pulldown - prevents false turn-on during power-up |
| IN | Input supply | Common input for both regulators; requires ≥0.1µF ceramic bypass capacitor to GND |
| EN2 | Enable input for OUT2 | Independent active-high control with 150kΩ internal pulldown - enables staggered power sequencing |
| GND | Ground reference | Single ground pin shared by both regulators and thermal pad - must connect to solid ground plane |
| OUT2 | 3.3V regulated output | Stable 3.3V rail; requires ≥0.1µF ceramic capacitor to GND for stability and transient response |
| OUT1 | 1.5V regulated output | Stable 1.5V rail; dedicated VREF minimizes crosstalk from OUT2 load transients |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent enables | EN1 and EN2 allow precise power sequencing - e.g., enable 1.5V core before 3.3V I/O |
| Active output pulldown | Both OUT1 and OUT2 actively discharge when disabled - prevents floating states in downstream logic |
| Dedicated VREF per output | Eliminates crosstalk between channels - critical for mixed-signal SoC power domains |
| Stable with 0.1µF COUT | Enables use of ultra-small 0201/0402 ceramic capacitors - saves PCB area in space-constrained designs |
| Thermal + current protection | Auto-recovery thermal shutdown at +165°C and foldback current limit - protects against sustained overload |
Applications
| Smartphone Baseband Power | Wearable Sensor Hub |
|---|---|
Use Scenario: Dual-rail power for application processor (1.5V core) and interface peripherals (3.3V USB/I²C). IC Role / Device Role / Timing Role: Primary LDO supplying clean, sequenced voltage rails with minimal board area. Use Value: 70dB PSRR at 1kHz rejects noise from switching DC/DC converters; active pulldown prevents bus contention during reset. | Use Scenario: Powering ultra-low-power MCU core (1.5V) and environmental sensors (3.3V) in hearables. IC Role / Device Role / Timing Role: Single-package dual LDO enabling compact, battery-optimized power architecture. Use Value: 35µA per regulator quiescent current extends battery life; 0.1µF COUT support reduces BOM count and footprint. |
| Industrial Handheld Terminal | Medical Point-of-Care Monitor |
Use Scenario: Supplying 1.5V FPGA fabric and 3.3V display interface in ruggedized field device. IC Role / Device Role / Timing Role: Industrial-grade dual LDO with –40°C to +125°C operation and ±2% accuracy. Use Value: Thermal shutdown and UVLO ensure safe operation under wide input voltage swings and ambient extremes. | Use Scenario: Providing isolated 1.5V analog front-end and 3.3V digital controller rails in battery-backed medical device. IC Role / Device Role / Timing Role: Safety-critical dual LDO with dedicated VREF per output to prevent signal corruption. Use Value: Crosstalk suppression enables accurate ADC readings; active pulldown guarantees known state during power loss. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLV7101533DDSET | No EN pin pulldowns; requires external pull-down resistors for robust disable | Lacks guaranteed disable during floating GPIO states - unsuitable for uncontrolled startup sequences | Select TLV7101533DDSET only if system guarantees EN pin drive during all power states |
| TPS70245PWPR | Higher IQ (125µA), larger 20-pin TSSOP package, no active pulldown on outputs | Supports adjustable outputs via external resistors; less suitable for space-constrained portable designs | Choose TPS70245PWPR when design requires programmable voltages or higher current per channel (250mA) |
Compared with TLV7101533DDSET and TPS70245PWPR, the TLV7111533DDSET uniquely combines factory-fixed dual outputs, EN pin pulldowns, active output pulldown, and 1.5mm × 1.5mm SON-6 packaging - making it optimal for miniaturized, battery-powered systems requiring guaranteed startup behavior and fast load discharge.
Availability
TLV7111533DDSET is available at Aetrix Electronics and suitable for smartphone baseband power, wearable sensor hubs, and industrial handheld terminals requiring stable component supply, long-term lifecycle support, and consistent parametric performance.
Supply support for TLV7111533DDSET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions for industrial, automotive, and personal electronics markets.
The TLV711 series belongs to TI's low-power LDO portfolio, engineered specifically for portable and battery-operated devices demanding ultra-low quiescent current, high PSRR, and small-footprint dual-rail power management.
FAQ
What output voltages does the TLV7111533DDSET provide?
The TLV7111533DDSET provides two fixed, factory-programmed output voltages: 1.5V on OUT1 and 3.3V on OUT2. These values are set via OTP programming and require no external resistors. Both outputs maintain ±2% accuracy across –40°C to +125°C junction temperature and support up to 200mA load current each.
Does TLV7111533DDSET include enable pin pull-down resistors?
Yes, TLV7111533DDSET is part of the TLV711-D series and includes internal 150kΩ pull-down resistors on both EN1 and EN2 pins. This ensures reliable disable when control signals are floating - such as during processor reset or three-state GPIO conditions - eliminating need for external components.
What is the minimum output capacitance required for TLV7111533DDSET stability?
The TLV7111533DDSET is stable with an effective output capacitance of 0.1µF or greater. It is optimized for 1.0µF X5R/X7R ceramic capacitors but supports smaller values down to 0.1µF - enabling use of compact 0201- or 0402-size MLCCs in space-constrained layouts without compromising transient response or PSRR.
How does TLV7111533DDSET handle output discharge during shutdown?
The TLV7111533DDSET features active pulldown circuitry on both OUT1 and OUT2. When either EN pin is driven low, the corresponding output is actively pulled to GND - not just high-impedance - ensuring rapid, controlled discharge of downstream capacitance and preventing undefined logic states in powered-off subsystems.
What protection features are integrated into TLV7111533DDSET?
TLV7111533DDSET integrates over-current protection with foldback current limiting, thermal shutdown at +165°C (auto-recovery), and undervoltage lockout (UVLO) that disables regulation below 1.9V VIN. These features protect the device and load during fault conditions such as short circuits, excessive ambient temperature, or brownout events.
TLV7111533DDSET Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.5V, 3.3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- -, 0.2V @ 200mA
- Current - Output:
- 200mA
- Current - Quiescent (Iq):
- 110 µA
- Current - Supply (Max):
- -
- PSRR:
- 80dB ~ 50dB (10Hz ~ 100kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Short Circuit, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WSON (1.5x1.5)
TLV7111533DDSET FAQ
1.How can I place an order for TLV7111533DDSET through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV7111533DDSET on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV7111533DDSET reliable?
The price and inventory of TLV7111533DDSET are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV7111533DDSET is usually 5 days.
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TLV7111533DDSET orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLV7111533DDSET order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLV7111533DDSET?
For technical support, including TLV7111533DDSET datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV7111533DDSET requirements.
6.How does Aetrix verify that TLV7111533DDSET is sourced from the original manufacturer or authorized distributors?
All TLV7111533DDSET products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV7111533DDSET meets industry standards.
7.What is the process for return or replacement of TLV7111533DDSET?
All TLV7111533DDSET units undergo pre-shipment inspection (PSI). If there is an issue with TLV7111533DDSET, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV7111533DDSET part is unused and in its original packaging.
Return procedure for TLV7111533DDSET:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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