Texas Instruments TLV7111830DSET
- Part No.:
- TLV7111830DSET
- Manufacturer:
- Texas Instruments
- Package:
- 6-WFDFN
- Datasheet:
-
TLV7111830DSET.pdf
- Description:
- IC REG LIN 1.8V/3V 200MA 6WSON
- Quantity:
- Payment:

- Shipping:

Inventory:670
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Product details
Overview
TLV7111830DSET from Texas Instruments is a dual-channel, 200mA low-dropout linear regulator with fixed 1.8V and 3.0V outputs, 2% output accuracy over –40°C to +125°C, 150mV dropout at 200mA (VOUT = 2.8V), and 70dB PSRR at 1kHz - designed for power-sensitive portable electronics including smartphone baseband and RF subsystems.
For engineers reviewing the TLV7111830DSET datasheet, TLV7111830DSET pinout, TLV7111830DSET application, or TLV7111830DSET equivalent, key selection criteria include independent enable control per channel, active pulldown on both EN pins (D-series), thermal/overcurrent protection, and stability with ≥0.1µF ceramic output capacitance.
Technical Context
The TLV7111830DSET integrates two independent PMOS-based LDO regulators sharing a common IN and GND, each with dedicated VREF and EN pin. Its D-series variant includes internal pull-down resistors on EN1 and EN2 (6mA max IEN) to ensure reliable shutdown during indeterminate GPIO states.
Each regulator features dedicated bandgap reference, current-limit protection (220–550mA), thermal shutdown (165°C trip), and undervoltage lockout (1.9V VIN). Output crosstalk is minimized via separate VREF paths and optimized internal routing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output voltages | 1.8V (OUT1) and 3.0V (OUT2), factory OTP-programmed, ±2% tolerance over full temperature range |
| Max output current | 200mA per channel - supports simultaneous dual-rail loads in compact handheld devices |
| Dropout voltage | 150mV at 200mA and VOUT = 2.8V - enables operation from single-cell Li-ion (3.0V min VIN) |
| Quiescent current | 35µA per regulator (70µA total when both enabled) - extends battery life in always-on subsystems |
| PSRR | 70dB at 1kHz - suppresses switching noise from adjacent DC/DC converters in RF-sensitive applications |
| Stability | Stable with ≥0.1µF ceramic output capacitance - allows use of small 0201/0402 MLCCs in space-constrained layouts |
| Enable logic | Active-high EN1/EN2 with 0.9V VIH and 0.4V VIL; internal 6mA pull-down ensures default-off behavior |
Pinout & Package
TLV7111830DSET is housed in a 1.5mm × 1.5mm SON-6 package with wettable flanks, optimized for automated optical inspection (AOI) and thermal performance (θJT = 6°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - EN1 | Enable input for regulator 1 (1.8V) | Drives OUT1 on >0.9V; internal 6mA pull-down forces shutdown if left floating or weakly driven |
| 2 - IN | Input supply rail | Shared input for both regulators; requires local 1µF ceramic decoupling to GND |
| 3 - EN2 | Enable input for regulator 2 (3.0V) | Drives OUT2 on >0.9V; independent control enables staggered power-up sequences |
| 4 - GND | Power ground reference | Single ground connection point - critical for minimizing crosstalk between output rails |
| 5 - OUT2 | Regulated 3.0V output | Delivers up to 200mA; requires 1µF ceramic capacitor to GND for transient stability |
| 6 - OUT1 | Regulated 1.8V output | Delivers up to 200mA; dedicated VREF minimizes interference from OUT2 load transients |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent enable inputs | EN1 and EN2 allow precise sequencing of 1.8V and 3.0V rails - essential for FPGA I/O and core voltage ramp requirements |
| Active pulldown on EN pins | 6mA internal pull-down prevents false turn-on during processor boot or reset - eliminates need for external pull-down resistors |
| Dedicated VREF per output | Minimizes crosstalk between channels; measured <1mV perturbation on one output when other channel experiences 100mA load step |
| Thermal and current limit protection | Auto-recovery thermal shutdown (165°C trip / 145°C reset) and foldback current limiting prevent damage during short-circuit faults |
| Low-noise operation | 48µVRMS output noise (100Hz–100kHz) - suitable for powering RF transceivers and precision analog circuitry |
Applications
| Smartphone Baseband Power | Wearable Sensor Hub |
|---|---|
Use Scenario: Powers application processor I/O (1.8V) and memory interface (3.0V) in LTE/5G smartphones during active data transmission. IC Role / Device Role / Timing Role: Dual-rail LDO providing clean, sequenced voltage domains with independent enable control for power-state transitions. Use Value: 70dB PSRR at 1kHz rejects noise from high-frequency PMIC switching, preserving signal integrity in high-speed MIPI interfaces. | Use Scenario: Supplies 1.8V to ultra-low-power MCU and 3.0V to BLE radio and environmental sensors in coin-cell–powered wearables. IC Role / Device Role / Timing Role: Low-IQ dual LDO enabling >7-day battery life while supporting fast wake-from-sleep response via independent EN control. Use Value: 35µA per regulator quiescent current and 0.1µF minimum output capacitance reduce BOM count and PCB area by 30% vs legacy solutions. |
| Industrial Handheld Terminal | Medical Point-of-Care Display |
Use Scenario: Delivers regulated 1.8V (LCD controller) and 3.0V (touch controller + flash memory) in ruggedized barcode scanners operating across –30°C to +70°C. IC Role / Device Role / Timing Role: Automotive-grade qualified dual LDO with ±2% output accuracy over temperature and integrated UVLO (1.9V). Use Value: Thermal shutdown (165°C) and current limiting protect against sustained overload in sealed enclosures with limited airflow. | Use Scenario: Powers 1.8V display driver IC and 3.0V OLED backlight driver in portable diagnostic devices requiring EMI-free operation near sensitive analog front-ends. IC Role / Device Role / Timing Role: Low-noise dual LDO with dedicated VREF paths to isolate display timing signals from backlight switching transients. Use Value: 48µVRMS output noise and <1mV crosstalk ensure stable grayscale rendering and eliminate visible display artifacts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLS850F0EJXUMA1 | Automotive-qualified 500mA dual LDO with integrated watchdog timer; higher IQ (80µA), larger HTSOP-8 package | Targets ASIL-B automotive body electronics; lacks EN pulldown and requires external sequencing logic | Select when functional safety compliance (ISO 26262) and higher current are required; not drop-in due to pinout and control differences |
| TPS7A201833PDBVR | Single-output LDO pair (1.8V + 3.3V); no shared IN/GND; 25µA IQ; 0.7V dropout; WSON-8 package | Optimized for ultra-low-noise audio/precision analog; no thermal shutdown or current limit protection | Select for noise-critical analog rails where protection features are handled externally; requires separate input routing |
Compared with TLS850F0EJXUMA1 and TPS7A201833PDBVR, TLV7111830DSET uniquely combines dual-rail integration, EN pulldown, thermal/current protection, and 1.5mm × 1.5mm footprint - making it optimal for cost- and space-constrained portable designs needing robust, self-contained regulation.
Availability
TLV7111830DSET is available at Aetrix Electronics and suitable for smartphone baseband power, wearable sensor hubs, industrial handheld terminals, and medical point-of-care displays requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for TLV7111830DSET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions for industrial, automotive, and personal electronics markets.
The TLV711 series belongs to TI's low-power LDO portfolio, engineered specifically for battery-powered portable devices requiring dual-rail, low-quiescent-current regulation with high PSRR and minimal board space.
FAQ
What are the exact output voltages and accuracy of TLV7111830DSET?
TLV7111830DSET provides fixed 1.8V on OUT1 and 3.0V on OUT2, with ±2% DC accuracy over the full operating junction temperature range of –40°C to +125°C. This specification is guaranteed under all load, line, and temperature conditions per the Electrical Characteristics table in the SBVS142A datasheet.
Does TLV7111830DSET require external pull-down resistors on EN1 and EN2?
No. TLV7111830DSET is a D-series device featuring internal 6mA pull-down resistors on both EN1 and EN2 pins. This design ensures reliable shutdown when enable signals are floating or driven by weak GPIOs - eliminating the need for external components and simplifying layout.
What is the minimum output capacitance required for stability with TLV7111830DSET?
TLV7111830DSET is stable with an effective output capacitance of 0.1µF or greater. While 1µF X5R/X7R ceramic capacitors are recommended for optimal transient response, the device maintains phase margin with smaller values - enabling use of 0.22µF or 0.47µF MLCCs in size-constrained designs.
How does TLV7111830DSET handle overcurrent or thermal faults?
TLV7111830DSET incorporates foldback current limiting and thermal shutdown. During overload, it limits output current to 220–550mA depending on VIN, then cycles between current limit and thermal shutdown (trip at +165°C, reset at +145°C) until the fault clears - protecting both the IC and downstream circuitry without latch-up.
Can TLV7111830DSET be used in applications requiring different output voltage combinations?
No - TLV7111830DSET is factory-programmed for 1.8V/3.0V only. The TLV711 family supports other combinations (e.g., 1.5V/2.5V, 3.3V/3.3V) via distinct part numbers (e.g., TLV7111525DSET, TLV7113333DSET), each with OTP-set outputs. Voltage selection must be made at order time.
TLV7111830DSET Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 1.8V, 3V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- -, 0.215V @ 200mA
- Current - Output:
- 200mA
- Current - Quiescent (Iq):
- 110 µA
- Current - Supply (Max):
- -
- PSRR:
- 80dB ~ 50dB (10Hz ~ 100kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Short Circuit, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WSON (1.5x1.5)
TLV7111830DSET FAQ
1.How can I place an order for TLV7111830DSET through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV7111830DSET on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV7111830DSET reliable?
The price and inventory of TLV7111830DSET are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV7111830DSET is usually 5 days.
3.What payment methods are accepted for TLV7111830DSET?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLV7111830DSET transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLV7111830DSET?
TLV7111830DSET orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLV7111830DSET order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLV7111830DSET?
For technical support, including TLV7111830DSET datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV7111830DSET requirements.
6.How does Aetrix verify that TLV7111830DSET is sourced from the original manufacturer or authorized distributors?
All TLV7111830DSET products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV7111830DSET meets industry standards.
7.What is the process for return or replacement of TLV7111830DSET?
All TLV7111830DSET units undergo pre-shipment inspection (PSI). If there is an issue with TLV7111830DSET, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV7111830DSET part is unused and in its original packaging.
Return procedure for TLV7111830DSET:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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