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Texas Instruments TLV71128512DSET
- Part No.:
- TLV71128512DSET
- Manufacturer:
- Texas Instruments
- Package:
- 6-WFDFN
- Datasheet:
-
TLV71128512DSET.pdf
- Description:
- IC REG LINEAR 2.85V/1.2V 6WSON
- Quantity:
- Payment:
- Shipping:
Inventory:1,048
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Product details
Overview
TLV71128512DSET from Texas Instruments is a dual-channel, low-quiescent-current LDO regulator with fixed 2.8V and 1.2V outputs, 200mA per channel, 150mV dropout at 200mA/2.8V, ±2% output accuracy over –40°C to +125°C, and integrated EN pull-down resistors for robust disable behavior in weak-drive GPIO scenarios - used in smartphone baseband and application processor power domains.
For engineers reviewing the TLV71128512DSET datasheet, TLV71128512DSET pinout, TLV71128512DSET application, or TLV71128512DSET equivalent, key selection criteria include dual-rail sequencing tolerance, low-noise 48µVRMS output, 70dB PSRR at 1kHz, thermal shutdown at +165°C, and compatibility with 0.1µF–1µF ceramic output capacitors in space-constrained portable designs.
Technical Context
The TLV71128512DSET integrates two independent PMOS-based LDO regulators sharing a common IN and GND, each with dedicated VREF and EN control. Its architecture enables minimal crosstalk between channels and supports independent enable/disable sequencing without external logic.
It features active pulldown circuits on both EN1 and EN2 pins (6kΩ internal pull-down), ensuring reliable shutdown when host GPIOs enter high-impedance states during boot or sleep. The device operates across 2.0V–5.5V input and delivers stable regulation down to 1.2V output with no minimum load requirement.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output voltages | 2.8V (OUT1) and 1.2V (OUT2), factory-trimmed, ±2% accuracy over full temperature range |
| Max output current | 200mA per channel - sufficient to power ARM Cortex-A/M cores and RF transceivers simultaneously |
| Dropout voltage | 150mV at 200mA/2.8V - enables operation from single-cell Li-ion (3.0V min) with margin |
| Quiescent current | 35µA per regulator (70µA total enabled), 2.5µA shutdown - extends battery life in always-on sensor nodes |
| PSRR | 70dB at 1kHz - suppresses switching noise from DC/DC converters feeding the LDO input |
| Output noise | 48µVRMS (100Hz–100kHz) - suitable for analog sensor signal chains and ADC reference supplies |
| Thermal shutdown | +165°C trip, +145°C reset - protects against sustained overload in sealed handheld enclosures |
Pinout & Package
Package: 1.5mm × 1.5mm SON-6 (DSE), wettable flank, 0.5mm pitch, exposed thermal pad (connected to GND).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - EN1 | Enable input for OUT1 | Active-high; 6kΩ internal pull-down ensures default OFF - eliminates need for external pull-down resistor |
| 2 - IN | Input supply rail | Shared input for both regulators; requires 1µF ceramic capacitor to GND within 2mm for stability |
| 3 - EN2 | Enable input for OUT2 | Active-high; 6kΩ internal pull-down - supports independent power gating of 1.2V core and 2.8V I/O rails |
| 4 - GND | Power ground | Common return for IN, OUT1, OUT2; must connect directly to thermal pad and system ground plane |
| 5 - OUT2 | 1.2V regulated output | Delivers up to 200mA; requires 1µF ceramic capacitor to GND placed adjacent to pin |
| 6 - OUT1 | 2.8V regulated output | Delivers up to 200mA; dedicated VREF minimizes crosstalk from OUT2 load transients |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent EN pins with internal pull-down | Eliminates external biasing components and prevents unintended turn-on during processor reset |
| Dedicated VREF per output | Reduces inter-channel crosstalk to <10mV during 200mA load step on opposite rail |
| Stable with 0.1µF–1µF ceramic output caps | Enables use of small 0402/0603 MLCCs - critical for ultra-thin smartphone PCB stackups |
| High PSRR (70dB @ 1kHz) | Maintains clean 1.2V core supply despite noisy 3.8V buck converter input ripple |
| Over-current and thermal protection | Self-recovering cycle limits fault energy - no latch-up or manual reset required |
Applications
| Smartphone Application Processor Core | Wireless Handset RF Front-End |
|---|---|
|
Use Scenario: Powering ARM Cortex-A73/A76 CPU cores requiring tightly regulated 1.2V at up to 200mA with fast transient response. IC Role / Device Role / Timing Role: Primary core LDO delivering low-noise, sequenced 1.2V rail synchronized with SoC power management unit (PMU) signals. Use Value: 48µVRMS noise and 70dB PSRR prevent digital switching noise from degrading CPU timing margins and cache error rates. |
Use Scenario: Supplying 2.8V to PA driver stages and RF switches in LTE/Wi-Fi front-end modules. IC Role / Device Role / Timing Role: Low-dropout, high-PSRR post-regulator cleaning switched-mode supply ripple before RF signal path. Use Value: 150mV dropout enables efficient operation from 3.3V buck output, preserving headroom for PA efficiency while rejecting 1MHz switching artifacts. |
| Portable Medical Sensor Hub | Wearable Fitness Tracker |
|
Use Scenario: Providing isolated 1.2V and 2.8V rails to analog front-end (AFE) and BLE SoC in compact ECG/SpO₂ monitor. IC Role / Device Role / Timing Role: Dual-rail power source enabling simultaneous AFE biasing and wireless MCU operation with minimal board area. Use Value: 35µA/quiescent current per channel extends battery life beyond 7 days on coin cell, while independent EN allows dynamic rail shutdown. |
Use Scenario: Powering motion sensor cluster (accelerometer, gyroscope) and display driver IC in wrist-worn form factor. IC Role / Device Role / Timing Role: Compact dual-LDO managing discrete voltage requirements under strict 1.5mm × 1.5mm footprint constraint. Use Value: SON-6 package with wettable flanks supports automated optical inspection (AOI) and high-yield reflow in high-volume wearable production. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLC71128512DSET | Same pinout and electrical specs, but lacks EN pull-down resistors - requires external 100kΩ pull-downs on EN1/EN2 | Suitable only where host MCU GPIOs guarantee defined logic levels during all power states | Select TLV71128512DSET if GPIOs may float during boot; choose TLC71128512DSET only if external pull-downs are acceptable |
| TPS71728512DSET | Higher IQ (1.4µA typical), lower max current (150mA/channel), same 1.5mm × 1.5mm DSBGA package | Better for ultra-low-power always-on sensors; insufficient for 200mA peak loads like camera ISPs | Choose TPS71728512DSET only for sub-150mA applications prioritizing nanoamp quiescent current over drive capability |
Compared with TLC71128512DSET and TPS71728512DSET, TLV71128512DSET uniquely combines 200mA per channel, integrated EN pull-downs, and 35µA IQ - making it the only option supporting robust, component-count-optimized dual-rail power in portable devices with indeterminate GPIO states.
Availability
TLV71128512DSET is available at Aetrix Electronics and suitable for smartphone power management, wearable sensor hubs, and portable medical instrumentation requiring stable component supply with guaranteed long-term lifecycle support.
Supply support for TLV71128512DSET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of LDO design heritage and automotive-grade reliability validation.
The TLV711 series was engineered specifically for portable electronics demanding ultra-low IQ, dual-rail flexibility, and robust enable behavior - targeting smartphones, wearables, and IoT edge nodes where board space and battery life are critical.
FAQ
What is the maximum input voltage rating for TLV71128512DSET?
The absolute maximum input voltage for TLV71128512DSET is +6.0V, but the recommended operating range is 2.0V to 5.5V. Exceeding 5.5V risks violating the specified electrical characteristics and may trigger undervoltage lockout (UVLO) at 1.9V rising threshold, though operation above 5.5V is not guaranteed and voids parametric performance compliance.
Does TLV71128512DSET require an input capacitor?
TLV71128512DSET does not require an input capacitor for stability, but Texas Instruments recommends a 1µF X5R/X7R ceramic capacitor placed within 2mm of the IN pin to improve PSRR and transient response. Without it, high-frequency noise coupling from upstream DC/DC converters may degrade TLV71128512DSET's 70dB PSRR specification at 1kHz.
Can TLV71128512DSET be used with 0.1µF output capacitors?
Yes, TLV71128512DSET is explicitly characterized and stable with effective output capacitance ≥0.1µF, including 0402-size 0.1µF X5R ceramics. However, the effective capacitance must remain ≥0.1µF under actual bias and temperature conditions - derating must be verified per manufacturer's K-factor curves for the chosen dielectric.
What is the purpose of the internal EN pull-down resistors in TLV71128512DSET?
The 6kΩ internal pull-down resistors on EN1 and EN2 ensure TLV71128512DSET remains disabled when host GPIOs are three-stated during processor reset or deep-sleep modes. This eliminates risk of uncontrolled power-up and removes need for external pull-down resistors, reducing BOM count and PCB area in space-constrained designs using TLV71128512DSET.
How does TLV71128512DSET handle simultaneous load transients on both outputs?
TLV71128512DSET uses dedicated VREF circuits per output to minimize crosstalk; test data shows <10mV disturbance on one output when the other sustains a 200mA load step. This isolation enables concurrent high-speed digital (2.8V) and analog-sensitive (1.2V) circuitry to share TLV71128512DSET without compromising signal integrity or timing margins.
TLV71128512DSET Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 2.85V, 1.2V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.215V @ 200mA, -
- Current - Output:
- 200mA
- Current - Quiescent (Iq):
- 110 µA
- Current - Supply (Max):
- 360 µA
- PSRR:
- 80dB ~ 50dB (10Hz ~ 100kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Short Circuit, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WSON (1.5x1.5)
TLV71128512DSET FAQ
1.How can I place an order for TLV71128512DSET through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV71128512DSET on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV71128512DSET reliable?
The price and inventory of TLV71128512DSET are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV71128512DSET is usually 5 days.
3.What payment methods are accepted for TLV71128512DSET?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLV71128512DSET transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLV71128512DSET?
TLV71128512DSET orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLV71128512DSET order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLV71128512DSET?
For technical support, including TLV71128512DSET datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV71128512DSET requirements.
6.How does Aetrix verify that TLV71128512DSET is sourced from the original manufacturer or authorized distributors?
All TLV71128512DSET products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV71128512DSET meets industry standards.
7.What is the process for return or replacement of TLV71128512DSET?
All TLV71128512DSET units undergo pre-shipment inspection (PSI). If there is an issue with TLV71128512DSET, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV71128512DSET part is unused and in its original packaging.
Return procedure for TLV71128512DSET:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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