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Texas Instruments TLV7113318DDSET
- Part No.:
- TLV7113318DDSET
- Manufacturer:
- Texas Instruments
- Package:
- 6-WFDFN
- Datasheet:
-
TLV7113318DDSET.pdf
- Description:
- IC REG LIN 3.3V/1.8V 200MA 6WSON
- Quantity:
- Payment:
- Shipping:
Inventory:646
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Product details
Overview
TLV7113318DDSET from Texas Instruments is a dual-channel, low-quiescent-current LDO regulator in a 1.5mm × 1.5mm SON-6 package, delivering fixed 3.3V and 1.8V outputs with 200mA per channel, ±2% output accuracy over –40°C to +125°C, and 70dB PSRR at 1kHz - designed for power-sensitive portable applications including smartphones and handheld audio devices.
For engineers reviewing the TLV7113318DDSET datasheet, TLV7113318DDSET pinout, TLV7113318DDSET application, or TLV7113318DDSET equivalent, this page provides verified electrical specifications, thermal behavior, enable control logic, dropout performance at full load, and design-critical capacitor stability guidance for compact battery-powered systems.
Technical Context
The TLV7113318DDSET integrates two independent PMOS-based LDO regulators with dedicated VREF circuits per output to minimize crosstalk. Each channel features active pulldown on its EN pin (EN1/EN2) to ensure reliable shutdown during indeterminate GPIO states, and includes internal current limiting and thermal shutdown protection.
It operates across 2.0V–5.5V input range, supports ceramic output capacitors ≥0.1µF (1µF recommended), and maintains regulation with dropout as low as 140mV at 200mA for VOUT ≥3.3V. The device is specified for continuous operation up to +125°C junction temperature.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output voltages | 3.3V (OUT1) and 1.8V (OUT2), fixed, ±2% accuracy over full temperature range |
| Max output current | 200mA per channel - sufficient to power core logic and I/O rails in portable SoC subsystems |
| Dropout voltage | 140mV typical at 200mA, VOUT = 3.3V - enables operation from single-cell Li-ion down to ~3.44V |
| Quiescent current | 35µA per regulator (70µA total when both enabled) - extends battery life in always-on standby modes |
| PSRR @ 1kHz | 70dB - suppresses switching noise from upstream DC/DC converters feeding the LDO input |
| Enable threshold | VEN(HI) = 0.9V min, VEN(LO) = 0.4V max - compatible with 1.8V GPIO without level-shifting |
| Stability capacitance | Stable with ≥0.1µF ceramic output cap (1µF typical) - allows use of small 0402/0603 MLCCs in space-constrained layouts |
Pinout & Package
Package: 1.5mm × 1.5mm SON-6 (DSE), wettable flank, exposed thermal pad (GND-connected).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - EN1 | Enable input for OUT1 | Active-high; internal 150kΩ pull-down ensures default OFF state if left floating or driven weakly |
| 2 - IN | Input supply rail | Shared input for both regulators; requires local 1µF ceramic decoupling to GND |
| 3 - EN2 | Enable input for OUT2 | Active-high; independent control enables staggered power-up or selective rail shutdown |
| 4 - GND | Ground reference | Common return for IN, OUT1, OUT2, EN1, EN2; must connect thermal pad directly to PCB ground plane |
| 5 - OUT2 | 1.8V regulated output | Delivers up to 200mA; requires 1µF ceramic capacitor to GND for stability and transient response |
| 6 - OUT1 | 3.3V regulated output | Delivers up to 200mA; dedicated VREF minimizes crosstalk from OUT2 load transients |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent enables | EN1 and EN2 allow asynchronous startup/shutdown sequencing - critical for FPGA or multi-core processor power management |
| Active pulldown on EN pins | 150kΩ internal pull-down prevents unintended turn-on during processor reset or three-state GPIO conditions |
| Dedicated VREF per output | Eliminates inter-rail crosstalk - OUT2 load steps cause <1mV perturbation on OUT1, preserving analog sensor bias stability |
| Low-noise operation | 48µVRMS output noise (100Hz–100kHz) - suitable for powering RF front-ends and precision ADC references |
| Thermal & current protection | Auto-recovery thermal shutdown at +165°C and foldback current limit prevent damage during sustained overload |
Applications
| Smartphone Baseband Power | Wearable Sensor Hub |
|---|---|
|
Use Scenario: Powers application processor I/O bank (1.8V) and memory interface (3.3V) from shared single-cell Li-ion battery. IC Role / Device Role / Timing Role: Dual-rail LDO providing clean, sequenced, low-noise supplies with independent enable control for power-state transitions. Use Value: Enables >30% longer standby time via 70µA total IQ and eliminates need for external pull-down resistors on EN lines. |
Use Scenario: Supplies MEMS accelerometer (1.8V) and BLE radio transceiver (3.3V) in ultra-thin fitness tracker. IC Role / Device Role / Timing Role: Compact dual-LDO delivering rail isolation, fast load transient response (<50µs), and thermal robustness in confined space. Use Value: 1.5mm × 1.5mm footprint saves >40% board area vs. discrete LDOs; dedicated VREF ensures radio sensitivity unaffected by sensor activity. |
| Portable Medical Monitor | Industrial Handheld Terminal |
|
Use Scenario: Powers ECG analog front-end (1.8V) and display controller (3.3V) in battery-operated patient monitor. IC Role / Device Role / Timing Role: Low-noise, high-PSRR dual regulator maintaining signal integrity across medical-grade analog and digital domains. Use Value: 48µVRMS noise and 70dB PSRR at 1kHz reduce ECG baseline drift; ±2% accuracy ensures calibrated measurement repeatability. |
Use Scenario: Supplies barcode scanner ASIC (1.8V) and Wi-Fi module (3.3V) in ruggedized warehouse terminal. IC Role / Device Role / Timing Role: Industrial-grade dual LDO with –40°C to +125°C operation, thermal shutdown, and reverse-voltage tolerant body diode. Use Value: Withstands wide ambient swings and transient overloads; EN pull-down prevents brownout-induced malfunction during cold-start. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLC7113318DDSET | Same pinout and electrical specs, but lacks EN pull-down resistors - requires external pull-downs for reliable disable | Suitable only where host MCU GPIOs guarantee strong low-state drive during reset | Select TLV7113318DDSET when system uses weak-drive or three-stated enable signals |
| TPS7173318DSET | Lower IQ (25µA/channel), higher PSRR (80dB @ 1kHz), but no EN pull-down and larger 2mm × 2mm package | Better for ultra-low-power designs where board area is less constrained and GPIO control is robust | Choose TPS7173318DSET when maximizing battery life outweighs layout compactness and enable reliability needs |
Compared with TLC7113318DDSET, TLV7113318DDSET adds guaranteed disable behavior under indeterminate EN states; versus TPS7173318DSET, it trades 10dB PSRR and 10µA/channel IQ for 33% smaller footprint and integrated EN safety - making it optimal for space- and reliability-critical portable designs.
Availability
TLV7113318DDSET is available at Aetrix Electronics and suitable for smartphone baseband power, wearable sensor hubs, portable medical monitors, industrial handheld terminals, and battery-backed IoT edge nodes requiring stable component supply across long production lifecycles.
Supply support for TLV7113318DDSET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader focused on analog and embedded processing technologies, with decades of expertise in power management IC design and manufacturing.
The TLV711 series targets portable electronics requiring ultra-low IQ, small footprint, and robust enable control - specifically engineered for battery-powered devices where reliability during power sequencing and standby efficiency are critical.
FAQ
What are the exact output voltages and tolerances of the TLV7113318DDSET?
The TLV7113318DDSET delivers precisely 3.3V on OUT1 and 1.8V on OUT2, each with ±2% DC accuracy over the full operating temperature range of –40°C to +125°C. This tolerance is guaranteed by TI's factory trimming and remains stable across line, load, and temperature variations - critical for powering voltage-sensitive interfaces like SDIO, SPI, and sensor analog blocks without additional margining.
Does the TLV7113318DDSET require external pull-down resistors on EN1 and EN2?
No - the TLV7113318DDSET integrates 150kΩ pull-down resistors on both EN1 and EN2 pins, ensuring reliable disable when the driving GPIO is high-impedance or unpowered. This eliminates the need for external components and prevents unintended regulator turn-on during system reset or sleep mode, a key differentiator from the TLV710-series variants.
What is the minimum output capacitance required for stability with the TLV7113318DDSET?
The TLV7113318DDSET is stable with an effective output capacitance of 0.1µF or greater, but TI recommends 1µF X5R/X7R ceramic capacitors (0402 or 0603) for optimal transient response and PSRR. The 0.1µF minimum accounts for dielectric derating under DC bias and temperature - using a nominal 0.1µF capacitor may result in insufficient effective capacitance and potential instability.
How does the TLV7113318DDSET handle reverse voltage conditions on OUT1 or OUT2?
The TLV7113318DDSET's PMOS pass transistors include inherent body diodes that conduct when OUT voltage exceeds IN. While not current-limited, this path allows safe reverse-bias operation - however, TI recommends limiting reverse current to ≤5% of rated output current (≤10mA) to avoid stress. No external blocking diodes are needed for typical battery-backup or hot-swap scenarios.
Can the TLV7113318DDSET be used with a 2.5V input to deliver 1.8V and 3.3V outputs?
No - the 3.3V output (OUT1) cannot be regulated from a 2.5V input due to dropout requirements. At 200mA load, TLV7113318DDSET requires ≥3.44V input for 3.3V output (140mV dropout). However, the 1.8V output (OUT2) will regulate correctly from 2.5V (70mV headroom required). For dual-rail operation, VIN must be ≥3.44V; otherwise, only OUT2 remains functional.
TLV7113318DDSET Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 6-WFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 3.3V, 1.8V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.2V @ 200mA, -
- Current - Output:
- 200mA
- Current - Quiescent (Iq):
- 110 µA
- Current - Supply (Max):
- -
- PSRR:
- 80dB ~ 50dB (10Hz ~ 100kHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Short Circuit, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WSON (1.5x1.5)
TLV7113318DDSET FAQ
1.How can I place an order for TLV7113318DDSET through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV7113318DDSET on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV7113318DDSET reliable?
The price and inventory of TLV7113318DDSET are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV7113318DDSET is usually 5 days.
3.What payment methods are accepted for TLV7113318DDSET?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLV7113318DDSET transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLV7113318DDSET?
TLV7113318DDSET orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLV7113318DDSET order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLV7113318DDSET?
For technical support, including TLV7113318DDSET datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV7113318DDSET requirements.
6.How does Aetrix verify that TLV7113318DDSET is sourced from the original manufacturer or authorized distributors?
All TLV7113318DDSET products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV7113318DDSET meets industry standards.
7.What is the process for return or replacement of TLV7113318DDSET?
All TLV7113318DDSET units undergo pre-shipment inspection (PSI). If there is an issue with TLV7113318DDSET, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV7113318DDSET part is unused and in its original packaging.
Return procedure for TLV7113318DDSET:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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