Texas Instruments TLV7113330DDSER

Overview

TLV7113330DDSER from Texas Instruments is a dual-channel, 200mA low-dropout linear regulator with fixed 3.3V and 3.0V outputs, 2% output accuracy over –40°C to +125°C, 150mV dropout at 200mA (VOUT = 3.3V), and 35µA quiescent current per channel - designed for power-sensitive portable devices including smartphones and handheld audio players.

For engineers reviewing the TLV7113330DDSER datasheet, TLV7113330DDSER pinout, TLV7113330DDSER application, or TLV7113330DDSER equivalent, key selection criteria include independent enable control per channel, active pulldown on both outputs, EN pin pull-down resistors for GPIO-safe disable, and stability with ≥0.1µF ceramic output capacitance.

Technical Context

The TLV7113330DDSER integrates two independent PMOS-based LDO regulators sharing a common input but featuring dedicated VREF and ground paths to minimize crosstalk. Each channel includes thermal shutdown, over-current protection, and undervoltage lockout (UVLO) at 1.9V.

It employs EN1/EN2 pins with internal pull-down resistors (TLV711-D series), ensuring reliable disable when driving signals are weak or three-stated - critical for processor GPIO interfacing during startup or sleep transitions.

Key Specifications

Pinout & Package

Package: 1.5mm × 1.5mm SON-6 (DSE), thermally enhanced, exposed pad.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-LDO regulator applications.

Compared with TPS7A203330PDBVR, TLV7113330DDSER offers 46% lower quiescent current and built-in EN pull-downs - critical for battery-powered systems with indeterminate enable states. Versus TPL7407LPGQ, it delivers true dual-rail regulation with dedicated analog-grade performance, not driver-integrated biasing.

Availability

TLV7113330DDSER is available at Aetrix Electronics and suitable for smartphone baseband power, portable audio codec supply, and wearable sensor hub designs requiring stable component supply, consistent parametric performance, and long-term production continuity.

Supply support for TLV7113330DDSER includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog and embedded processing solutions, with leadership in power management ICs for portable and industrial applications.

The TLV711 series belongs to TI's ultra-low-IQ dual-LDO product line, engineered specifically for battery-powered portable electronics where rail independence, sequencing control, and minimal standby current are essential.

FAQ

What are the exact output voltages and tolerance of the TLV7113330DDSER?

The TLV7113330DDSER provides precisely 3.3V on OUT1 and 3.0V on OUT2, each with ±2% DC accuracy across the full operating temperature range of –40°C to +125°C. This specification is guaranteed in production testing and applies under all load conditions up to 200mA per channel, making TLV7113330DDSER suitable for powering logic interfaces and analog circuits requiring tight voltage compliance.

Does the TLV7113330DDSER require external pull-down resistors on EN1 and EN2?

No - the TLV7113330DDSER is part of the TLV711-D series and includes internal pull-down resistors on both EN1 and EN2 pins. This design ensures the device remains disabled during power-up, reset, or when driven by high-impedance or three-stated GPIOs, eliminating the need for external components and improving system reliability. This feature is intrinsic to TLV7113330DDSER and confirmed in its ordering suffix "D".

What is the minimum output capacitance required for stability with the TLV7113330DDSER?

The TLV7113330DDSER is stable with an effective output capacitance of 0.1µF or greater - achievable with standard X5R/X7R ceramic capacitors in 0201 or 0402 packages. While 1µF is recommended for optimal transient response, the 0.1µF minimum enables ultra-compact layouts. The TLV7113330DDSER's internal compensation eliminates ESR dependency, unlike many legacy LDOs.

How does the active pulldown circuit function on TLV7113330DDSER outputs?

The TLV7113330DDSER incorporates active NMOS pulldown transistors on both OUT1 and OUT2. When either regulator is disabled via its EN pin, the corresponding pulldown rapidly discharges the connected load capacitance to GND - preventing floating nodes, unintended biasing of downstream ICs, or latch-up. This behavior is inherent to TLV7113330DDSER and distinguishes it from TLV710-series parts lacking this feature.

Can TLV7113330DDSER operate with an input voltage below 3.3V?

Yes - TLV7113330DDSER supports input voltages from 2.0V to 5.5V. For the 3.3V output, operation is possible down to VIN = VOUT + VDO ≈ 3.45V at 200mA (150mV dropout). At lighter loads, dropout decreases - e.g., 75mV at 100mA allows operation from 3.375V. The 3.0V output similarly functions from as low as ~3.15V at full load. This flexibility makes TLV7113330DDSER viable across varied battery and intermediate rail conditions.