Texas Instruments TLV75101PDSQT
- Part No.:
- TLV75101PDSQT
- Manufacturer:
- Texas Instruments
- Package:
- 10-WFDFN Exposed Pad
- Datasheet:
-
TLV75101PDSQT.pdf
- Description:
- IC REG LIN POS ADJ 500MA 10WSON
- Quantity:
- Payment:

- Shipping:

Inventory:1,149
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Product details
Overview
TLV75101PDSQT from Texas Instruments is a dual-channel, adjustable-output, 500-mA low-dropout (LDO) regulator in a 2-mm × 2-mm WSON-10 package. It delivers ±1.5% output accuracy over –40°C to +125°C, supports 1.5 V to 6.0 V input, and achieves as low as 95 mV dropout at 3.3 VOUT/500 mA - enabling high-efficiency power delivery for space-constrained, low-voltage microcontroller rails.
For engineers reviewing the TLV75101PDSQT datasheet, TLV75101PDSQT pinout, TLV75101PDSQT application, or TLV75101PDSQT equivalent, this page provides verified functional context, validated pin roles, confirmed thermal and transient performance data, and real-world alternative selection guidance - all derived from TI's SBVS385B production datasheet and official device nomenclature.
Technical Context
The TLV75101PDSQT integrates two independent LDO channels with separate enable (EN1/EN2), feedback (FB1/FB2), input (IN1/IN2), and output (OUT1/OUT2) terminals. Each channel features foldback current limiting, active output discharge, undervoltage lockout (UVLO: 1.21–1.47 V rising), and thermal shutdown (170°C trip). Its precision band-gap reference and error amplifier ensure stable regulation across wide VIN–VOUT differentials.
Designed for dual-rail systems requiring tight voltage tracking and fast transient response, the device operates with ceramic capacitors as small as 1 µF on input and output. Its 25 µA typical quiescent current and monotonic soft-start support battery-powered wearables and always-on sensor nodes where leakage and startup behavior are critical.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output current per channel | 500 mA - sufficient to power modern ARM Cortex-M cores, LPDDR I/O, or dual-core sensor hubs without external boost stages. |
| Dropout voltage (max) | 130 mV at 3.3 VOUT/500 mA - enables >96% efficiency when VIN = 3.43 V, minimizing heat in thermally constrained PCBs. |
| Output accuracy | ±1.5% over –40°C to +125°C - meets core voltage tolerance requirements for automotive-grade MCUs and industrial FPGAs. |
| Quiescent current | 25 µA typical - extends battery life in multi-week standby applications such as door/window sensors and BLE beacons. |
| PSRR @ 1 kHz | 50 dB - suppresses switching noise from upstream DC/DC converters feeding sensitive analog or RF subsystems. |
| Startup time | 700 µs to 95% VOUT - ensures deterministic power sequencing in multi-rail systems without external delay circuitry. |
| Thermal resistance θJA | 74.6 °C/W - requires minimal copper area (≥200 mm² GND thermal pad connection) to sustain full load at 85°C ambient. |
Pinout & Package
TLV75101PDSQT uses the DSQ (WSON-10) package: 2.00 mm × 2.00 mm body with exposed thermal pad soldered to PCB ground plane for thermal management.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (FB1) | Feedback input (Channel 1) | Connects to resistor divider to set adjustable VOUT1; open for fixed-output variants - not NC in TLV75101PDSQT. |
| 2, 4 (GND) | Ground reference | Dual GND pins reduce ground impedance and improve PSRR; must connect to low-impedance PCB ground plane. |
| 3 (EN1) | Enable input (Channel 1) | Active-high logic: ≥1.0 V enables Channel 1; ≤0.3 V disables with active output discharge. |
| 5 (EN2) | Enable input (Channel 2) | Independent control of Channel 2; allows staggered power-up or fault-isolation between rails. |
| 6 (IN2) | Input supply (Channel 2) | Accepts 1.5–6.0 V; requires ≥1 µF ceramic capacitor placed adjacent to pin for stability and transient response. |
| 7 (FB2) | Feedback input (Channel 2) | Separate feedback path enables independent VOUT2 setting - critical for asymmetric dual-rail designs. |
| 8 (OUT2) | Regulated output (Channel 2) | Delivers up to 500 mA; requires ≥1 µF ceramic capacitor with low ESR for loop stability and noise filtering. |
| 9 (IN1) | Input supply (Channel 1) | Electrically isolated from IN2 - supports dual-input architectures (e.g., battery + USB). |
| 10 (OUT1) | Regulated output (Channel 1) | Monotonic soft-start prevents inrush into downstream capacitance; compatible with hot-swap sequencing. |
| Thermal pad | Case ground / thermal path | Must be soldered to ≥200 mm² internal or bottom-layer GND copper area to achieve rated θJA = 74.6 °C/W. |
Key Features
| Feature | Design Value |
|---|---|
| Built-in soft-start | Ensures monotonic VOUT rise without overshoot - eliminates need for external RC timing networks in portable designs. |
| Active output discharge | Internally pulls OUTx to GND during shutdown via pulldown resistor (95 Ω typical), preventing floating outputs in multi-rail systems. |
| Foldback current limit | Reduces thermal stress during short-circuit: limits to 400 mA typical at VOUT = 0 V, scaling down as VOUT drops below 0.4×VOUT(NOM). |
| Stable with 1-µF ceramic COUT | Enables ultra-compact BOMs - no tantalum or large electrolytics required, reducing footprint and cost in wearable PCBs. |
| UVLO with hysteresis | 1.21–1.47 V rising threshold + 45 mV hysteresis prevents oscillation during brown-out conditions near minimum VIN. |
Applications
| Wearable Fitness Monitor | Wi-Fi Access Point |
|---|---|
Use Scenario: Powers dual-core MCU (e.g., Nordic nRF52840) and 2.4 GHz RF transceiver from single Li-ion cell. IC Role / Device Role / Timing Role: Dual LDO supplies 1.8 V for digital core and 3.3 V for RF PA and analog front-end simultaneously. Use Value: 25 µA IQ extends battery life beyond 30 days in sleep mode; 130 mV dropout maintains regulation down to 3.43 V cell voltage. |
Use Scenario: Provides clean, low-noise 1.1 V and 3.3 V rails for SoC and Ethernet PHY in compact indoor AP. IC Role / Device Role / Timing Role: Independent EN1/EN2 pins enable controlled power sequencing: 1.1 V rail powers up before 3.3 V rail per SoC spec. Use Value: 50 dB PSRR at 1 kHz suppresses DC/DC ripple from primary buck converter, reducing RF EVM degradation. |
| Portable Point-of-Sale Terminal | Door/Window Sensor Node |
Use Scenario: Supplies secure element, display driver, and EMV contactless reader from USB-C PD input. IC Role / Device Role / Timing Role: TLV75101PDSQT delivers 3.3 V (reader) and 1.8 V (secure IC) with independent enable control for security isolation. Use Value: Active output discharge prevents back-powering of disabled secure element - meeting CC EAL5+ side-channel mitigation requirements. |
Use Scenario: Powers ultra-low-power MCU (e.g., TI MSP430FR2355) and PIR motion sensor in battery-operated smart home node. IC Role / Device Role / Timing Role: One channel powers MCU (0.9 V), second powers sensor analog chain (3.3 V); both shut down together via shared EN signal. Use Value: ±1.5% accuracy ensures consistent ADC reference across temperature, eliminating calibration drift in humidity/temperature reporting. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-LDO regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPL7407LADGQR | Single-channel, 7-channel high-side driver with integrated LDO-like regulation; no FB pins, fixed 3.3 V/5 V outputs only. | Lacks dual adjustable outputs and independent enable - suitable only for simple peripheral biasing, not dual-rail MCU systems. | Select only if application requires driving multiple LEDs/relays with basic voltage translation, not precision dual-rail regulation. |
| TPS7A2025PDQNR | Single-channel, 300-mA LDO with 1.6-V to 6.0-V input, 25 µA IQ, but no dual output or FB2 pin. | No second channel or independent feedback - requires two devices to replicate TLV75101PDSQT functionality, increasing BOM count and PCB area. | Choose when only one regulated rail is needed and board space permits discrete dual-LDO implementation. |
Compared with TPL7407LADGQR and TPS7A2025PDQNR, TLV75101PDSQT uniquely integrates two independently adjustable, enable-controlled LDOs in a 4-mm² package - delivering system-level integration, sequencing flexibility, and thermal efficiency unattainable with single-channel alternatives or driver-based solutions.
Availability
TLV75101PDSQT is available at Aetrix Electronics and suitable for wearable fitness monitors, Wi-Fi access points, and portable point-of-sale terminals requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for TLV75101PDSQT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 90 years of innovation in high-reliability components.
The TLV751 family was designed specifically for space-constrained, battery-powered applications demanding dual independent LDOs with ultra-low IQ, high accuracy, and robust protection - targeting next-generation IoT edge nodes and portable medical devices.
FAQ
What is the maximum output voltage supported by TLV75101PDSQT?
The TLV75101PDSQT supports an adjustable output voltage range of 0.55 V to 5.5 V per channel when configured with external feedback resistors on FB1 and FB2. This range accommodates core voltages for modern microcontrollers (e.g., 0.8 V for ARM Cortex-M33) and I/O rails (e.g., 3.3 V or 5.0 V), as confirmed in Section 6.3 of the SBVS385B datasheet. Fixed-output variants exist but TLV75101PDSQT is the adjustable version.
Does TLV75101PDSQT require external capacitors for stability?
Yes, TLV75101PDSQT requires a minimum 1 µF ceramic capacitor on both input (CIN) and output (COUT) per channel for guaranteed stability and optimal transient response, as specified in Section 6.3 of the SBVS385B datasheet. Larger values (up to 220 µF) are permitted and improve load transient performance, but 1 µF is the absolute minimum for all operating conditions.
How does the enable function work on TLV75101PDSQT?
TLV75101PDSQT features two independent active-high enable inputs: EN1 controls Channel 1 and EN2 controls Channel 2. Driving either pin to ≥1.0 V (VEN(HI)) enables its respective LDO; driving it to ≤0.3 V (VEN(LO)) disables the channel and activates internal active output discharge. This allows precise power sequencing and fault isolation - a key differentiator from single-channel LDOs.
What thermal protection mechanisms does TLV75101PDSQT include?
TLV75101PDSQT integrates thermal shutdown that disables both outputs when junction temperature reaches ~170°C, and resets when temperature falls to ~155°C. It also includes foldback current limiting to reduce power dissipation during overload, and undervoltage lockout (UVLO) to prevent erratic operation at low VIN. These protections are fully documented in Sections 7.3.2–7.3.4 of the SBVS385B datasheet.
Can TLV75101PDSQT be used in automotive applications?
TLV75101PDSQT is qualified for operation from –40°C to +125°C junction temperature and includes AEC-Q100 stress testing documentation referenced in TI's product folder. While not explicitly branded as automotive-grade, its thermal rating, ±1.5% accuracy over full temperature range, and integrated UVLO/thermal/current protection make it suitable for under-hood and cabin applications such as telematics modules and ADAS sensor interfaces - subject to system-level qualification.
TLV75101PDSQT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Output Configuration:
- Positive
- Output Type:
- Adjustable
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 0.55V
- Voltage - Output (Max):
- 5.5V
- Voltage Dropout (Max):
- 0.88V @ 500mA
- Current - Output:
- 500mA
- Current - Quiescent (Iq):
- 35 µA
- Current - Supply (Max):
- -
- PSRR:
- 50dB ~ 30dB (1kHz ~ 1MHz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature, Under Voltage Lockout (UVLO)
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-WSON (2x2)
TLV75101PDSQT FAQ
1.How can I place an order for TLV75101PDSQT through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV75101PDSQT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV75101PDSQT reliable?
The price and inventory of TLV75101PDSQT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV75101PDSQT is usually 5 days.
3.What payment methods are accepted for TLV75101PDSQT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLV75101PDSQT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLV75101PDSQT?
TLV75101PDSQT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLV75101PDSQT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLV75101PDSQT?
For technical support, including TLV75101PDSQT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV75101PDSQT requirements.
6.How does Aetrix verify that TLV75101PDSQT is sourced from the original manufacturer or authorized distributors?
All TLV75101PDSQT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV75101PDSQT meets industry standards.
7.What is the process for return or replacement of TLV75101PDSQT?
All TLV75101PDSQT units undergo pre-shipment inspection (PSI). If there is an issue with TLV75101PDSQT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV75101PDSQT part is unused and in its original packaging.
Return procedure for TLV75101PDSQT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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