Texas Instruments TLV75509PDYDR

Overview

TLV75509PDYDR from Texas Instruments is a 500mA, low-quiescent-current (25μA typ), fixed 0.9V output LDO regulator in thermally enhanced SOT-23-5 (DYD) package with 60.3°C/W R_θJA. It operates from 1.45V to 5.5V input, delivers 1% output accuracy at 85°C, and features active output discharge, foldback current limit, and soft-start - ideal for powering ultra-low-voltage MCU cores in space-constrained portable devices.

For engineers reviewing the TLV75509PDYDR datasheet, TLV75509PDYDR pinout, TLV75509PDYDR application, or TLV75509PDYDR equivalent, key selection criteria include dropout voltage at 500mA (238mV max @ 3.3V_OUT, scaled per V_OUT), thermal performance of the DYD package, stability with ≥1µF ceramic output capacitor, and enable logic thresholds (V_HI = 1V, V_LO = 0.3V).

Technical Context

The TLV75509PDYDR uses a PMOS pass transistor architecture enabling low dropout and high PSRR (46dB @ 100kHz). Its internal bandgap reference and error amplifier deliver ±1% output accuracy across –40°C to +85°C, with undervoltage lockout (UVLO) activating at 1.21–1.44V and hysteresis of 40mV.

Functional modes include normal regulation (VIN ≥ V_OUT + V_DO, EN > V_HI), dropout (VIN < V_OUT + V_DO), and disabled state (EN < V_LO), where an internal 120Ω pulldown actively discharges the output. Thermal shutdown triggers at 165°C with 10°C hysteresis.

Key Specifications

Pinout & Package

SOT-23-5 package with exposed thermal pad (DYD variant); 2.9mm × 2.8mm footprint; thermal pad internally connected to GND and must be soldered to large-area ground plane for optimal thermal performance (R_θJA = 60.3°C/W on EVM).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO regulator applications.

Compared with TPS7A0509PDBVR and TPL7407LPGQDGKR, TLV75509PDYDR uniquely combines 500mA output, active output discharge, foldback current limiting, and 60.3°C/W thermal resistance in a 0.9V fixed-output SOT-23-5 package - making it the only validated solution for space-constrained, high-reliability 0.9V MCU core regulation demanding full fault coverage.

Availability

TLV75509PDYDR is available at Aetrix Electronics and suitable for portable medical sensors, wearable MCU power rails, industrial edge node controllers, and camera module bias supplies requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for TLV75509PDYDR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader designing analog ICs, embedded processors, and connectivity solutions for industrial, automotive, and consumer markets.

The TLV755P series was developed to address demand for ultra-small, low-I_Q LDOs supporting sub-1V MCU core voltages in battery-powered and thermally constrained applications - with emphasis on minimal solution size, robust fault protection, and wide input compatibility.

FAQ

What is the maximum input voltage rating for TLV75509PDYDR?

The absolute maximum input voltage for TLV75509PDYDR is 6.0V, but recommended operating range is 1.45V to 5.5V. Exceeding 6.0V risks permanent damage per Absolute Maximum Ratings. For reliable operation, maintain VIN ≤ 5.5V - especially critical when using higher-voltage batteries or unregulated supplies.

Does TLV75509PDYDR require an external pull-up resistor on the EN pin?

No, TLV75509PDYDR does not require an external pull-up on EN. The device has no internal pull-up; however, EN is CMOS-compatible with 10nA leakage. To ensure reliable enable/disable behavior, drive EN directly from a GPIO or logic buffer - tying EN to VIN is acceptable if shutdown is unnecessary, but avoid floating EN.

Can TLV75509PDYDR operate with a 0.47µF output capacitor?

TLV75509PDYDR is specified stable with ≥1µF ceramic output capacitance. While 0.47µF may work in some cases, TI's datasheet mandates ≥1µF for guaranteed stability across temperature, load, and process variation. Using 0.47µF risks oscillation or poor transient response - always use ≥1µF X5R/X7R ceramic capacitor.

What is the thermal pad connection requirement for TLV75509PDYDR?

The thermal pad of TLV75509PDYDR is internally connected to GND and must be soldered to a large-area PCB ground plane. This connection is mandatory to achieve the specified 60.3°C/W R_θJA. Omitting thermal pad soldering degrades thermal performance significantly - potentially causing thermal shutdown at <300mA load.

How does the foldback current limit behave during a short circuit on TLV75509PDYDR?

During output short, TLV75509PDYDR limits current to ~355mA (ISC) and enters foldback mode - reducing current further as V_OUT drops below 0.4×0.9V. This protects the PMOS pass element and reduces power dissipation. If thermal shutdown triggers (165°C), the device cycles off/on until fault is cleared - confirming TLV75509PDYDR's fault resilience.