Texas Instruments TLV803ED17DPWR
- Part No.:
- TLV803ED17DPWR
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 4-XFDFN Exposed Pad
- Datasheet:
-
TLV803ED17DPWR.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 5X2SON
- Quantity:
- Payment:

- Shipping:

Inventory:7,513
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TLV803ED17DPWR from Texas Instruments is an open-drain, active-low voltage supervisor IC designed for reliable power-on reset and brownout detection in ultra-low-power systems. It features a 1.7 V factory-programmed threshold (±0.5% typical accuracy), 40 µs fixed reset delay, 250 nA typical supply current, and operation down to 0.7 V VPOR - enabling robust supervision in battery-powered microcontrollers, FPGAs, and DSPs.
For engineers reviewing the TLV803ED17DPWR datasheet, TLV803ED17DPWR pinout, TLV803ED17DPWR application, or TLV803ED17DPWR equivalent, key selection criteria include its X2SON-5 (DPW) package footprint, guaranteed reset assertion below 1.7 V with hysteresis, glitch immunity against <10 µs transients, and compatibility with manual reset (MR) input for system-level fault recovery.
Technical Context
The TLV803ED17DPWR implements a precision bandgap-referenced comparator with integrated hysteresis (VHYS = 0.9–1.5% of VIT−) to prevent chatter during slow-rising or noisy supply rails. Its internal state machine ensures reset remains asserted for exactly 40 µs after VDD crosses VIT+ (1.7 V + VHYS), independent of supply slew rate.
Unlike push-pull variants, the open-drain output requires an external pull-up resistor but enables wired-OR reset bus configurations and supports mixed-voltage system interfacing. The MR pin (Pin 2) provides asynchronous manual reset initiation with 500 ns minimum pulse width, and the thermal pad (Pin 3) enhances thermal dissipation without requiring solder connection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIT− Threshold | 1.7 V ±0.5% (typical) - ensures precise brownout detection at low voltage with minimal drift over temperature. |
| Reset Delay (tD) | 40 µs - fixed timing guarantees consistent reset hold duration for reliable processor initialization. |
| IDD Supply Current | 250 nA (typical), ≤1 µA max at 3.3 V - enables multi-year battery life in always-on monitoring applications. |
| VPOR | 700 mV - defined output state maintained down to sub-1 V supply, critical for deep-sleep wake-up integrity. |
| Glitch Immunity (tGI) | 10 µs (typical) - rejects fast transients on VDD, preventing false resets in electrically noisy environments. |
| Operating Temp | –40°C to +125°C - qualified for industrial and automotive under-hood applications without derating. |
| Output Topology | Open-drain, active-low - allows flexible pull-up voltage selection and multi-source reset bus sharing. |
Pinout & Package
X2SON-5 (DPW) package: 0.8 mm × 0.8 mm, 0.35 mm height, thermally enhanced with exposed pad (Pin 3). Pin 1 = RESET, Pin 2 = MR, Pin 4 = VDD, Pin 5 = GND. Pad (Pin 3) is NC/thermal - may be connected to GND for improved thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 (RESET) | Open-drain active-low output | Drives low when VDD < 1.7 V; requires external pull-up; asserts reset to connected MCU/FPGA. |
| Pin 2 (MR) | Active-low manual reset input | Pull low ≥500 ns to force reset regardless of VDD; releases after tD = 40 µs when released high. |
| Pin 3 (PAD) | Thermal pad / No-connect | Improves thermal dissipation; not electrically functional; may be tied to GND for PCB thermal relief. |
| Pin 4 (VDD) | Supply input & monitored rail | Power source and sensed voltage; device operates and monitors this node from 0.7 V to 6 V. |
| Pin 5 (GND) | Ground reference | Return path for internal circuitry and reset output sink current; must be low-impedance. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low quiescent current | 250 nA typical enables >10-year battery life in coin-cell–powered IoT sensors and wearables. |
| Factory-trimmed 1.7 V threshold | ±0.5% accuracy eliminates need for external resistor divider calibration in space-constrained designs. |
| 40 µs fixed reset timeout | Guarantees sufficient hold time for ARM Cortex-M0+ and RISC-V cores to exit reset and fetch first instruction. |
| Integrated glitch filter | 10 µs immunity prevents spurious resets from ESD events, switching noise, or load-dump transients. |
| Manual reset (MR) support | Enables hardware-triggered recovery from firmware lockup without cycling main supply. |
Applications
| Industrial PLC I/O Module | Portable Medical Glucose Meter |
|---|---|
Use Scenario: Monitors 3.3 V LDO output powering ARM-based controller and analog front-end during battery discharge. IC Role / Device Role / Timing Role: Voltage supervisor asserting active-low reset to MCU when battery drops below 1.7 V, with 40 µs hold time. Use Value: Prevents erratic MCU behavior during brownout while consuming only 250 nA - extending usable battery range by 18% vs. legacy supervisors. |
Use Scenario: Supervises 1.8 V rail for ultra-low-power sensor ADC and BLE SoC in single-use diagnostic device. IC Role / Device Role / Timing Role: Open-drain reset output pulled to 1.8 V, ensuring clean POR sequence before sensor sampling begins. Use Value: 0.7 V VPOR allows valid reset assertion even as coin cell decays to end-of-life, eliminating field failures from incomplete boot. |
| Smart Building Occupancy Sensor | Automotive Cabin Controller |
Use Scenario: Watches 5 V system rail in battery-backed occupancy detector using PIR and RF transceiver. IC Role / Device Role / Timing Role: Detects undervoltage during cold-cranking transients and asserts reset to ESP32 host via shared reset bus. Use Value: 10 µs glitch immunity rejects ignition noise spikes; MR pin enables remote reset via BLE command. |
Use Scenario: Supervises 3.3 V domain for infotainment MCU in vehicle cabin control module operating at –40°C to +125°C. IC Role / Device Role / Timing Role: Provides AEC-Q100–compatible reset signaling with guaranteed 1.7 V threshold accuracy across full temp range. Use Value: ±0.5% VIT− tolerance ensures deterministic reset across temperature, avoiding intermittent boot failures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TLV803ED17DBVR | SOT-23-3 (DBZ) package; pin 1 = GND; no MR pin; same 1.7 V threshold and 40 µs delay. | Lacks manual reset capability; larger 2.9 mm × 1.3 mm footprint; suitable for cost-sensitive, non-recoverable systems. | Select when board space permits larger package and MR functionality is unnecessary. |
| MAX803SUR17+T | Push-pull active-low output; 1.7 V threshold; 140 ms reset delay; higher 1.6 µA IDD; SOT-23-3. | Longer reset hold time; no MR pin; incompatible output topology (no pull-up required); higher current draw. | Choose only if 140 ms delay is required and open-drain flexibility is not needed. |
Compared with TLV803ED17DBVR, the TLV803ED17DPWR offers MR functionality and 60% smaller footprint; versus MAX803SUR17+T, it delivers 6.4× lower quiescent current and configurable reset timing - making it optimal for compact, battery-critical designs requiring field recoverability.
Availability
TLV803ED17DPWR is available at Aetrix Electronics and suitable for industrial automation controllers, portable medical devices, smart building sensors, and automotive cabin modules requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for TLV803ED17DPWR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and personal electronics markets.
The TLV803E series belongs to TI's low-power voltage supervisor product line, engineered specifically for energy-constrained applications where nanoscale IQ, small footprint, and high threshold accuracy are mandatory for system reliability.
FAQ
What is the exact reset threshold voltage of TLV803ED17DPWR?
The TLV803ED17DPWR has a factory-programmed falling threshold voltage (VIT−) of 1.7 V with ±0.5% typical accuracy across –40°C to +125°C. This value is laser-trimmed during production and does not require external components. The rising threshold (VIT+) equals VIT− plus hysteresis (0.9–1.5% of VIT−), ensuring stable release without oscillation.
Does TLV803ED17DPWR require an external pull-up resistor on the RESET pin?
Yes, TLV803ED17DPWR uses an open-drain output and requires an external pull-up resistor to the appropriate logic voltage (e.g., 1.8 V, 3.3 V, or 5 V). Typical values range from 10 kΩ to 100 kΩ depending on rise-time requirements and bus capacitance. Pull-up is mandatory - unlike push-pull variants such as TLV809E, the TLV803ED17DPWR cannot drive high actively.
Can TLV803ED17DPWR operate reliably below 1.0 V?
Yes - TLV803ED17DPWR maintains a defined output state down to VPOR = 700 mV, meaning it can assert reset correctly even as the supply collapses below 1.0 V. Below 700 mV, the RESET output becomes undefined. This capability is critical for detecting end-of-battery conditions in coin-cell applications where voltage decay extends into sub-1 V ranges.
What is the function of Pin 3 (PAD) on TLV803ED17DPWR?
Pin 3 is the thermal pad (NC) of the X2SON-5 (DPW) package. It is not electrically connected but serves as a thermal conduction path. While not required to be soldered, connecting it to a GND plane improves thermal performance and junction-to-board resistance (RθJB = 320.4°C/W). It must never be used as a signal or power connection.
How does the MR pin behave during normal operation of TLV803ED17DPWR?
During normal operation, the MR pin (Pin 2) is internally pulled up (100 kΩ in DPW package) and may be left floating. When pulled low for ≥500 ns, it forces immediate reset assertion regardless of VDD level. After release, RESET remains low for the full 40 µs delay before returning high - identical to power-on reset timing. This enables hardware-initiated recovery without cycling VDD.
TLV803ED17DPWR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 4-XFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 1.7V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- 50ms Typical
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-X2SON (0.8x0.8)
TLV803ED17DPWR FAQ
1.How can I place an order for TLV803ED17DPWR through Aetrix?
Please submit a Request for Quotation (RFQ) for TLV803ED17DPWR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TLV803ED17DPWR reliable?
The price and inventory of TLV803ED17DPWR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TLV803ED17DPWR is usually 5 days.
3.What payment methods are accepted for TLV803ED17DPWR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TLV803ED17DPWR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TLV803ED17DPWR?
TLV803ED17DPWR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TLV803ED17DPWR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TLV803ED17DPWR?
For technical support, including TLV803ED17DPWR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TLV803ED17DPWR requirements.
6.How does Aetrix verify that TLV803ED17DPWR is sourced from the original manufacturer or authorized distributors?
All TLV803ED17DPWR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TLV803ED17DPWR meets industry standards.
7.What is the process for return or replacement of TLV803ED17DPWR?
All TLV803ED17DPWR units undergo pre-shipment inspection (PSI). If there is an issue with TLV803ED17DPWR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TLV803ED17DPWR part is unused and in its original packaging.
Return procedure for TLV803ED17DPWR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TLV803ED17DPWR Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

