Texas Instruments TM4C1231H6PGEI7R
- Part No.:
- TM4C1231H6PGEI7R
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
TM4C1231H6PGEI7R.pdf
- Description:
- IC MCU 32BIT 256KB FLASH 144LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,526
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TM4C1231H6PGEI7R from Texas Instruments is an ARM Cortex-M4F-based microcontroller with 256 KB Flash, 32 KB SRAM, and integrated USB 2.0 OTG, 12-bit ADC (1MSPS), and multiple PWM-capable timers. It operates at up to 80 MHz and supports -40°C to +105°C industrial temperature range in a 144-pin LQFP package. It is used in motor control, industrial automation, and smart sensor nodes requiring deterministic real-time response and on-chip connectivity.
For engineers reviewing the TM4C1231H6PGEI7R datasheet, TM4C1231H6PGEI7R pinout, TM4C1231H6PGEI7R application, or TM4C1231H6PGEI7R equivalent, key selection criteria include its integrated USB PHY, hibernation module with RTC and battery-backed memory, dual 16-bit general-purpose timers with PWM output, 12-channel μDMA controller, and support for TivaWare™ software stack and TI's Code Composer Studio™ IDE.
Technical Context
The TM4C1231H6PGEI7R implements the ARMv7E-M architecture with hardware floating-point unit (FPU), memory protection unit (MPU), and nested vectored interrupt controller (NVIC). It integrates a dedicated hibernation module with RTC, battery-backed RAM, and wake-on-external-event capability - enabling ultra-low-power operation down to 1.7 µA in hibernate mode with RTC active.
Its analog subsystem includes two independent 12-bit ADCs (each with eight sample sequencers and hardware averaging), internal temperature sensor, and digital comparators. Serial interfaces include four UARTs (one with ISO 7816 and SIR support), two I²C modules, two SPI controllers, and one USB 2.0 OTG controller with integrated PHY.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M4F @ 80 MHz with FPU and MPU - enables real-time signal processing and deterministic task scheduling. |
| Memory | 256 KB Flash + 32 KB SRAM + 2 KB EEPROM - sufficient for firmware, data logging, and nonvolatile configuration storage. |
| ADC | Two 12-bit, 1 MSPS ADCs with 16-channel input multiplexing and hardware averaging - supports high-fidelity sensor acquisition in noisy environments. |
| USB | USB 2.0 OTG with integrated PHY - eliminates need for external transceiver; supports device/host/OTG roles without external components. |
| Timers | Two 64-bit wide timer blocks (each with two 32-bit timers), plus watchdog and hibernation RTC - enables precise PWM generation, input capture, and low-power timekeeping. |
| Low-Power Modes | Hibernate (1.7 µA), Deep Sleep (12 µA), Sleep (60 µA) - enables battery-powered operation for months with periodic wake-up via RTC or GPIO. |
| Package | 144-pin LQFP (20 × 20 mm, 0.5 mm pitch) - compatible with standard PCB assembly processes and offers full peripheral pin access. |
Pinout & Package
TM4C1231H6PGEI7R is housed in a 144-pin LQFP package with exposed thermal pad. Pin functions are defined per TI SPMS338E datasheet Rev E (June 2014), supporting full GPIO remapping, peripheral sharing, and JTAG/SWD debug interface.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDC | Power supply inputs | Dedicated domains for digital core (VDDC), analog (VDDA), and I/O (VDD) - enable noise isolation and mixed-signal integrity. |
| GND, GNDA, GNDC | Ground returns | Separate analog/digital/thermal ground pins - reduce coupling between sensitive analog circuits and switching digital loads. |
| USB0VBUS, USB0ID, USB0DM, USB0DP | USB 2.0 OTG interface | Integrated PHY requires only external ESD protection - no external transceiver needed for USB device or host operation. |
| HIB, RTCCLK, HIBRTCA, HIBRTCB | Hibernation module interface | Supports external crystal (32.768 kHz) and battery backup - enables RTC operation and wake-up during deep power-down. |
| PD0–PD7, PE0–PE5, PF0–PF4 | GPIO with alternate functions | Configurable as UART/I²C/SPI/ADC triggers/PWM outputs - allows flexible peripheral routing without board redesign. |
Key Features
| Feature | Design Value |
|---|---|
| Hibernation Module with RTC & Battery-Backed RAM | Enables sub-2 µA sleep current with timekeeping and 2 KB of retained memory - ideal for energy-harvesting and battery-critical applications. |
| USB 2.0 OTG with Integrated PHY | Reduces BOM count by eliminating external transceiver; supports CDC, HID, and mass storage classes out-of-box with TivaWare™. |
| Dual 12-Bit ADCs with Hardware Averaging | Each ADC supports up to 8 sample sequencers and 64-sample hardware averaging - improves SNR without CPU overhead. |
| μDMA Controller (32 Channels) | Offloads CPU from memory-peripheral transfers; supports scatter-gather and ping-pong buffering - essential for high-throughput sensor or communication tasks. |
| ARM Cortex-M4F Core with FPU | Hardware single-precision floating-point execution accelerates motor control algorithms, FFTs, and sensor fusion - avoids software emulation latency. |
Applications
| Industrial Motor Control | Smart Sensor Node |
|---|---|
Use Scenario: Closed-loop BLDC motor control in factory automation systems with position feedback, current sensing, and thermal monitoring. IC Role / Device Role / Timing Role: Real-time execution of field-oriented control (FOC) algorithm, PWM generation, ADC sampling synchronization, and fault detection. Use Value: Deterministic 80 MHz Cortex-M4F execution with hardware FPU and dual 16-bit timers ensures <1 µs jitter in PWM edge placement and sub-100 ns ADC trigger alignment. |
Use Scenario: Wireless environmental monitor deployed in remote locations with solar charging and LoRaWAN backhaul. IC Role / Device Role / Timing Role: Sensor aggregation (temp/humidity/pressure), low-power scheduling, RTC-triggered wake-up, and USB/UART firmware updates. Use Value: Hibernate mode draws only 1.7 µA while maintaining RTC and 2 KB battery-backed RAM - extends battery life to >12 months on coin-cell backup. |
| Programmable Logic Controller (PLC) I/O Module | USB Human Interface Device (HID) |
Use Scenario: DIN-rail mounted I/O expansion module with isolated digital inputs, relay outputs, and Modbus RTU over RS-485. IC Role / Device Role / Timing Role: Protocol stack execution (Modbus), GPIO state scanning, timer-based debounce, and UART-to-SPI bridge for isolated peripherals. Use Value: Four UARTs (including one with ISO 7816 and modem handshake) and configurable GPIO allow direct RS-485 transceiver control and multi-drop bus timing compliance. |
Use Scenario: Industrial keyboard or diagnostic tool with USB plug-and-play connectivity and firmware update capability. IC Role / Device Role / Timing Role: USB device controller implementing HID class, button matrix scanning, LED status indication, and flash-based firmware storage. Use Value: Integrated USB PHY and 256 KB Flash support full HID descriptor handling, descriptor customization, and secure firmware updates without external memory. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TM4C123GH6PM | Same Cortex-M4F core, but 256 KB Flash, 32 KB SRAM, and 64-pin LQFP package - lacks USB OTG PHY and hibernation module. | Suitable for space-constrained designs where USB and ultra-low-power hibernate are not required. | Select when board area is critical and USB/host functionality is handled externally. |
| STM32F407VGT6 | ARM Cortex-M4F @ 168 MHz, 1 MB Flash, 192 KB SRAM, no integrated USB PHY - requires external transceiver; no hibernation module. | Better suited for high-throughput applications (e.g., audio streaming) but lacks TI's hibernation power profile and USB integration. | Choose when higher clock speed and larger memory are prioritized over lowest hibernate current and USB BOM simplification. |
Compared with TM4C1231H6PGEI7R, TM4C123GH6PM trades USB/hibernation for smaller footprint, while STM32F407VGT6 offers higher performance but increases system-level complexity and power in low-duty-cycle applications.
Availability
TM4C1231H6PGEI7R is available at Aetrix Electronics and suitable for industrial motor control, smart sensor nodes, PLC I/O modules, and USB HID devices requiring stable component supply across extended product lifecycles.
Supply support for TM4C1231H6PGEI7R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog, embedded processing, and wireless technologies since 1930.
The TM4C1231H6PGEI7R belongs to TI's Tiva™ C Series - designed specifically for cost-sensitive, real-time industrial and consumer applications requiring integrated connectivity, low-power operation, and robust peripheral sets.
FAQ
What is the maximum operating frequency of the TM4C1231H6PGEI7R?
The TM4C1231H6PGEI7R operates at a maximum system clock frequency of 80 MHz, derived from an internal PLL that can be configured using the system control registers. This frequency applies to the ARM Cortex-M4F core, bus matrix, and all on-chip peripherals unless individually gated. The TM4C1231H6PGEI7R maintains this speed across its full industrial temperature range (-40°C to +105°C) when supplied with 3.3 V ±5%.
Does the TM4C1231H6PGEI7R include an integrated USB physical layer (PHY)?
Yes, the TM4C1231H6PGEI7R integrates a full-speed USB 2.0 OTG physical layer, including differential transceivers, pull-up/pull-down resistors, and voltage regulators for VBUS sensing. This eliminates the need for an external USB transceiver in most device-mode applications and supports host, device, and OTG roles directly from the TM4C1231H6PGEI7R die.
What low-power modes does the TM4C1231H6PGEI7R support, and what is the lowest current draw?
The TM4C1231H6PGEI7R supports Sleep, Deep-Sleep, and Hibernate modes. In Hibernate mode with RTC enabled and battery-backed RAM active, it draws just 1.7 µA typical from the VBAT supply. This mode retains register state, RTC time, and 2 KB of memory while disabling all clocks except the 32.768 kHz hibernation oscillator - verified per TI SPMS338E datasheet Section 7.3.7.
How many ADC channels and sample rates does the TM4C1231H6PGEI7R support?
The TM4C1231H6PGEI7R features two independent 12-bit analog-to-digital converters, each supporting up to 16 external input channels and hardware sample averaging across up to 64 conversions. Each ADC achieves up to 1 million samples per second (1 MSPS) in sequential mode, with programmable resolution, trigger sources, and sequencer priority - detailed in Section 13 of the SPMS338E datasheet.
Is the TM4C1231H6PGEI7R pin-compatible with other Tiva C Series microcontrollers?
No, the TM4C1231H6PGEI7R is not pin-compatible with other Tiva C Series parts such as the TM4C123GH6PM or TM4C1294NCPDT. Its 144-pin LQFP package and specific peripheral mapping (e.g., USB0 pins, hibernation signals) differ significantly. Migration requires PCB layout changes and firmware adaptation - TI provides migration guides but no drop-in replacement exists for this variant.
TM4C1231H6PGEI7R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 144-LQFP
- Series:
- Tiva™ C
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4F
- Core Size:
- 32-Bit Single-Core
- Speed:
- 80MHz
- Connectivity:
- CANbus, I2C, IrDA, Microwire, SPI, SSI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, DMA, POR, WDT
- Number of I/O:
- 105
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 2K x 8
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.08V ~ 3.63V
- Data Converters:
- A/D 24x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
TM4C1231H6PGEI7R FAQ
1.How can I place an order for TM4C1231H6PGEI7R through Aetrix?
Please submit a Request for Quotation (RFQ) for TM4C1231H6PGEI7R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TM4C1231H6PGEI7R reliable?
The price and inventory of TM4C1231H6PGEI7R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TM4C1231H6PGEI7R is usually 5 days.
3.What payment methods are accepted for TM4C1231H6PGEI7R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TM4C1231H6PGEI7R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TM4C1231H6PGEI7R?
TM4C1231H6PGEI7R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TM4C1231H6PGEI7R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TM4C1231H6PGEI7R?
For technical support, including TM4C1231H6PGEI7R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TM4C1231H6PGEI7R requirements.
6.How does Aetrix verify that TM4C1231H6PGEI7R is sourced from the original manufacturer or authorized distributors?
All TM4C1231H6PGEI7R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TM4C1231H6PGEI7R meets industry standards.
7.What is the process for return or replacement of TM4C1231H6PGEI7R?
All TM4C1231H6PGEI7R units undergo pre-shipment inspection (PSI). If there is an issue with TM4C1231H6PGEI7R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TM4C1231H6PGEI7R part is unused and in its original packaging.
Return procedure for TM4C1231H6PGEI7R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TM4C1231H6PGEI7R Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

