Texas Instruments TM4C1231H6PGEIR
- Part No.:
- TM4C1231H6PGEIR
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
TM4C1231H6PGEIR.pdf
- Description:
- IC MCU 32BIT 256KB FLASH 144LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,687
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TM4C1231H6PGEIR from Texas Instruments is an ARM Cortex-M4F-based microcontroller with 80 MHz operation, 256 KB Flash, 32 KB SRAM, and integrated USB 2.0 OTG, PWM, ADC (12-bit, 1MSPS), and multiple serial interfaces (UART, SPI, I²C). It serves as a main system controller in industrial HMI, motor control edge nodes, and low-power IoT gateways.
For engineers reviewing the TM4C1231H6PGEIR datasheet, TM4C1231H6PGEIR pinout, TM4C1231H6PGEIR application, or TM4C1231H6PGEIR equivalent, key selection criteria include its 80 MHz Cortex-M4F core with FPU, 12-bit 1MSPS ADC with hardware averaging, USB OTG support, hibernation module with RTC and battery-backed memory, and QFP-144 package with 114 GPIOs.
Technical Context
The TM4C1231H6PGEIR integrates a 32-bit ARM Cortex-M4F core with single-precision floating-point unit and 80 MHz maximum clock speed. It features a dedicated hibernation module with real-time clock, battery-backed SRAM, and wake-on-RTC/external-pin capability - enabling sub-1 µA hibernate current.
Peripherals include eight 16/32-bit general-purpose timers (with PWM and capture), two 12-bit ADCs (each with eight sample sequencers and hardware averaging), four UARTs (one with ISO 7816 and SIR), four SPIs, and two I²Cs. All are accessible via APB/AHB bus matrix with configurable priority and DMA support.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M4F @ 80 MHz with hardware FPU - enables real-time signal processing and deterministic floating-point math. |
| Memory | 256 KB Flash + 32 KB SRAM + 2 KB EEPROM - supports firmware updates, data logging, and nonvolatile configuration storage. |
| ADC | Two 12-bit, 1 MSPS ADCs with 8-channel sequencers and hardware averaging - suitable for precision sensor acquisition without CPU overhead. |
| USB | USB 2.0 OTG controller with integrated PHY - allows host/device role switching and direct connection to PCs or peripherals without external transceivers. |
| Hibernate Mode | Sub-1 µA current draw with RTC, battery-backed 2 KB SRAM, and wake-on-RTC/external-interrupt - extends battery life in always-on edge sensors. |
| Timers | Eight 16/32-bit GPTMs, each configurable as PWM, input capture, or one-shot - supports multi-axis motor control and precise timing in industrial automation. |
| Package | 144-pin LQFP (PGE), 20 × 20 mm, 0.5 mm pitch - compatible with standard PCB assembly processes and offers 114 GPIOs with flexible peripheral mapping. |
Pinout & Package
TM4C1231H6PGEIR is housed in a 144-pin LQFP (PGE) package with exposed thermal pad. Pin functions are fully defined in TI's SPMS338E datasheet Section 1.4 and Table 1-1 (Pin Assignments).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDC | Power supply inputs | Digital (3.3 V), analog (3.3 V), and core (1.2 V) supplies - require separate decoupling for noise-sensitive analog/peripheral operation. |
| GND, GNDA, GNDC | Ground returns | Analog/digital/core ground separation minimizes coupling between high-speed digital switching and precision analog circuits. |
| USB0VBUS, USB0ID, USB0DP, USB0DM | USB OTG interface | Full-speed USB 2.0 physical layer with integrated transceiver - supports device/host mode and battery charging detection. |
| SSI0CLK, SSI0FSS, SSI0RX, SSI0TX | SPI interface signals | Four independent SSI modules support master/slave operation up to 20 MHz - ideal for flash memory, displays, and sensor communication. |
| U0RX, U0TX, U0CTS, U0RTS | UART0 with hardware flow control | Full-duplex asynchronous communication with modem handshake - enables robust serial links in noisy industrial environments. |
| PH0–PH7, PK0–PK7, PN0–PN7 | GPIO banks | 114 total GPIOs with programmable pull-up/down, slew rate, and drive strength - supports multiplexed peripheral assignment and interrupt-on-change capability. |
Key Features
| Feature | Design Value |
|---|---|
| Hibernation Module with RTC | Enables <1 µA sleep current while maintaining timekeeping and retaining 2 KB of SRAM - critical for battery-powered remote monitoring nodes. |
| USB 2.0 OTG Controller | Integrated PHY and dual-role capability eliminate external transceivers and simplify firmware development for field-upgradable devices. |
| Dual 12-bit ADCs with Hardware Averaging | Each ADC supports up to 8-channel sequenced sampling at 1 MSPS with on-the-fly 2–64x averaging - reduces noise in temperature, current, or voltage sensing. |
| μDMA Controller (32 channels) | Offloads CPU from data movement across peripherals (UART, ADC, SPI, USB) - improves real-time response and lowers active power consumption. |
| ROM-Based Bootloader & Driver Library | Pre-flashed ROM contains UART/I²C/USB bootloaders and TivaWare peripheral drivers - accelerates development and reduces Flash usage. |
Applications
| Industrial HMI Panel | Motor Control Edge Node |
|---|---|
Use Scenario: Standalone touch-enabled display with local logic for machine status, alarm handling, and parameter adjustment in factory-floor equipment. IC Role / Device Role / Timing Role: Main application processor executing GUI rendering, real-time I/O scanning, and USB/UART bridging to PLCs or drives. Use Value: Integrated USB OTG and 114 GPIOs enable direct connection to touch controllers, encoders, and relays - eliminating bridge ICs and reducing BOM count. |
Use Scenario: Compact BLDC motor controller with hall-effect feedback, current sensing, and field-oriented control (FOC) execution at the edge. IC Role / Device Role / Timing Role: Real-time motion controller running FOC algorithms using Cortex-M4F FPU and synchronized PWM/ADC sampling. Use Value: Eight GPTMs with dead-time insertion and ADC trigger synchronization allow precise 3-phase PWM generation and current loop closure within 1 µs jitter. |
| Smart Energy Sensor Gateway | Low-Power Environmental Monitor |
Use Scenario: Sub-metering gateway aggregating Modbus RTU data from energy meters and forwarding via Ethernet or cellular to cloud platforms. IC Role / Device Role / Timing Role: Protocol translation hub managing multiple UARTs (Modbus), SPI (flash storage), and USB (configuration/debug port). Use Value: Four UARTs with ISO 7816 and SIR support accommodate legacy meter interfaces, while USB OTG simplifies field technician setup and firmware updates. |
Use Scenario: Battery-operated air quality node measuring PM2.5, CO₂, and humidity over months using solar charging and intermittent transmission. IC Role / Device Role / Timing Role: Ultra-low-power system manager coordinating sensor reads, data compression, and scheduled LoRaWAN transmissions. Use Value: Hibernate mode with RTC wake-up and battery-backed SRAM preserves state and timestamping across deep sleep cycles - extending 2xAA battery life beyond 12 months. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TM4C123GH6PGE | Same package and pinout; adds 64 KB additional Flash (512 KB total) and 32 KB additional SRAM (64 KB total); includes internal temperature sensor. | Better suited for complex firmware with OTA updates, larger RTOS stacks, or extensive data buffering. | Select TM4C123GH6PGE when code size exceeds 256 KB or additional RAM is required for network stacks or graphics buffers. |
| STM32F407VGT6 | ARM Cortex-M4F @ 168 MHz; 1 MB Flash, 192 KB SRAM; no integrated USB PHY; different pinout and peripheral register map. | Higher performance and memory capacity but requires external USB transceiver and more complex layout; lacks hibernation module with battery-backed RAM. | Choose STM32F407VGT6 only if >80 MHz CPU throughput or >32 KB RAM is mandatory and ultra-low-power hibernate is not required. |
Compared with TM4C123GH6PGE and STM32F407VGT6, the TM4C1231H6PGEIR provides optimal balance of USB integration, hibernation capability, and peripheral richness in a production-ready QFP package - making it ideal for cost-sensitive, battery-aware industrial edge applications where full 512 KB Flash is unnecessary.
Availability
TM4C1231H6PGEIR is available at Aetrix Electronics and suitable for industrial HMI, motor control edge nodes, and smart energy gateways requiring stable component supply, long-term lifecycle assurance, and TI-authorized traceability.
Supply support for TM4C1231H6PGEIR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and consumer markets.
The TM4C1231H6PGEIR belongs to TI's Tiva C Series - a family of ARM Cortex-M4F microcontrollers designed specifically for real-time industrial control, human-machine interface, and low-power wired/wireless connectivity applications.
FAQ
What is the maximum operating frequency of the TM4C1231H6PGEIR?
The TM4C1231H6PGEIR operates at a maximum system clock frequency of 80 MHz, derived from its internal PLL fed by either the internal precision oscillator (±1% accuracy) or an external crystal. This frequency applies to the Cortex-M4F core, bus matrix, and all on-chip peripherals - ensuring deterministic timing for real-time control loops and high-throughput data transfers.
Does the TM4C1231H6PGEIR support USB device and host modes simultaneously?
Yes, the TM4C1231H6PGEIR includes a USB 2.0 On-The-Go (OTG) controller with integrated PHY that supports both device and host roles. Its USB0VBUS and USB0ID pins enable automatic role detection, and the on-chip OTG session request protocol (SRP) and host negotiation protocol (HNP) allow dynamic switching - essential for field-service tools and portable diagnostic devices.
How much current does the TM4C1231H6PGEIR draw in hibernate mode?
In hibernate mode with RTC enabled and 2 KB of battery-backed SRAM retained, the TM4C1231H6PGEIR draws less than 1 µA from the VBAT supply (typical 800 nA at 3.0 V, –40°C to 85°C). This ultra-low quiescent current is achieved via complete isolation of the digital domain and selective retention of only the hibernation module and RTC oscillator.
Can the TM4C1231H6PGEIR execute code directly from its internal Flash memory?
Yes, the TM4C1231H6PGEIR executes code directly from its 256 KB on-chip Flash memory using zero-wait-state access at 80 MHz. The Flash controller includes prefetch buffer and branch prediction to sustain peak CPU throughput. Code can also be loaded to SRAM for latency-critical routines, but Flash remains the primary and most reliable execution medium.
What debug interfaces are supported by the TM4C1231H6PGEIR?
The TM4C1231H6PGEIR supports JTAG and ARM Serial Wire Debug (SWD) interfaces via dedicated pins (TCK, TMS, TDI, TDO, nTRST, SWDIO, SWCLK). Both protocols provide full read/write memory access, breakpoint setting, and real-time variable inspection. SWD is preferred for production programming due to its 2-pin footprint and higher reliability in noise-prone environments.
TM4C1231H6PGEIR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 144-LQFP
- Series:
- Tiva™ C
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4F
- Core Size:
- 32-Bit Single-Core
- Speed:
- 80MHz
- Connectivity:
- CANbus, I2C, IrDA, Microwire, SPI, SSI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, DMA, POR, WDT
- Number of I/O:
- 105
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 2K x 8
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.08V ~ 3.63V
- Data Converters:
- A/D 24x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
TM4C1231H6PGEIR FAQ
1.How can I place an order for TM4C1231H6PGEIR through Aetrix?
Please submit a Request for Quotation (RFQ) for TM4C1231H6PGEIR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TM4C1231H6PGEIR reliable?
The price and inventory of TM4C1231H6PGEIR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TM4C1231H6PGEIR is usually 5 days.
3.What payment methods are accepted for TM4C1231H6PGEIR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TM4C1231H6PGEIR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TM4C1231H6PGEIR?
TM4C1231H6PGEIR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TM4C1231H6PGEIR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TM4C1231H6PGEIR?
For technical support, including TM4C1231H6PGEIR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TM4C1231H6PGEIR requirements.
6.How does Aetrix verify that TM4C1231H6PGEIR is sourced from the original manufacturer or authorized distributors?
All TM4C1231H6PGEIR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TM4C1231H6PGEIR meets industry standards.
7.What is the process for return or replacement of TM4C1231H6PGEIR?
All TM4C1231H6PGEIR units undergo pre-shipment inspection (PSI). If there is an issue with TM4C1231H6PGEIR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TM4C1231H6PGEIR part is unused and in its original packaging.
Return procedure for TM4C1231H6PGEIR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TM4C1231H6PGEIR Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

