Texas Instruments TM4C123GH6ZRBI7R
- Part No.:
- TM4C123GH6ZRBI7R
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 157-VFBGA
- Datasheet:
-
TM4C123GH6ZRBI7R.pdf
- Description:
- IC MCU 32BIT 256KB FLASH 157BGA
- Quantity:
- Payment:

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Product details
Overview
TM4C123GH6ZRBI7R from Texas Instruments is an ARM Cortex-M4F-based microcontroller with 256 KB Flash, 32 KB SRAM, and integrated USB 2.0 OTG, PWM, ADC (12-bit, 1MSPS), and multiple serial interfaces (UART, SPI, I²C). It operates at up to 80 MHz and supports hibernation mode for ultra-low-power operation in battery-powered edge nodes.
For engineers reviewing the TM4C123GH6ZRBI7R datasheet, TM4C123GH6ZRBI7R pinout, TM4C123GH6ZRBI7R application, or TM4C123GH6ZRBI7R equivalent, key selection criteria include its integrated USB PHY, 12-channel PWM with dead-band control, 12-bit ADC with hardware averaging, hibernation module with RTC and battery-backed memory, and support for TivaWare™ software stack.
Technical Context
The TM4C123GH6ZRBI7R implements a full-featured ARM Cortex-M4F core with single-precision floating-point unit (FPU), NVIC with 80 interrupt lines, and SysTick timer. Its system-level integration includes a micro-DMA controller (32-channel), ROM-based bootloader, and configurable clock tree with PLL, internal oscillators, and external crystal support (up to 25 MHz).
Peripherals are tightly coupled via the AHB/APB bus matrix: GPIOs support slew-rate control and masking interrupts per pin; ADC features four independent sample sequencers with trigger flexibility; UARTs include ISO 7816 smart-card and SIR infrared modes; and the hibernation module provides VBAT monitoring, RTC, and 2 KB of battery-backed SRAM.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-M4F @ 80 MHz with FPU - enables real-time signal processing and deterministic floating-point math without external coprocessor. |
| Memory | 256 KB Flash + 32 KB SRAM + 2 KB hibernate SRAM - sufficient for firmware, buffers, and persistent state retention during deep sleep. |
| ADC | 12-bit, 1 MSPS, 12-channel with hardware averaging - supports high-resolution sensor acquisition with noise reduction in single-cycle configuration. |
| PWM | 12-channel, 16-bit, with dead-band generation - suitable for motor control and digital power supply feedback loops requiring precise timing and safety margins. |
| USB | USB 2.0 OTG with integrated PHY - eliminates need for external transceiver; supports device/host/OTG roles with built-in USB stack support in TivaWare. |
| Hibernation | RTC + VBAT monitoring + battery-backed 2 KB SRAM - enables years-long operation on coin cell; wake-up latency < 10 µs from hibernate state. |
| Package | 100-pin LQFP (14 × 14 mm, 0.5 mm pitch) - standard surface-mount footprint compatible with automated assembly and thermal management for industrial ambient. |
Pinout & Package
TM4C123GH6ZRBI7R is housed in a 100-pin LQFP package (14 mm × 14 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are defined across five GPIO ports (A–E), plus dedicated analog, USB, JTAG/SWD, and power/ground terminals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDC | Power supply inputs | Digital core (VDD), analog (VDDA), and USB PHY (VDDC) rails require separate 3.3 V filtering; decoupling critical for ADC accuracy and USB signal integrity. |
| USB0DP/USB0DM | USB differential data pair | Integrated PHY supports full-speed USB 2.0; requires 27 Ω series resistors and proper PCB routing as differential pair with 90 Ω impedance. |
| PD0/PD1 | UART0 TX/RX | Default UART0 pins; configurable as GPIO or alternate function; support auto-baud detection and IrDA modulation. |
| PF0–PF4 | NMI, USER SW1–SW2, BOOT | Multi-function pins: PF0 = NMI input, PF1–PF4 = user switches/boot config; all support weak pull-ups and edge-triggered interrupts. |
| JTAG/SWD | TCK/TMS/TDO/TDI/SWCLK/SWDIO | Supports both JTAG and 2-wire SWD debug; SWD preferred for minimal pin count; no external pull-ups required for SWDIO. |
Key Features
| Feature | Design Value |
|---|---|
| Floating-Point Unit (FPU) | Single-precision IEEE 754 compliant - accelerates math-intensive tasks like PID tuning, FFT, and sensor fusion without software emulation overhead. |
| Hibernate Module | Independent 32-bit RTC, VBAT supervision, and 2 KB battery-backed SRAM - preserves critical state and timekeeping during main power loss with sub-µA quiescent current. |
| μDMA Controller | 32-channel, scatter-gather capable - offloads CPU from peripheral data movement (e.g., ADC-to-memory, UART-to-buffer), enabling low-latency real-time response. |
| ROM Bootloader | Factory-programmed, field-upgradable - enables in-system programming via UART, USB, or I²C without external programmer; supports secure image validation. |
| GPIO Masking | Per-pin interrupt mask register - allows selective disabling of GPIO interrupts without affecting other pins on same port, simplifying ISR design in multi-sensor systems. |
Applications
| Industrial Motor Control | Smart Metering |
|---|---|
Use Scenario: Closed-loop BLDC motor drive with current sensing, position feedback, and thermal monitoring in HVAC actuators. IC Role / Device Role / Timing Role: Real-time motion controller executing FOC algorithm, generating PWM with dead-band, sampling ADC channels synchronously, and managing USB-based commissioning. Use Value: Integrated 12-channel PWM, 12-bit ADC with hardware averaging, and FPU reduce BOM cost and enable deterministic 20 kHz control loop execution. | Use Scenario: Two-way AMI meter with metrology, tamper detection, and RF/PLC communication interface. IC Role / Device Role / Timing Role: System host MCU handling energy measurement, secure data logging, RTC-critical billing intervals, and USB/UART firmware updates. Use Value: Hibernate RTC and 2 KB battery-backed SRAM maintain accurate time and last-read values during mains outage; ROM bootloader ensures field-upgrade security. |
| IoT Edge Node | Medical Wearable |
Use Scenario: Battery-powered environmental sensor node aggregating temperature, humidity, and CO₂ with BLE gateway handoff. IC Role / Device Role / Timing Role: Sensor hub collecting and preprocessing data, managing low-power scheduling, and interfacing with external BLE SoC via UART or SPI. Use Value: Sub-µA hibernate mode extends 2000 mAh coin cell life to >5 years; USB OTG enables direct PC-based diagnostics and calibration. | Use Scenario: ECG patch with analog front-end, motion compensation, and wireless telemetry. IC Role / Device Role / Timing Role: Signal processor acquiring 12-bit ECG samples at 1 kSPS, applying FIR filtering via FPU, and buffering data for transmission. Use Value: On-chip 12-bit ADC with programmable gain amplifier (PGA) input stage and hardware oversampling reduces external component count and improves SNR. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32F407VGT6 | ARM Cortex-M4F @ 168 MHz, 1 MB Flash, no integrated USB PHY, different peripheral set (no hibernate module) | Lacks battery-backed RTC and hibernation SRAM; requires external USB transceiver; higher performance but larger code footprint | Select when higher clock speed and Flash capacity outweigh USB PHY integration and ultra-low-power hibernation needs. |
| MSP432P401RIPZT | ARM Cortex-M4F @ 48 MHz, 2 MB Flash, 256 KB SRAM, integrated USB, lower max frequency, TI's newer MSP432 architecture | Lower max frequency but superior active-mode power efficiency; different peripheral register map and toolchain migration effort required | Select for new designs prioritizing active-mode power savings and long-term TI roadmap alignment over legacy TivaWare ecosystem reuse. |
Compared with STM32F407VGT6 and MSP432P401RIPZT, the TM4C123GH6ZRBI7R offers unique integration of USB PHY, hibernate RTC+SRAM, and mature TivaWare middleware-making it optimal for cost-sensitive, battery-aware industrial and metering applications where rapid development and proven field reliability are critical.
Availability
TM4C123GH6ZRBI7R is available at Aetrix Electronics and suitable for industrial motor control, smart metering, IoT edge nodes, and medical wearables requiring stable component supply and long-term manufacturability.
Supply support for TM4C123GH6ZRBI7R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and consumer markets since 1930.
The TM4C123 family was designed as a high-integration, cost-optimized ARM Cortex-M4F MCU platform targeting industrial automation, building control, and portable instrumentation-emphasizing USB connectivity, low-power hibernation, and robust peripheral sets.
FAQ
What is the maximum operating frequency of the TM4C123GH6ZRBI7R?
The TM4C123GH6ZRBI7R operates at a maximum system clock frequency of 80 MHz, achieved using its integrated PLL with external crystal (4–25 MHz) or internal oscillator. This frequency applies to the ARM Cortex-M4F core, bus matrix, and most peripherals; some modules like USB and ADC have independent clock dividers that must be configured accordingly in the system control registers.
Does the TM4C123GH6ZRBI7R include an integrated USB physical layer (PHY)?
Yes, the TM4C123GH6ZRBI7R integrates a full-speed USB 2.0 PHY supporting device, host, and OTG modes. It requires only external 27 Ω series resistors on USB0DP/USB0DM and proper 90 Ω differential impedance routing. No external transceiver is needed, reducing BOM count and board space versus MCUs requiring discrete PHYs.
How much battery-backed memory does the TM4C123GH6ZRBI7R provide in hibernate mode?
The TM4C123GH6ZRBI7R provides 2 KB of battery-backed SRAM accessible during hibernate mode. This memory retains data when main VDD is removed and VBAT is applied, enabling preservation of calibration constants, last-known sensor values, or RTC alarm settings. It is mapped to address 0x400FE000 and requires explicit enablement via the HIBCTL register.
What debug interfaces are supported by the TM4C123GH6ZRBI7R?
The TM4C123GH6ZRBI7R supports both JTAG and 2-wire Serial Wire Debug (SWD) interfaces. SWD is recommended for production due to its reduced pin count (SWCLK and SWDIO only) and compatibility with TI's XDS110 and third-party debug probes. The device also supports SWO trace output for real-time instruction and data trace via the TPIU module.
Is there a factory-programmed bootloader in the TM4C123GH6ZRBI7R?
Yes, the TM4C123GH6ZRBI7R includes a ROM-resident bootloader programmed at manufacture. It supports firmware updates over UART, USB, I²C, and CAN (with external transceiver), and validates images using CRC-16 before execution. The bootloader is invoked by holding the BOOT pin (PF0) low during reset and is field-upgradable via TI's Flash API.
TM4C123GH6ZRBI7R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 157-VFBGA
- Series:
- Tiva™ C
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4F
- Core Size:
- 32-Bit Single-Core
- Speed:
- 80MHz
- Connectivity:
- CANbus, I2C, IrDA, Microwire, QEI, SPI, SSI, UART/USART, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, Motion PWM, POR, WDT
- Number of I/O:
- 120
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 2K x 8
- RAM Size:
- 32K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.08V ~ 3.63V
- Data Converters:
- A/D 24x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
TM4C123GH6ZRBI7R FAQ
1.How can I place an order for TM4C123GH6ZRBI7R through Aetrix?
Please submit a Request for Quotation (RFQ) for TM4C123GH6ZRBI7R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TM4C123GH6ZRBI7R reliable?
The price and inventory of TM4C123GH6ZRBI7R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TM4C123GH6ZRBI7R is usually 5 days.
3.What payment methods are accepted for TM4C123GH6ZRBI7R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TM4C123GH6ZRBI7R transactions.
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4.How is shipping managed for TM4C123GH6ZRBI7R?
TM4C123GH6ZRBI7R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TM4C123GH6ZRBI7R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TM4C123GH6ZRBI7R?
For technical support, including TM4C123GH6ZRBI7R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TM4C123GH6ZRBI7R requirements.
6.How does Aetrix verify that TM4C123GH6ZRBI7R is sourced from the original manufacturer or authorized distributors?
All TM4C123GH6ZRBI7R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TM4C123GH6ZRBI7R meets industry standards.
7.What is the process for return or replacement of TM4C123GH6ZRBI7R?
All TM4C123GH6ZRBI7R units undergo pre-shipment inspection (PSI). If there is an issue with TM4C123GH6ZRBI7R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TM4C123GH6ZRBI7R part is unused and in its original packaging.
Return procedure for TM4C123GH6ZRBI7R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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