Texas Instruments TMS320C6746AZWT3
- Part No.:
- TMS320C6746AZWT3
- Manufacturer:
- Texas Instruments
- Category:
- DSP (Digital Signal Processors)
- Package:
- 361-LFBGA
- Datasheet:
-
TMS320C6746AZWT3.pdf
- Description:
- IC DSP FIX/FLOAT POINT 361NFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TMS320C6746AZWT3 from Texas Instruments is a fixed- and floating-point digital signal processor (DSP) based on the C674x VLIW core, operating at 456 MHz with 32KB L1P cache, 32KB L1D RAM/cache, and 256KB unified L2 RAM/cache. It integrates EMAC, USB 2.0 OTG, McASP, dual McBSPs, DDR2/mDDR controller, and PRUSS for real-time offload-targeting embedded vision and biometric processing in industrial edge devices.
For engineers reviewing the TMS320C6746AZWT3 datasheet, TMS320C6746AZWT3 pinout, TMS320C6746AZWT3 application, or TMS320C6746AZWT3 equivalent, key selection considerations include its 456-MHz C674x DSP core, 361-ball NFBGA (ZWT, 16×16 mm, 0.80-mm pitch), IEEE SP/DP floating-point support, dual-channel EDMA3, and integrated PRU subsystem for deterministic I/O control.
Technical Context
The TMS320C6746AZWT3 implements a two-level cache hierarchy: 32KB direct-mapped L1P program cache and 32KB 2-way set-associative L1D data cache, backed by 256KB unified L2 memory configurable as RAM, cache, or hybrid. Its C674x core executes up to four single-precision floating-point additions per cycle and supports mixed-precision IEEE FP multiply (e.g., 2 SP×SP→SP per clock).
Peripheral integration includes a 10/100-Mbps EMAC with MII/RMII and MDIO, USB 2.0 OTG with integrated PHY, dual 16-bit eHRPWM modules with dead-band generation, three 32-bit eCAP modules configurable as capture or APWM, and a programmable PRUSS with two 32-bit RISC cores-each with 4KB IRAM and 512B DRAM-for time-critical I/O handling independent of the main DSP.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | C674x VLIW DSP with superset of C64x+/C67x+ ISAs, enabling legacy code reuse and high-throughput signal processing. |
| Max Clock Frequency | 456 MHz at 1.3V core supply-delivers 2746 MFLOPS and 3648 MIPS for computationally intensive algorithms. |
| L1 Memory | 32KB L1P (direct-mapped) + 32KB L1D (2-way set-associative) - reduces instruction/data fetch latency without external bus contention. |
| L2 Memory | 256KB unified mapped RAM/cache - configurable partitioning enables deterministic real-time execution or large buffer storage. |
| External Memory Support | EMIFA (NOR/NAND/SDRAM) + DDR2/mDDR controller (16-bit, 256-MB address space) - enables flexible memory expansion for frame buffers and firmware. |
| Real-Time Peripherals | PRUSS (2×32-bit RISC cores), eHRPWM (6 outputs), eCAP (3×32-bit capture/APWM), RTC - provides hardware-accelerated timing, PWM, and event capture without CPU overhead. |
| Connectivity | EMAC (10/100 Mbps, MII/RMII), USB 2.0 OTG (host/client), 3×UART, 2×SPI, 2×I²C, McASP, McBSP, uPP, VPIF - supports multi-protocol industrial communication and sensor/audio/video I/O. |
Pinout & Package
Package: 361-ball NFBGA (ZWT suffix), 16.0 mm × 16.0 mm body size, 0.80-mm ball pitch, RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_CORE | DSP Core Power Supply | 1.3-V nominal supply for 456-MHz operation; requires low-noise regulation and local decoupling. |
| VDD_IO | I/O Power Supply | Configurable 1.8-V or 3.3-V rail supporting LVCMOS interfaces (excluding USB/DDR2). |
| CLKIN | External Clock Input | Accepts 24–50 MHz crystal or oscillator input for PLL-based system clock generation. |
| RESETn | Active-Low Reset Input | Synchronous deassertion required after power stabilization; initiates boot sequence from internal ROM or external memory. |
| BOOT[3:0] | Boot Mode Configuration | 4-bit strap pins selecting boot source (EMIFA NOR/NAND, SPI, UART, USB, etc.) during power-up. |
| EMAC_MDIO | Management Data I/O | Single-wire interface for configuring external Ethernet PHY registers via MDIO protocol. |
| USB0_DP/DM | USB 2.0 Differential Pair | Integrated PHY supports high/full-speed device/host modes; requires 90-Ω differential impedance routing. |
| VPIF_CLKIN/VPIF_CLKOUT | Video Port Clock Interface | Supports BT.656 video timing; CLKIN drives capture/display sync, CLKOUT may drive external sensors or encoders. |
Key Features
| Feature | Design Value |
|---|---|
| Floating-Point Acceleration | IEEE SP/DP compliance with 2 SP×SP→SP multiplies/clock and reciprocal/sqrt approximations-enables real-time FFT, filtering, and matrix math without software emulation. |
| PRU Subsystem Offload | Two independent 32-bit RISC PRU cores (4KB IRAM + 512B DRAM each) handle GPIO, PWM, encoder counting, or custom protocols-freeing DSP for algorithmic workloads. |
| Dual-Channel EDMA3 Engine | 64 independent DMA channels + 16 QDMA channels enable zero-CPU-overhead data movement between peripherals, L2, and external memory-critical for streaming audio/video. |
| Flexible Memory Architecture | L1/L2 cache/RAM partitioning allows deterministic real-time response (cache disabled) or high throughput (full cache)-configurable per application phase. |
| Industrial Connectivity Suite | EMAC (MII/RMII), USB OTG, McASP (TDM/I²S), VPIF (BT.656), uPP (FPGA/data converter interface)-supports end-to-end embedded vision and control systems. |
Applications
| Currency Inspection | Biometric Identification |
|---|---|
Use Scenario: High-speed banknote validation using image capture, feature extraction, and pattern matching against counterfeit databases. IC Role / Device Role / Timing Role: TMS320C6746AZWT3 acts as the primary vision-processing engine-executing real-time image enhancement, edge detection, and neural network inference on captured frames. Use Value: 456-MHz C674x core + 256KB L2 RAM enables sub-100ms analysis per note; integrated VPIF and McASP simplify camera/microphone interfacing. | Use Scenario: Fingerprint or iris recognition in access control terminals requiring secure template matching and liveness detection. IC Role / Device Role / Timing Role: TMS320C6746AZWT3 serves as the biometric co-processor-running encryption, correlation, and decision logic while managing sensor I/O via PRUSS and eCAP. Use Value: Hardware-accelerated AES and SHA-2 support in TI's software libraries, combined with PRU-driven sensor timing, ensures <500ms authentication latency. |
| Machine Vision (Low-End) | Industrial Ethernet Gateway |
Use Scenario: PCB inspection or object classification in factory automation using low-resolution cameras and compact neural models. IC Role / Device Role / Timing Role: TMS320C6746AZWT3 functions as the vision inference node-processing grayscale images via optimized DSP library kernels and triggering actuator signals via eHRPWM. Use Value: 3648 MIPS and 2746 MFLOPS deliver sufficient compute for YOLOv2-tiny or MobileNetV1 inference at 15+ FPS; uPP interface connects directly to FPGA-based preprocessing units. | Use Scenario: Protocol translation between fieldbus (Modbus RTU) and Ethernet/IP in smart sensors or PLC edge gateways. IC Role / Device Role / Timing Role: TMS320C6746AZWT3 operates as the protocol stack host-running TCP/IP stack on DSP BIOS while EMAC handles packet framing and PRUSS manages serial peripheral timing. Use Value: Integrated 10/100-Mbps EMAC with MDIO eliminates external PHY; dual McBSPs and UARTs support concurrent RS-485 and CAN FD bridging. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar DSP applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TMS320C6748ZWT3 | Higher L2 (512KB vs. 256KB); same core, package, and peripheral set. | Better suited for larger algorithm buffers or multi-tasking OS environments requiring extended memory. | Select when application demands >256KB on-chip memory for code/data without external SDRAM latency penalty. |
| OMAP-L138AZWT3 | ARM9 + C674x dual-core; identical DSP subsystem but adds ARM9 for Linux/RTOS host tasks. | Enables rich UI, networking stacks, and file system management alongside DSP processing. | Choose when system requires both high-level OS services and real-time DSP-e.g., HMI-enabled vision analyzers. |
Compared with TMS320C6746AZWT3, the C6748ZWT3 extends on-chip memory for larger workloads, while the OMAP-L138AZWT3 adds an ARM9 host processor for full-featured embedded Linux deployment-neither offers pin compatibility, but both share identical ZWT package and core architecture for design reuse.
Availability
TMS320C6746AZWT3 is available at Aetrix Electronics and suitable for currency inspection, biometric identification, and low-end machine vision applications requiring stable component supply, long-term industrial lifecycle support, and consistent electrical specifications across production batches.
Supply support for TMS320C6746AZWT3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog, embedded processing, and wireless technologies for industrial, automotive, and consumer markets.
The TMS320C6746AZWT3 belongs to TI's C6000™ DSP platform, designed specifically for low-power, high-performance embedded signal processing in cost-sensitive industrial edge applications where floating-point precision and real-time I/O coexistence are critical.
FAQ
What is the maximum operating frequency of the TMS320C6746AZWT3?
The TMS320C6746AZWT3 operates at a maximum frequency of 456 MHz when supplied with a 1.3-V core voltage. This speed delivers 2746 MFLOPS and 3648 MIPS, validated under industrial temperature conditions. The device also supports a 375-MHz mode at 1.2 V for lower-power operation. Both frequencies are production-tested and documented in the SPRS591F datasheet revision January 2017.
Does the TMS320C6746AZWT3 support IEEE double-precision floating-point arithmetic?
Yes, the TMS320C6746AZWT3 fully supports IEEE 754 double-precision (64-bit) floating-point operations through its C674x DSP core. It executes up to two DP additions every two clocks and supports DP multiply operations-including 2 DP×DP→DP every four clocks. Double-precision capability is confirmed in Section 1.1 of the SPRS591F datasheet and enabled via standard C6x compiler toolchain support.
What package type and dimensions does the TMS320C6746AZWT3 use?
The TMS320C6746AZWT3 uses a 361-ball NFBGA package with ZWT suffix, measuring 16.0 mm × 16.0 mm with 0.80-mm ball pitch. This RoHS-compliant package is distinct from the smaller 13×13-mm ZCE variant. Mechanical details-including thermal resistance and solder paste recommendations-are specified in Section 8.2 of the SPRS591F datasheet.
Can the TMS320C6746AZWT3 boot from NAND flash memory?
Yes, the TMS320C6746AZWT3 supports NAND flash boot via its EMIFA interface. Boot mode is selected using the BOOT[3:0] strap pins, and NAND configuration-including 8-bit or 16-bit data width and hardware ECC enable-is handled by the internal boot ROM. This capability is explicitly listed in Table 3-1 and Section 4.1 of the SPRS591F datasheet.
How many independent DMA channels does the TMS320C6746AZWT3 provide?
The TMS320C6746AZWT3 integrates the Enhanced Direct Memory Access Controller 3 (EDMA3) with 64 independent DMA channels and 16 quick DMA (QDMA) channels. These channels support memory-to-peripheral, peripheral-to-memory, and memory-to-memory transfers without CPU intervention-critical for real-time audio/video streaming. Full channel mapping and priority control are detailed in Section 6.9 of the SPRS591F datasheet.
TMS320C6746AZWT3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- TMS320C674x
- Package/Case:
- 361-LFBGA
- Packaging:
- Tray
- Product Status:
- Obsolete
- Type:
- Fixed/Floating Point
- Interface:
- EBI/EMI, Ethernet MAC, Host Interface, I2C, McASP, McBSP, SPI, UART, USB
- Clock Rate:
- 300MHz
- Non-Volatile Memory:
- ROM (1.088MB)
- On-Chip RAM:
- 488kB
- Voltage - I/O:
- 1.8V, 3.3V
- Voltage - Core:
- 1.20V
- Operating Temperature:
- 0°C ~ 90°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 361-NFBGA (16x16)
TMS320C6746AZWT3 FAQ
1.How can I place an order for TMS320C6746AZWT3 through Aetrix?
Please submit a Request for Quotation (RFQ) for TMS320C6746AZWT3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TMS320C6746AZWT3 reliable?
The price and inventory of TMS320C6746AZWT3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TMS320C6746AZWT3 is usually 5 days.
3.What payment methods are accepted for TMS320C6746AZWT3?
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TMS320C6746AZWT3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TMS320C6746AZWT3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TMS320C6746AZWT3?
For technical support, including TMS320C6746AZWT3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TMS320C6746AZWT3 requirements.
6.How does Aetrix verify that TMS320C6746AZWT3 is sourced from the original manufacturer or authorized distributors?
All TMS320C6746AZWT3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TMS320C6746AZWT3 meets industry standards.
7.What is the process for return or replacement of TMS320C6746AZWT3?
All TMS320C6746AZWT3 units undergo pre-shipment inspection (PSI). If there is an issue with TMS320C6746AZWT3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TMS320C6746AZWT3 part is unused and in its original packaging.
Return procedure for TMS320C6746AZWT3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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