Texas Instruments TMS320C6746BZWTA3

Overview

TMS320C6746BZWTA3 from Texas Instruments is a fixed- and floating-point digital signal processor (DSP) based on the C674x VLIW core, operating at 456 MHz with 32KB L1P cache, 32KB L1D RAM/cache, and 256KB unified L2 RAM/cache. It integrates EMAC, USB 2.0 OTG, McASP, dual McBSPs, DDR2/mDDR controller, and PRUSS for real-time offload-targeting embedded vision and biometric identification systems.

For engineers reviewing the TMS320C6746BZWTA3 datasheet, TMS320C6746BZWTA3 pinout, TMS320C6746BZWTA3 application, or TMS320C6746BZWTA3 equivalent, key selection criteria include its 456-MHz C674x DSP core, dual-level cache architecture, integrated Ethernet MAC and USB OTG PHY, PRU subsystem for deterministic I/O control, and support for 16-bit DDR2/mDDR memory up to 256 MB address space.

Technical Context

The TMS320C6746BZWTA3 implements a two-level cache hierarchy: 32KB direct-mapped L1P program cache and 32KB 2-way set-associative L1D data cache, backed by 256KB unified L2 RAM/cache configurable as mapped memory, cache, or hybrid. Its C674x core supports IEEE single- and double-precision floating-point arithmetic, mixed-precision multiply operations (e.g., 2 SP×SP→SP per cycle), and 64 general-purpose 32-bit registers with load-store architecture and nonaligned access.

Peripheral integration includes an EDMA3 controller with 64 independent DMA channels and 16 QDMA channels, a 10/100 Mbps EMAC compliant with IEEE 802.3 and supporting MII/RMII interfaces, and a programmable PRUSS with two 32-bit RISC PRU cores (4KB IRAM + 512B DRAM each) for time-critical I/O handling-enabling deterministic low-latency response without CPU intervention.

Key Specifications

Pinout & Package

The TMS320C6746BZWTA3 is housed in a 361-ball NFBGA package with 0.80-mm ball pitch and 16.0 mm × 16.0 mm body size. This ZWT suffix package supports thermal dissipation requirements for sustained 456-MHz operation in industrial environments.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar DSP applications.

Compared with TMS320C6746BZWTA3, the TMS320C6748BZWTA3 offers expanded L2 memory for larger signal processing workloads without layout changes, while the AM3358BZCZ100 shifts focus to general-purpose computing with OS support-making it suitable for higher-layer protocol stacks but less optimal for latency-constrained real-time DSP kernels.

Availability

TMS320C6746BZWTA3 is available at Aetrix Electronics and suitable for currency inspection systems, biometric terminals, and low-end machine vision cameras requiring stable component supply, long-term industrial temperature support (–40°C to 105°C), and consistent DSP performance across production batches.

Supply support for TMS320C6746BZWTA3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets.

The TMS320C6746BZWTA3 belongs to TI's C6000™ DSP platform and was designed specifically for low-power, high-performance embedded signal processing in cost-sensitive industrial and security applications-balancing floating-point capability, peripheral integration, and thermal efficiency.

FAQ

What is the maximum operating frequency of the TMS320C6746BZWTA3?

The TMS320C6746BZWTA3 operates at a maximum frequency of 456 MHz when supplied with a 1.3-V core voltage. This speed is validated under industrial temperature conditions (–40°C to 105°C) and requires proper power sequencing and thermal management. The device also supports a 375-MHz variant (1.2-V core), but the BZWTA3 suffix denotes the 456-MHz version. TMS320C6746BZWTA3 performance scales linearly with clock rate, delivering 2746 MFLOPS at full speed.

Does the TMS320C6746BZWTA3 include an integrated Ethernet PHY?

No, the TMS320C6746BZWTA3 integrates only the Ethernet MAC (EMAC) layer-not a physical layer transceiver. It requires an external 10/100BASE-TX PHY connected via MII or RMII interface, with MDIO used for PHY register configuration. The TMS320C6746BZWTA3 provides all MAC functionality including frame filtering, checksum offload, and DMA-integrated packet buffering, but signal-level line driving and analog receive functions remain external.

Can the TMS320C6746BZWTA3 boot directly from NAND flash?

Yes, the TMS320C6746BZWTA3 supports NAND flash boot through its EMIFA interface with built-in hardware ECC (up to 4-bit correction). The device's ROM bootloader initializes NAND, verifies image integrity using BCH ECC, and copies application code to internal RAM or external DDR2 before execution. Boot modes are selected via GPIO strap pins at reset, and NAND page sizes up to 4KB with 218-byte OOB are supported-enabling reliable field firmware updates in TMS320C6746BZWTA3-based systems.

How many independent PRU cores does the TMS320C6746BZWTA3 contain?

The TMS320C6746BZWTA3 contains two independent 32-bit Programmable Real-Time Unit (PRU) cores within the PRUSS subsystem. Each PRU has 4KB of instruction RAM and 512 bytes of data RAM, runs at one-half the CPU clock (228 MHz), and exports register R30 for hardware signaling. These PRUs operate autonomously from the C674x DSP core and are used for deterministic I/O control, protocol bridging, and real-time waveform generation-critical functions in TMS320C6746BZWTA3-based industrial gateways and vision systems.

What memory types are supported by the TMS320C6746BZWTA3 DDR2/mDDR controller?

The TMS320C6746BZWTA3 DDR2/mDDR controller supports 16-bit-wide DDR2 SDRAM up to 156 MHz and Mobile DDR (mDDR) SDRAM up to 150 MHz, both with 256-MB address space. It implements JEDEC-compliant command sequences, auto-refresh, and configurable timing parameters (tRCD, tRP, tRAS). The controller does not support LPDDR2, DDR3, or DDR4. TMS320C6746BZWTA3 uses this interface for high-bandwidth application code and buffer storage, while EMIFA handles boot media and slower peripherals.