Texas Instruments TMS320DM8167SCYG4
- Part No.:
- TMS320DM8167SCYG4
- Manufacturer:
- Texas Instruments
- Category:
- DSP (Digital Signal Processors)
- Package:
- 1031-BFBGA, FCBGA
- Datasheet:
-
TMS320DM8167SCYG4.pdf
- Description:
- IC DGTL MEDIA PROCESSR 1031FCBGA
- Quantity:
- Payment:

- Shipping:

Inventory:2,974
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TMS320DM8167SCYG4 from Texas Instruments is a high-performance DaVinci digital media processor integrating an ARM Cortex-A8 RISC CPU (up to 1.20 GHz), a C674x floating-point DSP core (up to 1 GHz), and three HDVICP2 video coprocessors. It delivers up to 8000 MIPS and 6000 MFLOPS, features dual DDR2/DDR3 interfaces supporting up to DDR3-1600, and targets real-time HD video encode/decode/transcode in embedded media systems.
For engineers reviewing the TMS320DM8167SCYG4 datasheet, TMS320DM8167SCYG4 pinout, TMS320DM8167SCYG4 application, or TMS320DM8167SCYG4 equivalent, key selection criteria include its triple HDVICP2 engine count, 512KB on-chip RAM, 1031-pin FCBGA package with Via Channel technology, and support for simultaneous HD/SD analog output plus HDMI 1.3 transmission.
Technical Context
The TMS320DM8167SCYG4 implements a heterogeneous dual-core architecture: the ARM Cortex-A8 handles OS execution, peripheral control, and system management using 32KB I-cache, 32KB D-cache, and 256KB L2 cache, while the C674x DSP executes computationally intensive video/audio algorithms with IEEE 754 SP/DP floating-point support and VLIW parallelism. Both cores share access to system memory via a System MMU.
Its media subsystem centers on three independent HDVICP2 engines-each capable of full 1080p60 H.264 encode or decode-and a programmable HDVPSS with dual 165-MHz capture channels, dual display channels, HDMI 1.3 transmitter with HDCP, and SD/HD DACs. The device uses 40-nm CMOS process and SmartReflex Level 2 power management across seven independent core domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | Heterogeneous dual-core: ARM Cortex-A8 (up to 1.20 GHz) + C674x VLIW DSP (up to 1 GHz) |
| Video Acceleration | Three HDVICP2 coprocessors enabling concurrent 1080p60 H.264/MPEG-2/VC-1 encode/decode |
| Memory Interface | Dual 32-bit DDR2/DDR3 controllers supporting DDR2-800 and DDR3-1600, up to 2GB total address space |
| On-Chip RAM | 512KB OCMC RAM for low-latency firmware/data buffering and real-time processing tasks |
| Video I/O | Two 165-MHz HD video capture channels; two 165-MHz HD display channels; HDMI 1.3 transmitter with HDCP |
| Process Technology | 40-nm CMOS with Via Channel BGA packaging enabling 0.8-mm PCB routing on 0.65-mm pitch |
| Power Management | SmartReflex Level 2 with seven independent core power domains and dynamic voltage/frequency scaling |
Pinout & Package
The TMS320DM8167SCYG4 is housed in a 1031-pin FCBGA package measuring 25.0 mm × 25.0 mm, utilizing Via Channel technology to enable efficient two-layer PCB routing and reduce layout complexity and cost.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DEV_CLKIN | Reference Clock Input | 1.8-V input for system clock generation; supports 19.2–50 MHz crystal or oscillator |
| DDR3_DQ[0:31] | DDR3 Data Bus | 32-bit bidirectional data interface for DDR3-1600 operation at 1.5 V |
| HDMI_TX_CLK | HDMI Pixel Clock Output | Differential clock output up to 165 MHz for HDMI 1.3 timing compliance |
| HDVPSS_HDCAP0 | HD Video Capture Input | Parallel 16-/24-bit interface for first 165-MHz HD capture channel |
| USB0_DP/DM | USB 2.0 Differential Pair | Integrated PHY supports high-speed (480 Mbps), full-speed (12 Mbps), and low-speed (1.5 Mbps) modes |
| GPMC_A[0:23] | General-Purpose Memory Address | 24-bit multiplexed address/data bus for glueless NAND/NOR/SRAM interfacing with BCH/Hamming ECC |
Key Features
| Feature | Design Value |
|---|---|
| Triple HDVICP2 Engines | Enables concurrent 1080p60 encode + decode + transcode without external hardware acceleration |
| HDVPSS with Dual Capture/Display | Supports simultaneous HD analog input/output and HDMI digital output with integrated DACs and scaler |
| Dual DDR2/DDR3 Controllers | Provides 6.4 GB/s peak bandwidth across two independent 32-bit buses for multi-stream video buffering |
| ARM + DSP Heterogeneous Processing | Separates OS/control (ARM) from real-time signal processing (DSP), simplifying software partitioning and debug |
| Via Channel BGA Packaging | Reduces PCB layer count and routing congestion by enabling 0.8-mm trace/space on 0.65-mm pitch package |
Applications
| Video Security DVR/NVR | Media Server Appliance |
|---|---|
Use Scenario: Multi-channel IP camera recording with real-time analytics and remote streaming. IC Role / Device Role / Timing Role: Central video processing unit performing simultaneous H.264 encoding of up to 8× 1080p30 streams and motion detection offload to DSP. Use Value: Triple HDVICP2 enables full hardware-accelerated encode without CPU/DSP resource contention, sustaining 1080p60 throughput per channel. | Use Scenario: Cloud-connected media transcoding node converting broadcast feeds to adaptive bitrate formats. IC Role / Device Role / Timing Role: High-throughput transcoder executing parallel encode/decode pipelines across ARM, DSP, and HDVICP2 resources. Use Value: 512KB OCMC RAM buffers frame data between stages; dual DDR3 interfaces sustain 6.4 GB/s memory bandwidth for multi-format pipeline concurrency. |
| Digital Signage Player | Video Conferencing Endpoint |
Use Scenario: 4K-capable signage player rendering dynamic content with overlay graphics and video playback. IC Role / Device Role / Timing Role: Media controller managing HDMI output, video decode, OSD composition, and graphics layer blending via HDVPSS. Use Value: Integrated HDVPSS supports simultaneous SD analog and HD digital outputs, enabling dual-display kiosk configurations without external scalers. | Use Scenario: Embedded conferencing system capturing local camera, decoding remote stream, and mixing audio/video for local display. IC Role / Device Role / Timing Role: Real-time video processing hub handling dual 1080p30 capture/display paths, echo cancellation on McASP, and USB camera/host connectivity. Use Value: Three HDVICP2 engines allow independent encode (local cam), decode (remote feed), and transcode (bandwidth adaptation) concurrently at full HD resolution. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital media processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TMS320DM8168CYG | Includes SGX530 3D graphics engine; identical ARM/DSP/HDVICP2 specs and pinout | Required when GUI rendering, OpenGL ES 2.0, or Direct3D Mobile support is needed | Select DM8168CYG only if 3D graphics acceleration is mandatory; otherwise DM8167SCYG4 offers identical video processing capability at lower cost |
| TMS320DM8165CYG | Features two HDVICP2 engines (vs. three); same ARM/DSP frequency and memory subsystem | Suitable for single-stream 1080p60 encode/decode or dual-stream 1080p30 workloads | Choose DM8165CYG for cost-sensitive designs where triple-engine concurrency is unnecessary |
Compared with TMS320DM8167SCYG4, the DM8168CYG adds 3D graphics but increases BOM cost and thermal load, while the DM8165CYG reduces video concurrency headroom by removing one HDVICP2 engine-making it viable only for lighter HD processing loads.
Availability
TMS320DM8167SCYG4 is available at Aetrix Electronics and suitable for video security DVR/NVR, media server appliance, and digital signage player applications requiring stable component supply, long-term lifecycle assurance, and industrial-grade temperature support.
Supply support for TMS320DM8167SCYG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and wireless technologies, with leadership in high-performance processors for industrial, automotive, and communications markets.
The TMS320DM8167SCYG4 belongs to TI's DaVinci digital media processor family, designed specifically for real-time HD video infrastructure applications including encode, decode, transcode, and display processing in resource-constrained embedded systems.
FAQ
What is the maximum video resolution and frame rate supported by the TMS320DM8167SCYG4?
The TMS320DM8167SCYG4 supports full 1080p60 (1920×1080 at 60 fps) H.264, MPEG-2, VC-1, and MPEG-4 SP/ASP encode or decode per HDVICP2 engine. With three engines, it can concurrently process multiple 1080p60 streams-for example, encode one, decode another, and transcode a third-all in real time without CPU/DSP intervention. This capability is confirmed in the SPRS614F datasheet Section 1.1 and Figure 1-1 block diagram.
Does the TMS320DM8167SCYG4 include an integrated graphics engine like the SGX530?
No, the TMS320DM8167SCYG4 does not include the SGX530 3D graphics engine. That feature is exclusive to the TMS320DM8168 device variant, as explicitly stated in the SPRS614F datasheet Section 1.3 ("The device also includes an SGX530 3D graphics engine (available only on the TMS320DM8168 device)") and Table 3-1 Device Comparison. The TMS320DM8167SCYG4 retains full video processing capability but omits 3D rendering hardware.
What memory types and speeds does the TMS320DM8167SCYG4 support via its external interfaces?
The TMS320DM8167SCYG4 supports dual 32-bit DDR2 (up to DDR2-800) and DDR3 (up to DDR3-1600) SDRAM interfaces, delivering up to 6.4 GB/s aggregate bandwidth. It also includes a flexible 8-/16-bit GPMC for NOR Flash, NAND Flash (with BCH/Hamming ECC), SRAM, and pseudo-SRAM. These capabilities are documented in Section 1.1 Features and Table 3-2 of the SPRS614F datasheet.
How many high-definition video capture and display channels does the TMS320DM8167SCYG4 provide?
The TMS320DM8167SCYG4 provides two 165-MHz HD video capture channels and two 165-MHz HD video display channels via its HDVPSS subsystem. Each capture channel can be split into dual 8-bit SD channels, and display channels support simultaneous SD analog and HD digital (HDMI) output. This configuration is specified in Section 1.1 Features and Figure 1-1 of the SPRS614F datasheet.
What is the package type and pin count of the TMS320DM8167SCYG4?
The TMS320DM8167SCYG4 uses a 1031-pin FCBGA package with dimensions of 25.0 mm × 25.0 mm, manufactured using Via Channel technology to enable 0.8-mm PCB trace/space design rules. This package information is confirmed in the "Device Information" table on page 4 of the SPRS614F datasheet and Section 11.1 Packaging Information.
TMS320DM8167SCYG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- DM81x Video SOC, DaVinci™
- Package/Case:
- 1031-BFBGA, FCBGA
- Packaging:
- Tray
- Product Status:
- Discontinued at Digi-Key
- Type:
- Digital Media System-on-Chip (DMSoC)
- Interface:
- EBI/EMI, Ethernet, I2C, McASP, McBSP, PCI, Serial ATA, SD/SDIO, SPI, UART, USB
- Clock Rate:
- 1.125GHz DSP, 1.35GHz ARM®
- Non-Volatile Memory:
- ROM (48kB)
- On-Chip RAM:
- 1.5MB
- Voltage - I/O:
- 1.5V, 1.8V, 3.3V
- Voltage - Core:
- 1.00V
- Operating Temperature:
- 0°C ~ 95°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 1031-FCBGA (25x25)
TMS320DM8167SCYG4 FAQ
1.How can I place an order for TMS320DM8167SCYG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TMS320DM8167SCYG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TMS320DM8167SCYG4 reliable?
The price and inventory of TMS320DM8167SCYG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TMS320DM8167SCYG4 is usually 5 days.
3.What payment methods are accepted for TMS320DM8167SCYG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TMS320DM8167SCYG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TMS320DM8167SCYG4?
TMS320DM8167SCYG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TMS320DM8167SCYG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TMS320DM8167SCYG4?
For technical support, including TMS320DM8167SCYG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TMS320DM8167SCYG4 requirements.
6.How does Aetrix verify that TMS320DM8167SCYG4 is sourced from the original manufacturer or authorized distributors?
All TMS320DM8167SCYG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TMS320DM8167SCYG4 meets industry standards.
7.What is the process for return or replacement of TMS320DM8167SCYG4?
All TMS320DM8167SCYG4 units undergo pre-shipment inspection (PSI). If there is an issue with TMS320DM8167SCYG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TMS320DM8167SCYG4 part is unused and in its original packaging.
Return procedure for TMS320DM8167SCYG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TMS320DM8167SCYG4 Tags
-
TMS320C5535AZAY10
Texas Instruments

-
TMS320VC5501PGF300
Texas Instruments

-
ADSP-BF592KCPZ
Analog Devices Inc.

-
ADAU1463WBCPZ150
Analog Devices Inc.

-
TMS320VC5402PGE100
Texas Instruments

-
ADAU1701JSTZ-RL
Analog Devices Inc.

-
ADAU1701JSTZ
Analog Devices Inc.

-
TMS320VC5502PGF300
Texas Instruments

-
ADAU1462WBCPZ300RL
Analog Devices Inc.

-
ADAU1452KCPZRL
Analog Devices Inc.

-
ADAU1452WBCPZ-RL
Analog Devices Inc.

-
TMS320C6747DZKB3
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

