Texas Instruments TMS320DM8168CCYG
- Part No.:
- TMS320DM8168CCYG
- Manufacturer:
- Texas Instruments
- Category:
- DSP (Digital Signal Processors)
- Package:
- 1031-BFBGA, FCBGA
- Datasheet:
-
TMS320DM8168CCYG.pdf
- Description:
- IC DGTL MEDIA PROCESSR 1031FCBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TMS320DM8168CCYG from Texas Instruments is a high-performance DaVinci digital media processor integrating an ARM Cortex-A8 RISC CPU (up to 1.2 GHz), a C674x floating-point DSP core (up to 1 GHz), three HDVICP2 video coprocessors, SGX530 3D graphics engine, dual DDR2/DDR3 interfaces, and HDMI 1.3 transmitter - designed for real-time HD video encode/decode/transcode in embedded media servers and digital signage systems.
For engineers reviewing the TMS320DM8168CCYG datasheet, TMS320DM8168CCYG pinout, TMS320DM8168CCYG application, or TMS320DM8168CCYG equivalent, key selection criteria include ARM+DSP heterogeneous compute capability, triple HDVICP2 acceleration, SGX530 GPU support, 1031-pin FCBGA package with Via Channel technology, and full Linux/RTOS software stack compatibility.
Technical Context
The TMS320DM8168CCYG implements a tightly coupled heterogeneous architecture: the ARM Cortex-A8 handles OS, control, and UI layers with 32KB I-cache, 32KB D-cache, and 256KB L2 cache; the C674x DSP executes computationally intensive video/audio algorithms with IEEE SP/DP floating-point support and 256KB L2 RAM; the Media Controller orchestrates HDVPSS and HDVICP2 resources for concurrent HD capture/display and multi-stream H.264/MPEG-2/VC-1 processing.
System-level integration includes a System MMU enabling unified virtual addressing across ARM, DSP, and peripherals; dual 32-bit DDR2/DDR3 controllers supporting up to DDR3-1600; PCIe 2.0 x2 root complex/endpoint mode; dual Gigabit Ethernet MACs with GMII/MDIO; and SATA 3.0 Gbps with NCQ - all coordinated via L3/L4 interconnect and programmable power domains using SmartReflex Level 2.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-A8 (up to 1.2 GHz) + C674x VLIW DSP (up to 1 GHz) |
| Video Acceleration | Three HDVICP2 engines: each supports 1080p60 H.264 encode/decode or multi-stream lower-resolution processing |
| Graphics Engine | SGX530 3D GPU (30 MTri/s, OpenGL ES 2.0, OpenVG 1.1) - available only on DM8168 |
| Memory Interface | Dual 32-bit DDR2/DDR3: supports DDR2-800 and DDR3-1600, up to 2GB total address space with DMM tiling/mirroring |
| Video I/O | HDVPSS with two 165-MHz HD capture channels, two 165-MHz HD display channels, HDMI 1.3 transmitter with HDCP |
| Connectivity | PCIe 2.0 x2, dual Gigabit EMAC (MII/GMII), dual USB 2.0 (host/device), SATA 3.0 Gbps, two I²C, three McASP, SPI, SD/SDIO |
| Package | FCBGA-1031 (25.0 mm × 25.0 mm) with Via Channel technology enabling 0.8-mm PCB routing on 0.65-mm pitch |
Pinout & Package
Package: FCBGA-1031 (25.0 mm × 25.0 mm), 0.65-mm ball pitch, Via Channel technology for enhanced PCB routing efficiency and reduced layer count.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DEV_CLKIN | Reference clock input | 1.8-V tolerant input for system oscillator (19.2–40 MHz); feeds PLLs for ARM/DSP/DDR clocks |
| DDR3_A[15:0] | DDR3 address bus | 16-bit address lines shared across both DDR3 channels; requires matched trace length for timing compliance |
| DDR3_DQ[63:0] | DDR3 data bus | 64-bit bidirectional data interface split across two 32-bit channels; supports DDR3-1600 (800 MHz) operation |
| HDMI_TX_CLK | HDMI pixel clock output | Differential 165-MHz LVDS clock for HDMI 1.3 timing; enables 1080p60 video output without external clock generator |
| PCIe_REFCLK_P/N | PCIe reference clock | 100-MHz differential reference clock input for PCIe PHY; required for Gen2 link training and stable enumeration |
| USB0_DRVVBUS | USB OTG power control | GPIO-controlled signal to enable VBUS on USB0 port during host mode; critical for USB device enumeration |
Key Features
| Feature | Design Value |
|---|---|
| Heterogeneous Compute Architecture | ARM Cortex-A8 + C674x DSP + three HDVICP2 coprocessors enables parallel execution of OS, control logic, and real-time video algorithms without resource contention |
| HD Video Processing Subsystem (HDVPSS) | Simultaneous dual HD capture (1080p60) and dual HD display (1080p60) with analog SD output and HDMI 1.3 digital output - no external video encoder/decoder IC required |
| SmartReflex Level 2 Power Management | Dynamic voltage and frequency scaling per subsystem (ARM, DSP, HDVICP2, DDR) reduces active power by up to 40% versus fixed-voltage operation |
| System MMU with Virtual Address Mapping | Hardware-enforced memory protection and translation for ARM, DSP, and DMA transfers - essential for secure multi-process OS environments like Linux |
| Via Channel BGA Packaging | Enables 2-layer PCB routing for 1031-pin FCBGA, cutting board cost and complexity while maintaining signal integrity at 165-MHz video and 800-MHz DDR3 speeds |
Applications
| Video Security DVR/NVR | Media Server Appliance |
|---|---|
Use Scenario: Multi-channel IP camera recording with real-time motion detection, analytics, and remote streaming. IC Role / Device Role / Timing Role: TMS320DM8168CCYG serves as the central media processing unit - ARM runs Linux and network stack, DSP handles audio preprocessing, HDVICP2 engines perform simultaneous H.264 encode of 4×1080p30 streams. Use Value: Eliminates need for discrete video encoding ASICs; supports 4K transcoding via HDVICP2 parallelism and DDR3 bandwidth for frame buffering. | Use Scenario: On-premise enterprise video server delivering live and on-demand HD content to web and mobile clients. IC Role / Device Role / Timing Role: TMS320DM8168CCYG acts as the unified media transcoder - ARM manages HTTP/RTMP servers and DRM, SGX530 renders HTML5 video UI, HDVICP2 engines transcode incoming 1080p60 to multiple bitrates. Use Value: Achieves >10× real-time transcode throughput (e.g., 10×1080p30→720p30) using hardware-accelerated pipelines, reducing CPU load and thermal footprint. |
| Digital Signage Player | Video Conferencing Endpoint |
Use Scenario: 4K-capable retail display running dynamic ad playlists, touch UI, and network updates. IC Role / Device Role / Timing Role: TMS320DM8168CCYG functions as the multimedia SoC - ARM executes Qt-based GUI and content scheduler, SGX530 renders vector graphics and video overlays, HDVPSS drives HDMI 4K@30 output. Use Value: Integrates GPU, video I/O, and compute in single chip; eliminates external frame buffer and timing controller, simplifying BOM and layout. | Use Scenario: Compact room system with dual-camera input, speakerphone, and screen sharing over SIP/H.323. IC Role / Device Role / Timing Role: TMS320DM8168CCYG operates as the conferencing media processor - HDVPSS captures dual HD feeds, HDVICP2 encodes/decodes H.264 SVC streams, ARM handles signaling and echo cancellation. Use Value: Enables sub-100ms end-to-end latency for lip-sync audio/video using dedicated hardware pipelines and low-jitter DDR3 memory access. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar digital media processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TMS320DM8167CYG | Same ARM/DSP cores and HDVPSS, but lacks SGX530 GPU and has only two HDVICP2 engines (vs. three) | Suitable for cost-sensitive HD encode-only systems without 3D UI requirements | Select when GPU rendering and third HDVICP2 channel are unnecessary; identical pinout and software compatibility |
| i.MX6Q | ARM Cortex-A9 quad-core (1 GHz), Vivante GC2000 GPU, no dedicated video coprocessor - relies on CPU/GPU for encode/decode | Better for general-purpose Linux applications with light video; limited to 1080p30 decode without additional acceleration | Choose for simpler UI-centric designs where software-based video processing suffices and PCIe/SATA are not required |
Compared with TMS320DM8167CYG, the TMS320DM8168CCYG adds SGX530 graphics and a third HDVICP2 engine for higher-density transcoding; compared with i.MX6Q, it delivers deterministic 1080p60 hardware acceleration and broader peripheral integration (PCIe, dual SATA, HDVPSS), making it superior for professional media infrastructure.
Availability
TMS320DM8168CCYG is available at Aetrix Electronics and suitable for video security DVR/NVR, media server appliances, and digital signage players requiring stable component supply, long-term industrial lifecycle support, and qualified automotive-grade traceability.
Supply support for TMS320DM8168CCYG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog, embedded processing, and wireless connectivity solutions for industrial, automotive, and consumer markets.
The TMS320DM8168CCYG belongs to TI's DaVinci digital media processor family, engineered specifically for high-throughput, low-latency HD video infrastructure applications including encoding, decoding, transcoding, and rich GUI rendering in resource-constrained embedded systems.
FAQ
What is the maximum video resolution and frame rate supported by the TMS320DM8168CCYG?
The TMS320DM8168CCYG supports up to 1080p60 (1920×1080 @ 60 fps) for both encode and decode operations per HDVICP2 engine. With three HDVICP2 engines, it can process multiple 1080p60 streams simultaneously - for example, four 1080p30 encode streams or two 1080p60 decode streams - leveraging its HDVPSS and DDR3 bandwidth for frame buffering and transport.
Does the TMS320DM8168CCYG include an integrated graphics processing unit?
Yes, the TMS320DM8168CCYG integrates the PowerVR SGX530 3D graphics engine, delivering up to 30 million triangles per second with full support for OpenGL ES 2.0, OpenVG 1.1, and Direct3D Mobile. This GPU is exclusive to the DM8168 variant and is absent in DM8167/DM8165 - enabling rich GUIs, video overlays, and interactive signage without external graphics ICs.
What memory technologies does the TMS320DM8168CCYG support, and what are the maximum data rates?
The TMS320DM8168CCYG supports dual 32-bit DDR2 and DDR3 SDRAM interfaces, with DDR3 capable of up to 1600 Mbps (DDR3-1600) and DDR2 up to 800 Mbps (DDR2-800). It also includes a 512KB on-chip OCM RAM, 256KB L2 cache for ARM, 256KB L2 RAM for DSP, and 48KB boot ROM - all accessible via the System MMU for coherent memory management.
Is the TMS320DM8168CCYG pin-compatible with other devices in the DM816x family?
Yes, the TMS320DM8168CCYG shares the same 1031-pin FCBGA (CYG) package and pinout with TMS320DM8167CYG and TMS320DM8165CYG. This allows hardware design reuse across variants - for example, a single PCB can support DM8168, DM8167, or DM8165 depending on firmware and feature licensing, with differences limited to internal IP blocks (SGX530, third HDVICP2).
What development tools and software support are available for the TMS320DM8168CCYG?
Texas Instruments provides comprehensive support for the TMS320DM8168CCYG, including Code Generation Tools (C/C++ compilers for ARM and C674x), DSP/BIOS and SYS/BIOS real-time kernels, Linux SDK with kernel 2.6.37 and GStreamer plugins, HDVICP2 codec libraries (H.264, MPEG-2, VC-1), and evaluation modules like the DM8168 EVM. TI's Processor SDK further enables rapid prototyping with pre-integrated drivers and demo applications.
TMS320DM8168CCYG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- DM81x Video SOC, DaVinci™
- Package/Case:
- 1031-BFBGA, FCBGA
- Packaging:
- Bulk
- Product Status:
- Active
- Type:
- Digital Media System-on-Chip (DMSoC)
- Interface:
- EBI/EMI, Ethernet, I2C, McASP, McBSP, PCI, Serial ATA, SD/SDIO, SPI, UART, USB
- Clock Rate:
- 800MHz DSP, 1.0GHz ARM®
- Non-Volatile Memory:
- ROM (48kB)
- On-Chip RAM:
- 1.5MB
- Voltage - I/O:
- 1.5V, 1.8V, 3.3V
- Voltage - Core:
- 1.00V
- Operating Temperature:
- 0°C ~ 95°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 1031-FCBGA (25x25)
TMS320DM8168CCYG FAQ
1.How can I place an order for TMS320DM8168CCYG through Aetrix?
Please submit a Request for Quotation (RFQ) for TMS320DM8168CCYG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TMS320DM8168CCYG reliable?
The price and inventory of TMS320DM8168CCYG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TMS320DM8168CCYG is usually 5 days.
3.What payment methods are accepted for TMS320DM8168CCYG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TMS320DM8168CCYG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TMS320DM8168CCYG?
TMS320DM8168CCYG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TMS320DM8168CCYG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TMS320DM8168CCYG?
For technical support, including TMS320DM8168CCYG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TMS320DM8168CCYG requirements.
6.How does Aetrix verify that TMS320DM8168CCYG is sourced from the original manufacturer or authorized distributors?
All TMS320DM8168CCYG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TMS320DM8168CCYG meets industry standards.
7.What is the process for return or replacement of TMS320DM8168CCYG?
All TMS320DM8168CCYG units undergo pre-shipment inspection (PSI). If there is an issue with TMS320DM8168CCYG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TMS320DM8168CCYG part is unused and in its original packaging.
Return procedure for TMS320DM8168CCYG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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