Texas Instruments TMS320F28032PAGQ
- Part No.:
- TMS320F28032PAGQ
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 64-TQFP
- Datasheet:
-
TMS320F28032PAGQ.pdf
- Description:
- IC MCU 32BIT 64KB FLASH 64TQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TMS320F28032PAGQ from Texas Instruments is a 60-MHz C28x-core real-time microcontroller with integrated control peripherals, designed for closed-loop motor and power conversion systems. It delivers 16.67-ns instruction cycle time, 32-bit floating-point CLA acceleration, 32 KB on-chip Flash, 10 KB SARAM, and supports automotive AEC-Q100 Grade 1 (–40°C to 125°C) operation in TQFP-64 packaging.
For engineers reviewing the TMS320F28032PAGQ datasheet, TMS320F28032PAGQ pinout, TMS320F28032PAGQ application, or TMS320F28032PAGQ equivalent, key selection criteria include ePWM channel count (12), ADC resolution (12-bit, 4.6 MSPS), HRPWM capability, eCAN/LIN interface support, and Q-grade qualification for automotive powertrain and charging modules.
Technical Context
The TMS320F28032PAGQ implements a Harvard-architecture C28x CPU with atomic operations and fast interrupt response, coupled with a dedicated CLA that executes control law code independently of the main CPU. Its memory subsystem includes 32 KB Flash (with security wrapper), 10 KB SARAM, 8 KB Boot ROM, and 1 KB OTP - all accessible via unified programming model.
Peripheral integration centers on real-time control: 12 ePWM channels (7 with high-resolution extension), 12-channel 12-bit ADC (4.6 MSPS, dual sample-and-hold), 3 comparators with DACs, eCAP/eQEP/HRCAP modules, and serial interfaces including eCAN, LIN, I²C, SPI (2), and SCI. All operate under single 3.3-V supply with internal VREG and no sequencing requirement.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | C28x 32-bit fixed-point, 60 MHz (16.67 ns cycle), little-endian, Harvard architecture |
| Control Law Accelerator | Dedicated 32-bit floating-point CLA; executes control loops independent of CPU, reducing latency |
| Flash Memory | 32 KB × 16-bit with code-security module, 128-bit lock key, and secure boot ROM |
| ADC Performance | 12-bit, 4.6 MSPS sampling rate, 12 input channels, dual sample-and-hold, 500 ns conversion time |
| ePWM Channels | 12 channels total; 7 support high-resolution mode (HRPWM) for sub-nanosecond duty-cycle control |
| Operating Temperature | AEC-Q100 qualified Grade 1: –40°C to +125°C ambient, suitable for automotive under-hood applications |
| Package & Pin Count | 64-pin Thin Quad Flatpack (TQFP), 10.0 mm × 10.0 mm body, 0.5 mm pitch |
Pinout & Package
64-pin PAG TQFP package (10.0 mm × 10.0 mm, 0.5 mm pitch) with exposed thermal pad; compatible with standard reflow profiles and industrial PCB assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDIO, VDDA | Power supply rails | VDD = 3.3 V core/io; VDDA = 3.3 V analog; VDDIO = 3.3 V I/O; internal regulator enables single-rail operation |
| X1, X2 | Clock oscillator inputs | Support external crystal (4–20 MHz) or external clock source; PLL generates 60 MHz SYSCLK |
| GPIO0–GPIO33 | Configurable digital I/O | 45 total GPIO (33 available on PAG); multiplexed with ePWM, eCAP, eQEP, ADC, and serial functions |
| EPWM1A–EPWM12B | PWM output terminals | 12 independent PWM outputs; 7 support HRPWM for <100 ps resolution in duty-cycle modulation |
| ADCINA0–ADCINA7, ADCINB0–ADCINB7 | Analog inputs | 16-channel 12-bit ADC with two banks (A/B); VREFHI/VREFLO referenced, ratio-metric support |
| CANTXA, CANRXA | eCAN transceiver interface | Enhanced Controller Area Network compliant with ISO 11898-1; 32-message mailbox, programmable bit timing |
| LINTXA, LINRXA | LIN bus interface | Local Interconnect Network physical layer support; UART-based protocol for automotive sub-system communication |
| TCK, TMS, TDI, TDO, TRST | JTAG debug interface | IEEE 1149.1-compliant boundary scan; TRST requires external 2.2-kΩ pulldown for functional mode stability |
Key Features
| Feature | Design Value |
|---|---|
| Single 3.3-V supply operation | Eliminates multi-rail power design; internal VREG and POR/BOR simplify system-level power architecture |
| Code-security module | 128-bit encryption key and lock mechanism prevents firmware reverse engineering and unauthorized flash access |
| High-resolution PWM (HRPWM) | 7 ePWM channels support sub-nanosecond duty-cycle adjustment-critical for resonant LLC and SiC/GaN gate drive precision |
| Integrated analog comparators | 3 comparators with internal 10-bit DAC references; outputs directly route to PWM trip zones for hardware fault response <100 ns |
| Automotive qualification | AEC-Q100 Grade 1 certification ensures reliability in harsh environments: vibration, thermal cycling, and ESD (±8 kV HBM) |
Applications
| EV On-Board Charger (OBC) | Industrial AC-DC Power Supply |
|---|---|
Use Scenario: Bidirectional AC/DC conversion in electric vehicle onboard chargers with active PFC and LLC resonant stages. IC Role / Device Role / Timing Role: Real-time controller managing interleaved PFC, phase-shifted full-bridge, and synchronous rectification via 12 ePWM channels and HRPWM. Use Value: Enables >96% efficiency at 6.6 kW with adaptive dead-time control and fast overcurrent shutdown using comparator-to-PWM trip routing. | Use Scenario: High-efficiency telecom rectifier or server PSU requiring tight voltage regulation and dynamic load transient response. IC Role / Device Role / Timing Role: Primary-side digital controller executing PID loops for voltage/current regulation, synchronized to isolated gate drivers via EPWMSYNCI/O signals. Use Value: 4.6 MSPS ADC and dual sample-and-hold allow simultaneous current/voltage sensing for feedforward compensation and cycle-by-cycle current limiting. |
| Solar Microinverter | AC Input BLDC Motor Drive |
Use Scenario: Single-phase grid-tied solar microinverter with MPPT, DC-AC inversion, and anti-islanding protection. IC Role / Device Role / Timing Role: Dual-loop controller running MPPT algorithm on CLA and grid-synchronization + PWM generation on C28x core. Use Value: CLA offloads 32-bit floating-point MPPT calculations from CPU, freeing bandwidth for real-time grid synchronization and harmonic mitigation. | Use Scenario: HVAC blower or compressor drive using sensorless FOC with back-EMF estimation and space-vector modulation. IC Role / Device Role / Timing Role: Sensorless motor controller using eQEP for position feedback (if encoder present) and eCAP for hall/sensorless commutation timing. Use Value: Integrated 12-bit ADC with 12-channel mux and 500 ns conversion enables precise current sampling across three shunt resistors per PWM cycle. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar real-time control applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TMS320F28032PAG | Same core, peripherals, and pinout; commercial temperature range (–40°C to 105°C), non-AEC-Q100 qualified | Suitable for industrial motor drives and UPS where automotive qualification is not required | Select when cost sensitivity outweighs automotive qualification needs and ambient temperature stays ≤105°C |
| TMS320F28035PAG | Higher memory: 64 KB Flash, 10 KB SARAM; adds CLA (present only on F28033/F28035); same 64-pin TQFP package | Better suited for complex algorithms (e.g., predictive control, multi-axis coordination) requiring larger code footprint | Choose when CLA-enabled control law execution and expanded Flash/SARAM are needed without changing PCB layout |
Compared with TMS320F28032PAGQ, the TMS320F28032PAG offers identical functionality at lower cost for non-automotive use, while TMS320F28035PAG provides CLA acceleration and doubled Flash capacity-enabling more sophisticated real-time control without pinout or package change.
Availability
TMS320F28032PAGQ is available at Aetrix Electronics and suitable for EV charging station power modules, industrial AC-DC power supplies, and solar microinverters requiring stable component supply and long-term automotive-grade availability.
Supply support for TMS320F28032PAGQ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and consumer markets.
The TMS320F2803x family belongs to TI's C2000™ real-time control MCU portfolio, engineered specifically for high-precision, low-latency closed-loop control in motor drives, digital power, and energy conversion systems.
FAQ
What is the maximum operating frequency of the TMS320F28032PAGQ?
The TMS320F28032PAGQ operates at a maximum CPU frequency of 60 MHz, corresponding to a 16.67-ns instruction cycle time. This speed is achieved using an internal PLL driven by either an external crystal (X1/X2) or external clock input (XCLKIN), with configurable division ratios to generate SYSCLKOUT. The device maintains this performance across its full AEC-Q100 Grade 1 temperature range (–40°C to +125°C).
Does the TMS320F28032PAGQ include a hardware accelerator for control algorithms?
No, the TMS320F28032PAGQ does not include the Control Law Accelerator (CLA). According to TI's official device comparison table, CLA is only present in the TMS320F28033 and TMS320F28035 variants. The TMS320F28032PAGQ relies solely on its C28x CPU for control loop execution, supporting fixed-point math and fast interrupt response but lacking independent floating-point acceleration.
How many PWM channels does the TMS320F28032PAGQ support, and which support high resolution?
The TMS320F28032PAGQ supports 12 ePWM channels. Of these, 7 channels (EPWM1–EPWM7) are enhanced with High-Resolution PWM (HRPWM) capability, enabling duty-cycle resolution down to approximately 150 ps. This feature is critical for precise gate timing in SiC and GaN-based power stages, and is implemented via extended timer submodules within the ePWM peripheral.
Is the TMS320F28032PAGQ pin-compatible with other devices in the F2803x family?
Yes, the TMS320F28032PAGQ shares identical pinout and package (64-pin TQFP, PAG) with all other PAG-option F2803x devices-including TMS320F28030PAG, TMS320F28031PAG, TMS320F28033PAG, TMS320F28034PAG, and TMS320F28035PAG. Peripheral signal assignments, power/ground pin locations, and JTAG interface mapping are fully consistent across this package variant.
What serial communication interfaces are integrated into the TMS320F28032PAGQ?
The TMS320F28032PAGQ integrates five serial interfaces: one eCAN module (ISO 11898-1 compliant), one LIN module (UART-based physical layer), one I²C module, two SPI modules, and one SCI (UART-compatible) module. These are mapped to dedicated pins on the 64-pin TQFP package and support concurrent operation-enabling communication with gate drivers, sensors, battery management ICs, and host controllers in automotive and industrial systems.
TMS320F28032PAGQ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 64-TQFP
- Series:
- C2000™ C28x Piccolo™
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- C28x
- Core Size:
- 32-Bit Single-Core
- Speed:
- 60MHz
- Connectivity:
- CANbus, I2C, LINbus, SCI, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, PWM, WDT
- Number of I/O:
- 33
- Program Memory Size:
- 64KB (32K x 16)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 10K x 16
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 1.995V
- Data Converters:
- A/D 14x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
TMS320F28032PAGQ FAQ
1.How can I place an order for TMS320F28032PAGQ through Aetrix?
Please submit a Request for Quotation (RFQ) for TMS320F28032PAGQ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TMS320F28032PAGQ reliable?
The price and inventory of TMS320F28032PAGQ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TMS320F28032PAGQ is usually 5 days.
3.What payment methods are accepted for TMS320F28032PAGQ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TMS320F28032PAGQ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TMS320F28032PAGQ?
TMS320F28032PAGQ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TMS320F28032PAGQ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TMS320F28032PAGQ?
For technical support, including TMS320F28032PAGQ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TMS320F28032PAGQ requirements.
6.How does Aetrix verify that TMS320F28032PAGQ is sourced from the original manufacturer or authorized distributors?
All TMS320F28032PAGQ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TMS320F28032PAGQ meets industry standards.
7.What is the process for return or replacement of TMS320F28032PAGQ?
All TMS320F28032PAGQ units undergo pre-shipment inspection (PSI). If there is an issue with TMS320F28032PAGQ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TMS320F28032PAGQ part is unused and in its original packaging.
Return procedure for TMS320F28032PAGQ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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