Texas Instruments TMS320F28034PAGQR
- Part No.:
- TMS320F28034PAGQR
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 64-TQFP
- Datasheet:
-
TMS320F28034PAGQR.pdf
- Description:
- IC MCU 32BIT 128KB FLASH 64TQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,466
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TMS320F28034PAGQR from Texas Instruments is a 64-pin TQFP C2000™ real-time microcontroller featuring a 60MHz C28x CPU, programmable Control Law Accelerator (CLA), 32KB on-chip Flash, 10KB SARAM, 12-bit 4.6 MSPS ADC with 16 channels, and integrated ePWM (12 channels), eCAP (1), eQEP (1), eCAN, I²C, SPI (2), SCI, and LIN peripherals. It targets motor control and digital power applications requiring deterministic low-latency execution.
For engineers reviewing the TMS320F28034PAGQR datasheet, TMS320F28034PAGQR pinout, TMS320F28034PAGQR application, or TMS320F28034PAGQR equivalent, key selection factors include CLA offload capability, high-resolution PWM timing precision, analog integration (ADC + comparators + temperature sensor), automotive-grade AEC-Q100 qualification (Q temperature grade), and 64-pin TQFP package compatibility with board-level thermal and routing constraints.
Technical Context
The TMS320F28034PAGQR implements a Harvard-architecture 32-bit C28x CPU with atomic operations and fast interrupt response, paired with a dedicated 32-bit floating-point CLA that executes control loops independently of the main CPU. Its memory subsystem includes 32KB Flash (secure), 10KB SARAM (0-wait), 8KB Boot ROM, and 1KB OTP, all accessible via unified addressing.
Peripheral integration centers on real-time control: 12 ePWM channels (with HRPWM support), 1 eCAP, 1 eQEP, dual-sample-and-hold 12-bit ADC (4.6 MSPS, 16 inputs), three 32-bit CPU timers, and serial interfaces including eCAN, LIN, I²C, dual SPI, and SCI - all managed through a Peripheral Interrupt Expansion (PIE) block for deterministic latency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | C28x 32-bit fixed-point, 60 MHz (16.67 ns cycle time), Harvard architecture, unified memory model |
| Control Law Accelerator | Dedicated 32-bit floating-point CLA; executes control code in parallel with CPU, reducing main CPU load |
| Flash Memory | 32 KB × 16-bit; supports secure code storage, in-field updates, and boot from Flash or ROM |
| ADC Performance | 12-bit, 4.6 MSPS sampling rate, 216.67 ns conversion time, 16 input channels with dual sample-and-hold |
| ePWM Channels | 12 independent channels; each includes high-resolution extension (HRPWM) for sub-nanosecond duty-cycle control |
| Package & Temp Range | 64-pin TQFP (PAG), 10 mm × 10 mm; rated for –40°C to 125°C (AEC-Q100 qualified Q grade) |
| Supply Voltage | Single 3.3 V nominal supply; internal voltage regulator eliminates need for external sequencing or multiple rails |
Pinout & Package
64-pin Thin Quad Flatpack (TQFP), body size 10.0 mm × 10.0 mm, lead pitch 0.5 mm, RoHS-compliant, moisture sensitivity level 3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDIO, VDDA | Power supply inputs | VDD = core logic (1.8 V internal regulated); VDDIO = I/O bank (3.3 V); VDDA = analog domain (3.3 V) - decoupling required per datasheet layout guidelines |
| VSS, VSSA, VREFLO | Ground and reference returns | VSS = digital ground; VSSA = analog ground; VREFLO = ADC reference low - separate analog/digital ground planes recommended |
| X1, X2 | Crytal oscillator terminals | Supports external crystal/resonator up to 20 MHz; internal oscillators available as alternatives |
| GPIO0–GPIO33 | General-purpose I/O | 45 total GPIO (multiplexed); 33 available on PAG package; configurable pullup, drive strength, and peripheral function mapping |
| EPWM1A–EPWM12B | PWM output pairs | 12 ePWM modules; each provides complementary A/B outputs with dead-band, trip-zone, and HRPWM edge control |
| ADCINA0–ADCINA7, ADCINB0–ADCINB7 | ADC analog inputs | 16-channel 12-bit ADC; dual sample-and-hold enables simultaneous sampling of two signals |
| CANTXA, CANRXA | eCAN transceiver interface | Controller Area Network physical layer interface supporting ISO 11898-1; requires external transceiver for bus connection |
| TCK, TMS, TDI, TDO, TRST | JTAG debug interface | IEEE 1149.1-compliant boundary scan; TRST requires external 2.2 kΩ pulldown resistor for reliable debug operation |
Key Features
| Feature | Design Value |
|---|---|
| Programmable Control Law Accelerator (CLA) | Offloads time-critical control loops (e.g., FOC, PID) from main CPU, enabling deterministic sub-microsecond loop execution |
| High-Resolution PWM (HRPWM) | Enables <150 ps duty-cycle resolution and dual-edge modulation for precise switching control in SiC/GaN power stages |
| Analog Integration | On-chip 12-bit ADC (4.6 MSPS), 3 analog comparators with 10-bit DAC references, and temperature sensor reduce external component count |
| Code Security Module | 128-bit encryption key and lock mechanism prevents firmware reverse engineering and unauthorized Flash/SARAM/OTP access |
| AEC-Q100 Qualified | Qualified to Grade 1 (–40°C to 125°C) for automotive powertrain and charging systems - validated for reliability and stress testing |
Applications
| Motor Drive Control | Solar Inverter Power Stage |
|---|---|
Use Scenario: Closed-loop field-oriented control (FOC) of 3-phase BLDC/PMSM motors in HVAC compressors and industrial pumps. IC Role / Device Role / Timing Role: Real-time execution of FOC algorithm (current/voltage sensing, Clarke/Park transforms, space-vector PWM generation) with CLA acceleration and sub-μs PWM update. Use Value: Enables >98% efficiency at variable speed, reduces thermal stress on gate drivers via precise HRPWM dead-time control, and supports sensorless startup using ADC + comparator zero-crossing detection. | Use Scenario: MPPT and grid-synchronization control in single-phase string inverters for residential solar installations. IC Role / Device Role / Timing Role: Simultaneous sampling of DC-link voltage/current and AC grid voltage/current via dual-sample-and-hold ADC; real-time calculation of d/q-axis currents and phase-locked loop (PLL) tracking. Use Value: Achieves <10 ms MPPT response time and <2% THD in injected current waveform using hardware-accelerated trigonometric functions and synchronized 12-channel ADC sampling. |
| EV On-Board Charger (OBC) | Industrial DC/DC Converter |
Use Scenario: Bidirectional AC/DC and DC/DC power conversion in 6.6 kW OBC modules for Level 2 EV charging. IC Role / Device Role / Timing Role: Dual-core coordination: C28x manages communication (CAN/LIN), safety monitoring, and thermal management; CLA handles high-frequency PFC and LLC resonant control loops. Use Value: Supports 96% peak efficiency across 200–450 V DC input range; CLA offload enables 100+ kHz switching with <500 ns jitter, meeting CISPR-25 Class 5 EMI requirements. | Use Scenario: Isolated 48 V-to-12 V DC/DC conversion in telecom rectifiers and server PSUs. IC Role / Device Role / Timing Role: Digital control of synchronous rectification, adaptive dead-time compensation, and active current sharing across paralleled phases using ePWM sync signals and ADC oversampling. Use Value: Delivers <±0.5% output regulation under 0–100% load step; HRPWM fine-tuning improves light-load efficiency by 3.2% versus fixed-frequency control. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar real-time control applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TMS320F28034PAGT | Same silicon, identical electrical specs; differs only in tape-and-reel packaging (TR) vs. cut-tape (QR) and extended temperature screening (T: –40°C to 105°C vs. Q: –40°C to 125°C) | Non-automotive industrial use where AEC-Q100 qualification is not required | Select PAGT for cost-sensitive commercial applications without automotive qualification needs |
| TMS320F28035PAGQR | Higher memory: 64KB Flash + 10KB SARAM vs. 32KB Flash + 10KB SARAM; adds CLA (present in both) and 14 ePWM channels vs. 12 | Applications requiring larger control algorithms (e.g., multi-axis servo, complex observer-based control) or additional PWM outputs (e.g., 3-phase inverter + auxiliary converter) | Select PAGQR when algorithm size exceeds 32KB or >12 PWM outputs are needed; otherwise, PAGQR offers optimal cost/performance balance |
Compared with TMS320F28034PAGT and TMS320F28035PAGQR, the TMS320F28034PAGQR delivers AEC-Q100 qualification at 32KB Flash - making it the minimal-cost automotive-qualified option for mid-complexity motor and power control, while avoiding over-provisioned memory or unnecessary temperature margin.
Availability
TMS320F28034PAGQR is available at Aetrix Electronics and suitable for EV on-board chargers, solar string inverters, and industrial motor drives requiring stable component supply, long-term lifecycle support, and automotive-grade reliability.
Supply support for TMS320F28034PAGQR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, designing and manufacturing analog ICs, embedded processors, and system-on-chip solutions for industrial, automotive, and consumer markets.
The TMS320F2803x family belongs to TI's C2000™ real-time control MCU portfolio, engineered specifically for closed-loop control in power electronics - emphasizing deterministic timing, analog integration, and computational acceleration for motor drives, digital power, and renewable energy systems.
FAQ
What is the maximum operating frequency and instruction cycle time of the TMS320F28034PAGQR?
The TMS320F28034PAGQR operates at a maximum CPU frequency of 60 MHz, delivering a 16.67 ns instruction cycle time. This timing is guaranteed across its full operating temperature range of –40°C to 125°C and 3.3 V supply, enabling deterministic real-time execution for high-speed control loops such as SiC-based PFC or resonant LLC converters. The TMS320F28034PAGQR achieves this performance without requiring external clock multiplication or PLL configuration beyond factory defaults.
Does the TMS320F28034PAGQR include a hardware accelerator for control law computation?
Yes, the TMS320F28034PAGQR integrates a dedicated 32-bit floating-point Control Law Accelerator (CLA) that runs independently of the main C28x CPU. The CLA can execute critical control tasks - such as Park/Clarke transforms, PI regulators, or observer calculations - in parallel, reducing main CPU loading and improving loop determinism. This feature is confirmed in the device comparison table and functional block diagram of the TMS320F28034PAGQR datasheet, and is active in all package variants including the PAGQR.
How many PWM channels does the TMS320F28034PAGQR support, and what resolution features are included?
The TMS320F28034PAGQR supports 12 enhanced PWM (ePWM) modules, each with independent A/B outputs, dead-band generation, and trip-zone protection. All 12 channels include High-Resolution PWM (HRPWM) capability, enabling sub-nanosecond duty-cycle adjustment (down to ~150 ps) and dual-edge modulation for precise timing control in high-frequency GaN/SiC applications. This HRPWM functionality is explicitly documented in the device comparison table and peripheral description sections for the TMS320F28034PAGQR.
What analog peripherals are integrated into the TMS320F28034PAGQR?
The TMS320F28034PAGQR integrates a 12-bit, 4.6 MSPS analog-to-digital converter (ADC) with 16 input channels and dual sample-and-hold; three analog comparators with integrated 10-bit DAC references; an on-chip temperature sensor; and dedicated analog I/O pins (AIO0–AIO14). These components are electrically isolated within the analog domain (VDDA/VSSA) and support direct routing to PWM trip zones and CLA triggers - all confirmed in the "Enhanced control peripherals" section and device comparison table for the TMS320F28034PAGQR.
Is the TMS320F28034PAGQR qualified for automotive applications?
Yes, the TMS320F28034PAGQR is AEC-Q100 qualified (Grade 1) for automotive applications, with a specified operating temperature range of –40°C to 125°C. This qualification is explicitly stated in the "Temperature options" section and device comparison table, where the "Q" suffix denotes automotive qualification. The TMS320F28034PAGQR meets stress test requirements for humidity, thermal cycling, and ESD relevant to powertrain and charging systems - distinct from commercial-grade variants like the TMS320F28034PAGT.
TMS320F28034PAGQR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 64-TQFP
- Series:
- C2000™ C28x Piccolo™
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- C28x
- Core Size:
- 32-Bit Single-Core
- Speed:
- 60MHz
- Connectivity:
- CANbus, I2C, LINbus, SCI, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, POR, PWM, WDT
- Number of I/O:
- 33
- Program Memory Size:
- 128KB (64K x 16)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 10K x 16
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 1.995V
- Data Converters:
- A/D 14x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
TMS320F28034PAGQR FAQ
1.How can I place an order for TMS320F28034PAGQR through Aetrix?
Please submit a Request for Quotation (RFQ) for TMS320F28034PAGQR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TMS320F28034PAGQR reliable?
The price and inventory of TMS320F28034PAGQR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TMS320F28034PAGQR is usually 5 days.
3.What payment methods are accepted for TMS320F28034PAGQR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TMS320F28034PAGQR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TMS320F28034PAGQR?
TMS320F28034PAGQR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TMS320F28034PAGQR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TMS320F28034PAGQR?
For technical support, including TMS320F28034PAGQR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TMS320F28034PAGQR requirements.
6.How does Aetrix verify that TMS320F28034PAGQR is sourced from the original manufacturer or authorized distributors?
All TMS320F28034PAGQR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TMS320F28034PAGQR meets industry standards.
7.What is the process for return or replacement of TMS320F28034PAGQR?
All TMS320F28034PAGQR units undergo pre-shipment inspection (PSI). If there is an issue with TMS320F28034PAGQR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TMS320F28034PAGQR part is unused and in its original packaging.
Return procedure for TMS320F28034PAGQR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TMS320F28034PAGQR Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

