Texas Instruments TMS320F28035PAGTR

Overview

TMS320F28035PAGTR from Texas Instruments is a 60-MHz C28x-based real-time microcontroller with integrated Control Law Accelerator (CLA), 64KB flash, 10KB SARAM, 16-channel 12-bit ADC (4.6 MSPS), 14 ePWM channels (7 with high-resolution capability), and dual comparators with DACs - deployed in motor control, solar inverters, and EV charging power modules.

For engineers reviewing the TMS320F28035PAGTR datasheet, TMS320F28035PAGTR pinout, TMS320F28035PAGTR application, or TMS320F28035PAGTR equivalent, key selection criteria include CLA offloading capability, HRPWM dual-edge modulation support, analog integration (ADC + comparators + temperature sensor), and TQFP-64 packaging for compact industrial power control designs.

Technical Context

The TMS320F28035PAGTR implements a Harvard-architecture C28x CPU with atomic instructions and zero-wait-state memory access, enabling deterministic real-time loop execution. Its CLA operates independently of the main CPU using 32-bit floating-point math to accelerate control law computation.

Peripheral integration includes ePWM modules with HRPWM capable of sub-nanosecond timing resolution, eCAP/HRCAP for precise edge capture, and an ADC with dual sample-and-hold supporting synchronized multi-channel sampling - all accessible via a unified memory map and PIE interrupt controller.

Key Specifications

Pinout & Package

64-pin Thin Quad Flatpack (TQFP) package (PAG), 10.0 mm × 10.0 mm body size, 0.5 mm pitch, lead-free, RoHS compliant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar real-time control applications.

Compared with TMS320F28034PAGTR, the TMS320F28035PAGTR adds CLA offload and doubles flash/SRAM - critical for complex observer-based FOC. Versus TMS320F28035PN, it trades 16 GPIOs and 2 ADC channels for smaller footprint and lower assembly cost in space-constrained OBC or microinverter designs.

Availability

TMS320F28035PAGTR is available at Aetrix Electronics and suitable for motor control, solar inverter power stages, and EV on-board charger designs requiring stable component supply, long-term lifecycle support, and automotive-grade reliability validation.

Supply support for TMS320F28035PAGTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions, with leadership in real-time control, power management, and signal chain technologies.

The TMS320F28035PAGTR belongs to TI's C2000™ real-time control MCU portfolio, designed specifically for high-precision, low-latency closed-loop systems in digital power, motor control, and renewable energy conversion.

FAQ

What is the maximum operating frequency and instruction cycle time of the TMS320F28035PAGTR?

The TMS320F28035PAGTR operates at a maximum CPU frequency of 60 MHz, delivering a 16.67 ns instruction cycle time. This timing is confirmed in the device comparison table and supported by the on-chip PLL and clock configuration registers. The TMS320F28035PAGTR maintains deterministic execution for real-time control loops, with no wait states for flash or SARAM access under nominal conditions.

Does the TMS320F28035PAGTR include a Control Law Accelerator (CLA), and how is it used?

Yes, the TMS320F28035PAGTR includes a dedicated 32-bit floating-point CLA that executes control algorithms independently of the main C28x CPU. It accesses shared RAM and peripherals like ePWM and ADC via its own bus, enabling parallel execution of time-critical tasks such as field-oriented control or PID updates without CPU intervention. This feature is exclusive to the F28033 and F28035 variants in the F2803x family.

What are the ADC specifications of the TMS320F28035PAGTR, and how many channels does it support?

The TMS320F28035PAGTR integrates a 12-bit analog-to-digital converter with 4.6 MSPS sampling rate, 216.67 ns conversion time, and dual sample-and-hold capability. It supports 16 total input channels (ADCINA0–7 and ADCINB0–7), organized in two banks for simultaneous sampling. The ADC uses a ratio-metric reference (VREFHI/VREFLO) and includes an on-chip temperature sensor.

How many ePWM channels does the TMS320F28035PAGTR support, and which ones offer high-resolution capability?

The TMS320F28035PAGTR provides 14 enhanced PWM (ePWM) modules. Of these, 7 channels (EPWM1–EPWM7) support high-resolution PWM (HRPWM) mode, enabling sub-nanosecond duty-cycle adjustment and dual-edge control for advanced SiC/GaN gate driving. HRPWM functionality is confirmed in the device comparison table and functional block diagram.

What package type and pin count does the TMS320F28035PAGTR use, and what is its temperature rating?

The TMS320F28035PAGTR uses a 64-pin Thin Quad Flatpack (TQFP) package designated "PAG", with 10.0 mm × 10.0 mm body size and 0.5 mm pitch. It is rated for industrial temperature operation from –40°C to 105°C (T-grade), as specified in the device ordering information and package table. This variant does not carry AEC-Q100 qualification (that applies only to -Q1 suffix parts).