Texas Instruments TMS320F28375DPTPS

Overview

TMS320F28375DPTPS from Texas Instruments is a dual-core 32-bit real-time microcontroller with two 200MHz C28x CPUs, IEEE 754 FPU, TMU, VCU-II, and two independent 200MHz CLA coprocessors. It integrates four 16-/12-bit ADCs (up to 4.4MSPS system throughput), 24 ePWM channels (16 HRPWM), dual CAN, USB 2.0, and 169 GPIOs. It targets high-precision motor control in EV traction inverters and solar power converters.

For engineers reviewing the TMS320F28375DPTPS datasheet, TMS320F28375DPTPS pinout, TMS320F28375DPTPS application, or TMS320F28375DPTPS equivalent, key selection criteria include dual-core deterministic latency, on-chip analog subsystem resolution (16-bit/1.1MSPS per ADC), HRPWM dead-band precision, functional safety certification (ISO 26262 ASIL B), and nFBGA-337 thermal performance under 105°C junction operation.

Technical Context

The TMS320F28375DPTPS implements a tightly coupled dual-C28x architecture where each CPU runs at 200MHz with dedicated FPU, TMU, and VCU-II for real-time torque-loop math and encoded signal processing. Each core pairs with an independent 200MHz CLA that executes time-critical control law code triggered by peripheral events - enabling concurrent background diagnostics and foreground actuation without CPU contention.

Its analog subsystem includes four independent ADCs configurable in 16-bit mode (1.1MSPS, differential inputs, 12 external channels) or 12-bit mode (3.5MSPS, single-ended, 24 channels), each with hardware post-processing (offset calibration, windowed compare, DAC-referenced comparators). The integrated SDFM supports isolated shunt current sensing via sigma-delta modulators, while CMPSS provides fast overcurrent protection using eight windowed comparators with 12-bit DAC references.

Key Specifications

Pinout & Package

Package: 337-ball New Fine Pitch Ball Grid Array (nFBGA), ZWT suffix, 16mm × 16mm body size, lead-free/green compliant. Thermal pad on underside for enhanced heat dissipation in high-power motor control applications.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core real-time control applications.

Compared with TMS320F28377DPTP and TMS320F28379DPTP, the TMS320F28375DPTPS offers optimized cost/performance balance for mid-tier traction inverters and solar string inverters where 512KB flash and 172KB RAM meet firmware requirements and ZWT pinout suffices for required peripherals.

Availability

TMS320F28375DPTPS is available at Aetrix Electronics and suitable for EV traction inverters, solar string inverters, and industrial AC-DC power supplies requiring stable component supply, long-term lifecycle assurance, and functional safety compliance.

Supply support for TMS320F28375DPTPS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and wireless technologies, with leadership in real-time control MCUs for industrial and automotive markets.

The TMS320F28375DPTPS belongs to TI's C2000™ Premium performance MCU line, designed specifically for deterministic, high-precision closed-loop control in power electronics - emphasizing low-latency PWM, high-resolution analog capture, and functional safety readiness.

FAQ

What is the maximum ADC sampling rate supported by the TMS320F28375DPTPS in 16-bit mode?

The TMS320F28375DPTPS supports up to 1.1MSPS per ADC in 16-bit mode, delivering a total system throughput of 4.4MSPS across its four independent ADCs. This rate is achieved with differential inputs and hardware-based post-processing including saturating offset calibration and windowed comparator triggering - critical for high-fidelity current sensing in 20kHz-switching inverters. The TMS320F28375DPTPS maintains this performance without CPU intervention due to dedicated DMA and CLA-assisted result handling.

Does the TMS320F28375DPTPS support functional safety certification for automotive use?

Yes, the TMS320F28375DPTPS is ISO 26262 ASIL B and IEC 61508 SIL 2 certified by TÜV SÜD, with hardware integrity qualified to ASIL B level. While it carries the 'T' temperature grade (–40°C to 105°C), not the automotive 'Q' grade, its safety documentation - including FMEDA reports and diagnostic coverage analysis - is fully available to support system-level ASIL B development in non-safety-critical vehicle subsystems such as auxiliary power converters. The TMS320F28375DPTPS does not have AEC-Q100 qualification.

How many high-resolution PWM (HRPWM) channels does the TMS320F28375DPTPS provide, and what is their timing resolution?

The TMS320F28375DPTPS provides 16 high-resolution PWM (HRPWM) channels, corresponding to both A and B outputs of eight ePWM modules. Each HRPWM channel achieves <150ps resolution through digital fractional delay tuning, enabling precise dead-band insertion down to 100ps steps - essential for preventing shoot-through in SiC/GaN-based 3-phase inverter gate drivers operating above 100kHz. This capability is implemented entirely in hardware and requires no CPU cycles to maintain.

What package type and pin count does the TMS320F28375DPTPS use, and is thermal management supported?

The TMS320F28375DPTPS uses a 337-ball New Fine Pitch Ball Grid Array (nFBGA) package with ZWT suffix, measuring 16mm × 16mm with a thermal pad on the underside. This package supports high-power dissipation in motor control applications, and TI provides detailed thermal resistance data (θ_JA = 21.5°C/W, θ_JC = 2.5°C/W) and layout guidelines for 4-layer PCBs with internal ground/power planes and thermal vias under the pad. The TMS320F28375DPTPS is rated for 105°C junction operation.

Can the TMS320F28375DPTPS execute control algorithms independently on both cores without inter-core contention?

Yes, the TMS320F28375DPTPS enables true independent dual-core execution: each C28x CPU has dedicated L1 RAM (2KB D0/D1, 1KB M0/M1), private timers, and interrupt vectors, while the two CLAs operate autonomously with their own 4KB data ROM and 128-word message RAM. Interprocessor communication occurs via hardware IPC mailboxes and shared memory with semaphore protection - eliminating software locks. This architecture allows CPU1+CLA1 to run torque loops while CPU2+CLA2 manages diagnostics and communications, with verified worst-case latency under 200ns for IPC-triggered responses in the TMS320F28375DPTPS.