Texas Instruments TMS370C712ANT
- Part No.:
- TMS370C712ANT
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 40-DIP (0.600", 15.24mm)
- Datasheet:
-
TMS370C712ANT.pdf
- Description:
- IC MCU 8BIT 8KB OTP 40DIP
- Quantity:
- Payment:

- Shipping:

Inventory:27,109
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TMS370C712ANT from Texas Instruments is an 8-bit CMOS microcontroller with 8 KB on-chip EPROM program memory, 256-byte data EEPROM, 256-byte RAM, and integrated peripherals including a 16-bit general-purpose timer, 24-bit watchdog timer, and SPI interface. It operates at 2–5 MHz SYSCLK using PLL or divide-by-4 clock options and supports automotive/industrial temperature ranges. It is used in embedded control applications such as motor drive supervision and sensor-based industrial monitoring.
For engineers reviewing the TMS370C712ANT datasheet, TMS370C712ANT pinout, TMS370C712ANT application, or TMS370C712ANT equivalent, key selection considerations include its OTP EPROM programmability, dual interrupt levels with edge-selectable external interrupts, software-configurable I/O pins, and compatibility with TMS370Cx1x development tools for rapid prototyping and low-volume production.
Technical Context
The TMS370C712ANT implements a register-to-register CPU architecture with 128–256 general-purpose registers and 14 addressing modes, eliminating accumulator bottlenecks. Its memory map integrates 8 KB EPROM (6000h–7FFFh), 256-byte data EEPROM (1F00h–1FFFh), and 256-byte RAM (0000h–00FFh) in a unified Von Neumann space.
It features a flexible 16-bit timer with prescaler (enabling 24-bit real-time counting), configurable as event counter, PWM generator, input capture, or pulse accumulator. The watchdog timer supports standard or hard reset modes depending on suffix (A/B), and the SPI operates in master/slave synchronous mode with variable-length shift register support.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | 8-bit register-to-register CPU with no accumulator bottleneck; enables direct register arithmetic (e.g., ADD R24,R47). |
| Program Memory | 8 KB EPROM (one-time-programmable), mapped at 6000h–7FFFh; supports in-circuit programming with 13 V on MC pin. |
| Data Memory | 256-byte data EEPROM (1F00h–1FFFh) with block-level write protection and internal charge pump-no external VPP required. |
| RAM Size | 256 bytes (0000h–00FFh), usable as general-purpose registers, stack, or data storage; retains contents during STANDBY/HALT modes. |
| Timer System | 16-bit general-purpose timer + 8-bit prescaler = 24-bit real-time capability; configurable as PWM, input capture, event counter, or compare unit. |
| Watchdog Timer | 24-bit watchdog with selectable behavior: standard (timeout resets CPU) or hard (timeout forces hardware reset); configured via suffix A/B. |
| Interrupt System | Two software-programmable priority levels (INT1 high-priority, INT2/INT3 lower), rising/falling-edge detect per external interrupt, individual mask bits. |
| SPI Interface | Full-duplex synchronous serial peripheral interface with master/slave operation; supports display drivers, ADCs, I/O expanders, and inter-microcontroller comms. |
Pinout & Package
Package: 28-pin plastic DIP (N package) or leaded chip carrier (LCC/FN package); RoHS-compliant variant TMS370C712ANT uses N package (PDIP).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A7 | Port A bidirectional I/O | General-purpose digital I/O; A0–A7 also serve as address bus in expanded memory mode. |
| D3–D7 | Port D bidirectional I/O | D3 doubles as SYSCLK output; all pins software-configurable for digital I/O or peripheral functions. |
| INT1/INT2/INT3 | External interrupt inputs | INT1 is non-maskable or maskable; INT2/INT3 are maskable; all support rising/falling-edge detection. |
| T1IC/CR, T1PWM, T1EVT | Timer 1 dedicated I/O | T1IC/CR: input capture or counter reset; T1PWM: PWM output; T1EVT: external event trigger input. |
| SPISOMI, SPISIMO, SPICLK | SPI interface signals | SPISOMI: slave-out/master-in; SPISIMO: slave-in/master-out; SPICLK: bidirectional serial clock. |
| RESET | Reset control | Bidirectional open-drain output; asserts low for ≥8 SYSCLK cycles on watchdog/oscillator fault or external low pulse. |
| MC | Mode control | Input enabling EEPROM/EPROM write-protection override when 12 V applied; also controls VPP during programming. |
| XTAL1/XTAL2/CLKIN | Oscillator interface | XTAL1: crystal oscillator output; XTAL2/CLKIN: crystal input or external clock source; supports PLL (divide-by-1) or divide-by-4 modes. |
Key Features
| Feature | Design Value |
|---|---|
| OTP EPROM Programmability | Enables low-volume production without mask costs; reprogramming requires UV erasure only for SE370 variants-TMS370C712ANT is one-time-programmable. |
| Low-Power Operation | STANDBY mode keeps oscillator and timer active; HALT stops all activity while preserving RAM and peripheral state-ideal for battery-backed systems. |
| Memory-Mapped Peripherals | All I/O, timer, SPI, and EEPROM registers reside in unified 16-bit address space (1010h–104Fh), simplifying driver development and reducing instruction overhead. |
| Flexible Interrupt Prioritization | Each of five hardware interrupts (including SPI and Timer1 sources) maps to unique vector addresses (7FF4h–7FFFh); priority order fixed per chain but assignable to Level 1 or Level 2. |
| CMOS/TTL-Compatible I/O | All 21 bidirectional I/O pins tolerate 5 V logic levels and drive standard TTL loads; no external level-shifting needed in mixed-voltage systems. |
| Development Tool Support | Fully compatible with Texas Instruments XDS22 emulator and CDT370 toolchain; supports C/assembly debugging, real-time trace, and in-circuit emulation via RS-232. |
Applications
| Motor Control Supervision | Industrial Sensor Interface |
|---|---|
|
Use Scenario: Monitoring overcurrent, thermal faults, and encoder feedback in brushless DC motor drives. IC Role / Device Role / Timing Role: Central controller executing closed-loop timing-critical routines using 16-bit timer PWM outputs and input capture on encoder edges. Use Value: On-chip 256-byte EEPROM stores calibration coefficients and fault logs across power cycles; 24-bit watchdog ensures fail-safe shutdown on firmware hang. |
Use Scenario: Aggregating analog sensor data (temperature, pressure) via external ADCs connected through SPI. IC Role / Device Role / Timing Role: SPI master coordinating burst reads from multiple daisy-chained ADCs; 16-bit timer provides precise sampling intervals. Use Value: Integrated SPI eliminates external interface ICs; 256-byte RAM buffers multi-channel samples before EEPROM logging or UART transmission. |
| Automotive Body Control | Legacy Industrial PLC Module |
|
Use Scenario: Managing door lock actuators, window lift motors, and interior lighting in automotive body electronics modules. IC Role / Device Role / Timing Role: Real-time I/O supervisor handling pulse-width modulated dimming and edge-triggered switch debouncing via INT1/INT2. Use Value: Dual interrupt levels isolate safety-critical lock actuation (Level 1) from non-critical lighting control (Level 2); automotive-grade temp range (-40°C to +125°C) ensures reliability. |
Use Scenario: Replacing aging 8051-based controllers in retrofit industrial PLC backplanes requiring deterministic I/O scanning. IC Role / Device Role / Timing Role: Deterministic scan engine using HALT mode between scans to reduce power; timer-driven 10 ms I/O update cycle. Use Value: Pin-compatible upgrade path for TMS370C312A/C312B; same 28-pin PDIP footprint and register mapping minimizes PCB redesign effort. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TMS370C712BNT | Same OTP EPROM and memory configuration, but uses hard watchdog and PLL-based clock (divide-by-1), whereas TMS370C712ANT uses standard watchdog and divide-by-4 oscillator. | Preferred where deterministic clock startup and stricter fault containment are required-e.g., safety-critical motor enable paths. | Select TMS370C712BNT if system design mandates hard watchdog behavior and higher SYSCLK stability; otherwise TMS370C712ANT offers simpler oscillator design. |
| TMS370C312ANT | Mask-ROM variant with 8 KB ROM (not programmable), 128-byte RAM, no data EEPROM, and identical peripheral set and pinout. | Targeted at high-volume cost-sensitive applications where firmware is finalized and field updates are unnecessary. | Choose TMS370C312ANT for mature, stable firmware deployments; retain TMS370C712ANT when in-field code updates or parameter tuning via EEPROM are required. |
Compared with TMS370C712BNT and TMS370C312ANT, the TMS370C712ANT uniquely balances field-programmability (via OTP EPROM), nonvolatile data storage (256-byte EEPROM), and flexible clocking-making it optimal for low-to-mid volume industrial control where firmware iteration and calibration persistence matter.
Availability
TMS370C712ANT is available at Aetrix Electronics and suitable for motor control supervision, industrial sensor interfacing, automotive body electronics, and legacy PLC module upgrades requiring stable component supply and long-term obsolescence management.
Supply support for TMS370C712ANT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader founded in 1930, specializing in analog, embedded processing, and connectivity technologies for industrial, automotive, and consumer markets.
The TMS370Cx1x family-including TMS370C712ANT-was designed for cost-effective, real-time embedded control in resource-constrained environments, emphasizing peripheral integration, low-power operation, and development ecosystem maturity.
FAQ
What is the maximum operating frequency of the TMS370C712ANT?
The TMS370C712ANT supports SYSCLK frequencies from 2 MHz to 5 MHz. When using the PLL (divide-by-1 mode), the internal clock matches the crystal or external clock source up to 5 MHz. In divide-by-4 mode, the input clock must be 0.5–5 MHz to yield a 2–5 MHz SYSCLK. The device's timing specifications are validated across this full range under commercial and industrial temperature conditions.
Does the TMS370C712ANT support in-circuit programming of its EPROM?
Yes, the TMS370C712ANT supports in-circuit EPROM programming. Applying 13 V to the MC pin enables programming mode, and the EPROM control register (EPCTL at P01Ch) manages write cycles. No device removal is required-programming occurs directly on the target board, provided proper voltage sequencing and timing per the SPNS012F datasheet are observed.
How does the watchdog timer behave on the TMS370C712ANT?
The TMS370C712ANT implements a 24-bit watchdog timer configured as "standard" (suffix A), meaning timeout triggers a software-initiated reset sequence-not a hardware latch. The watchdog must be periodically cleared via the WD key register; failure results in a controlled reset that preserves RAM contents and asserts RESET low for eight SYSCLK cycles, allowing coordinated system recovery.
Can the TMS370C712ANT operate in low-power modes, and what is retained?
Yes, the TMS370C712ANT supports STANDBY and HALT low-power modes. In STANDBY, the oscillator and 16-bit timer remain active while CPU execution halts; in HALT, all clocks stop. Both modes retain full RAM contents (except registers A and B, which reset to 00h), peripheral configuration bits, and I/O states-enabling rapid wake-up with minimal initialization overhead.
Is the TMS370C712ANT pin-compatible with other TMS370Cx1x devices?
Yes, the TMS370C712ANT shares identical 28-pin PDIP (N package) pinout and register mapping with TMS370C312ANT, TMS370C012A, and other members of the TMS370Cx1x family. This allows drop-in replacement in existing designs-though functional differences (e.g., EPROM vs. ROM, EEPROM presence, watchdog type) must be verified in firmware and system-level validation.
TMS370C712ANT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 40-DIP (0.600", 15.24mm)
- Series:
- TMS370
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- TMS370
- Core Size:
- 8-Bit
- Speed:
- 5MHz
- Connectivity:
- SPI
- Peripherals:
- PWM, WDT
- Number of I/O:
- 22
- Program Memory Size:
- 8KB (8K x 8)
- Program Memory Type:
- OTP
- EEPROM Size:
- 256 x 8
- RAM Size:
- 256 x 8
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- -
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
TMS370C712ANT FAQ
1.How can I place an order for TMS370C712ANT through Aetrix?
Please submit a Request for Quotation (RFQ) for TMS370C712ANT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TMS370C712ANT reliable?
The price and inventory of TMS370C712ANT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TMS370C712ANT is usually 5 days.
3.What payment methods are accepted for TMS370C712ANT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TMS370C712ANT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TMS370C712ANT?
TMS370C712ANT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TMS370C712ANT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TMS370C712ANT?
For technical support, including TMS370C712ANT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TMS370C712ANT requirements.
6.How does Aetrix verify that TMS370C712ANT is sourced from the original manufacturer or authorized distributors?
All TMS370C712ANT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TMS370C712ANT meets industry standards.
7.What is the process for return or replacement of TMS370C712ANT?
All TMS370C712ANT units undergo pre-shipment inspection (PSI). If there is an issue with TMS370C712ANT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TMS370C712ANT part is unused and in its original packaging.
Return procedure for TMS370C712ANT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TMS370C712ANT Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

