Texas Instruments TMS370C756ANMT
- Part No.:
- TMS370C756ANMT
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 64-DIP (0.750", 19.05mm)
- Datasheet:
-
TMS370C756ANMT.pdf
- Description:
- IC MCU 8BIT 16KB OTP 64DIP
- Quantity:
- Payment:

- Shipping:

Inventory:1,138
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TMS370C756ANMT from Texas Instruments is an 8-bit OTP EPROM microcontroller in 64-pin SDIP package, featuring 16 KB on-chip EPROM, 512 bytes data EEPROM, 512 bytes RAM, eight-channel 8-bit ADC, dual 16-bit timers, 24-bit watchdog, SCI1 and SPI interfaces, and PLL-based clock generation with SYSCLK up to 5 MHz - deployed in automotive sensor modules and industrial motor control firmware.
For engineers reviewing the TMS370C756ANMT datasheet, TMS370C756ANMT pinout, TMS370C756ANMT application, or TMS370C756ANMT equivalent, this page delivers verified functional identity, validated pin roles, confirmed memory architecture, real-world operating modes (microcomputer/microprocessor), and precise alternative selection guidance for legacy design continuity.
Technical Context
The TMS370C756ANMT implements a register-to-register CPU architecture eliminating accumulator dependency, supports both microcomputer (single-chip) and microprocessor (external bus) modes via MC pin configuration, and provides non-multiplexed 16-bit address/8-bit data expansion with five independent chip-select outputs (CSE1/CSE2/CSH1/CSH2/CSH3) and EDS strobe.
It integrates two serial interfaces: SCI1 (asynchronous RS-232-C compatible with SCITXD/SCIRXD/SCICLK) and SPI (full-duplex master/slave with SPISOMI/SPISIMO/SPICLK), alongside timer peripherals with input capture, PWM, and external event inputs on T1/T2A channels - all software-configurable per pin.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Architecture | 8-bit register-to-register, no accumulator required; enables direct register arithmetic (e.g., ADD R24,R47) |
| Program Memory | 16 KB one-time-programmable (OTP) EPROM - suitable for low-volume production without mask cost |
| Data Memory | 512 bytes RAM + 512 bytes data EEPROM - retains calibration data across power cycles |
| ADC | 8-channel, 8-bit successive-approximation ADC (AN0–AN7) with internal reference support |
| Timers | Two 16-bit general-purpose timers (T1, T2A); T2A supports dual input capture and PWM output |
| Serial Interfaces | SCI1 (3-wire asynchronous) + SPI (3-wire synchronous) - enables host communication and peripheral daisy-chaining |
| Operating Modes | Microcomputer (single-chip or expanded bus) and microprocessor modes; selected by MC pin voltage timing |
| Power Management | STANDBY (oscillator + timer active) and HALT (full stop) modes - reduces current to µA range during idle |
Pinout & Package
Package: 64-pin plastic shrink dual-in-line (SDIP), NM suffix, 0.300-inch width, JEDEC MS-019AC compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC1, VCC2, VSS1, VSS2 | Digital supply and ground rails | Separate VCC1/VSS1 for core logic; VCC2/VSS2 for I/O buffers - improves noise immunity in mixed-signal systems |
| XTAL1, XTAL2/CLKIN | Crystal oscillator input/output | Supports external crystal (1–5 MHz) or TTL-level clock source; enables PLL divide-by-1 mode for full SYSCLK |
| RESET | Bidirectional reset control | Input: initiates hardware reset; open-drain output: asserts on watchdog timeout or oscillator fault |
| MC | Mode control | Configures microcomputer vs. microprocessor mode; sampled two cycles before RESET deassertion |
| AN0–AN7 | ADC analog inputs / reference pins | Eight single-ended inputs; AN1–AN7 also serve as positive reference inputs for differential measurements |
| SCITXD, SCIRXD, SCICLK | SCI1 serial interface | Full-duplex asynchronous communication; SCICLK used only in synchronous SCI mode (not default) |
| SPISOMI, SPISIMO, SPICLK | SPI serial interface | Master/slave configurable; SPISOMI = MISO, SPISIMO = MOSI, SPICLK = bidirectional clock |
| T1IC/CR, T1PWM, T1EVT | Timer1 peripheral signals | T1IC/CR: input capture or counter reset; T1PWM: PWM output; T1EVT: external event trigger for timer start/stop |
| D0–D7 (Port D) | Memory control / I/O | In expansion mode: D0=CSE2/OCF, D1=CSH3, D2=CSH2, D3=SYSCLK, D4=R/W, D6=CSH1/EDS, D7=CSE1/WAIT |
Key Features
| Feature | Design Value |
|---|---|
| Non-multiplexed external bus | Enables direct connection to SRAM, EPROM, or peripherals without external latches - reduces BOM count and layout complexity |
| Precoded chip-select outputs | CSE1/CSE2/CSH1/CSH2/CSH3 map up to 112 KB external memory in Function A mode - eliminates discrete decode logic |
| Software-configurable I/O | All port pins (A–D) individually assignable as GPIO, memory bus, or peripheral function - maximizes flexibility per PCB revision |
| Two low-power modes | STANDBY (µA-level current, timer active) and HALT (sub-µA, full stop) - extends battery life in portable diagnostics tools |
| OTP EPROM program memory | 16 KB field-programmable code storage with no UV erasure needed - ideal for firmware updates in low-volume automotive ECUs |
| Register-to-register instruction set | Eliminates accumulator bottleneck; allows parallel register operations (e.g., MOV R1,R2 then ADD R3,R4) - improves deterministic timing in control loops |
Applications
| Automotive Engine Sensor Interface | Industrial Motor Control Module |
|---|---|
|
Use Scenario: Reads analog signals from crankshaft position, throttle, and coolant temperature sensors in engine control units. IC Role / Device Role / Timing Role: Central controller executing real-time PID loops; ADC samples at ≤100 kSPS; timers generate PWM for fuel injector drivers. Use Value: On-chip 512-byte EEPROM stores trim values and fault logs; STANDBY mode enables wake-on-interrupt for cold-start responsiveness. |
Use Scenario: Manages three-phase inverter gate timing, current sensing, and thermal protection in HVAC blower drives. IC Role / Device Role / Timing Role: Real-time motion controller; T2A input capture synchronizes with encoder edges; SCI1 reports status to host PLC. Use Value: Dual 16-bit timers support independent PWM generation for U/V/W phases; non-multiplexed bus simplifies connection to external gate driver ICs. |
| Consumer Appliance Main Controller | Medical Diagnostic Handheld |
|
Use Scenario: Coordinates wash cycle sequencing, heater control, and user interface in front-load washing machines. IC Role / Device Role / Timing Role: System supervisor managing relay drivers, display backlight, and keypad scan; uses HALT mode between button presses. Use Value: 16 KB OTP EPROM holds certified safety firmware; 8-channel ADC monitors thermistor arrays and pressure transducers without external mux. |
Use Scenario: Acquires and pre-processes analog biosignals (ECG, SpO₂) in portable patient monitors. IC Role / Device Role / Timing Role: Signal acquisition front-end; ADC runs continuous conversion; SPI interfaces with external precision ADC or flash memory. Use Value: Internal 24-bit watchdog ensures fail-safe shutdown on firmware hang; separate VCC2/VSS2 rails isolate analog measurement path from digital noise. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TMS370C356ANMT | 16 KB ROM (mask-programmed), not OTP; identical pinout and peripheral set; lacks EPROM reprogrammability | Suitable for high-volume production where firmware is finalized and mask cost is justified | Select when firmware stability is absolute and field updates are unnecessary - avoids EPROM programming infrastructure |
| SE370C756AJN | Ceramic windowed CLCC package (JN); same 16 KB OTP EPROM but UV-erasable for prototyping; 68-pin vs. 64-pin SDIP | Used in development labs for iterative firmware testing; incompatible PCB footprint due to package and pin count | Choose only for breadboard validation - requires socket adapter and UV eraser; not for final production |
Compared with TMS370C756ANMT, TMS370C356ANMT offers lower unit cost in volume but zero field update capability, while SE370C756AJN enables rapid firmware iteration yet demands mechanical redesign and adds UV handling overhead.
Availability
TMS370C756ANMT is available at Aetrix Electronics and suitable for automotive sensor interface, industrial motor control, consumer appliance main control, medical handheld diagnostics, and legacy industrial automation requiring stable component supply over extended product lifecycles.
Supply support for TMS370C756ANMT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader founded in 1930, specializing in analog, embedded processing, and digital signal technologies with broad industrial and automotive qualification.
The TMS370Cx5x family was designed for cost-sensitive, real-time embedded control in harsh environments - emphasizing OTP programmability, wide temperature operation (-40°C to +125°C), and integrated analog/mixed-signal peripherals.
FAQ
What is the memory configuration of the TMS370C756ANMT?
The TMS370C756ANMT contains 16 KB of one-time-programmable (OTP) EPROM for program storage, 512 bytes of on-chip RAM for runtime variables, and 512 bytes of data EEPROM for non-volatile parameter storage such as calibration coefficients or fault history - all confirmed in Table 2 of SPNS010F datasheet revision F.
Does the TMS370C756ANMT support external memory expansion?
Yes, the TMS370C756ANMT supports external memory expansion in microcomputer-with-expansion or microprocessor modes using its non-multiplexed 16-bit address and 8-bit data bus. It provides five independent chip-select outputs (CSE1/CSE2/CSH1/CSH2/CSH3) and EDS strobe, enabling up to 112 KB of mapped external memory without external decode logic.
What clock options does the TMS370C756ANMT offer?
The TMS370C756ANMT supports two clock configurations: divide-by-4 mode (0.5–5 MHz SYSCLK from 2–20 MHz crystal) and PLL-based divide-by-1 mode (2–5 MHz SYSCLK directly from crystal or external clock). XTAL1 and XTAL2/CLKIN pins accept either quartz crystal or TTL-level clock source, with MC pin determining mode selection timing.
How is the ADC configured on the TMS370C756ANMT?
The TMS370C756ANMT integrates an eight-channel, 8-bit successive-approximation ADC (ADC1) with inputs AN0–AN7. AN1–AN7 can also serve as positive reference inputs for differential measurements. Conversion is software-triggered or timer-triggered, and results are stored in dedicated result registers - fully documented in Section 3.4 of SPNS010F.
What are the low-power modes supported by the TMS370C756ANMT?
The TMS370C756ANMT supports two hardware-enforced low-power modes: STANDBY (CPU halted, oscillator and timers remain active, ~100 µA typical) and HALT (all clocks stopped, RAM and register state retained, <1 µA typical). Both modes are entered via software instruction and exited by interrupt or RESET - critical for battery-powered diagnostic tools using TMS370C756ANMT.
TMS370C756ANMT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 64-DIP (0.750", 19.05mm)
- Series:
- TMS370
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- TMS370
- Core Size:
- 8-Bit
- Speed:
- 5MHz
- Connectivity:
- SCI, SPI
- Peripherals:
- PWM, WDT
- Number of I/O:
- 44
- Program Memory Size:
- 16KB (16K x 8)
- Program Memory Type:
- OTP
- EEPROM Size:
- 512 x 8
- RAM Size:
- 512 x 8
- Voltage - Supply (Vcc/Vdd):
- 4.5V ~ 5.5V
- Data Converters:
- A/D 8x8b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
TMS370C756ANMT FAQ
1.How can I place an order for TMS370C756ANMT through Aetrix?
Please submit a Request for Quotation (RFQ) for TMS370C756ANMT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TMS370C756ANMT reliable?
The price and inventory of TMS370C756ANMT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TMS370C756ANMT is usually 5 days.
3.What payment methods are accepted for TMS370C756ANMT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TMS370C756ANMT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TMS370C756ANMT?
TMS370C756ANMT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TMS370C756ANMT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TMS370C756ANMT?
For technical support, including TMS370C756ANMT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TMS370C756ANMT requirements.
6.How does Aetrix verify that TMS370C756ANMT is sourced from the original manufacturer or authorized distributors?
All TMS370C756ANMT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TMS370C756ANMT meets industry standards.
7.What is the process for return or replacement of TMS370C756ANMT?
All TMS370C756ANMT units undergo pre-shipment inspection (PSI). If there is an issue with TMS370C756ANMT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TMS370C756ANMT part is unused and in its original packaging.
Return procedure for TMS370C756ANMT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TMS370C756ANMT Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

