Texas Instruments TMS5700914APGEQQ1
- Part No.:
- TMS5700914APGEQQ1
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
TMS5700914APGEQQ1.pdf
- Description:
- IC MCU 16/32BIT 1MB FLSH 144LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TMS5700914APGEQQ1 from Texas Instruments is a dual-CPU lockstep ARM Cortex-R4F 32-bit safety microcontroller for automotive ASIL-D and industrial SIL-3 applications, featuring 1 MB flash with ECC, 128 KB RAM with ECC, 160-MHz operation, and integrated diagnostics including BIST, voltage/clock monitoring, and error signaling via nERROR pin - deployed in electric power steering and braking systems.
For engineers reviewing the TMS5700914APGEQQ1 datasheet, TMS5700914APGEQQ1 pinout, TMS5700914APGEQQ1 application, or TMS5700914APGEQQ1 equivalent, this page delivers verified functional safety architecture details, real-time peripheral configuration (ePWM/eCAP/N2HET), ISO 26262-ready memory protection, and package-specific I/O mapping for the 144-pin LQFP (PGE) variant.
Technical Context
The TMS5700914APGEQQ1 implements dual ARM Cortex-R4F CPUs executing identical instructions in lockstep with hardware comparison logic to detect divergence, supported by ECC on all flash and SRAM interfaces and parity on peripheral memories. Its FMPLL generates internal clocks up to 160 MHz while enabling frequency modulation for EMI reduction.
Real-time control is enabled by two N2HET modules (32 + 18 programmable channels), seven ePWM modules with deadband generation and trip-zone protection, six eCAP modules, two eQEP modules, and dual 12-bit MibADCs (24 + 16 channels, 16 shared) - all accessible via a 16-channel DMA controller with MPU-protected transfers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-R4F dual-core lockstep, 1.66 DMIPS/MHz, FPU with single/double precision |
| Max Clock Frequency | 160 MHz system clock - enables deterministic real-time execution for safety-critical motor control loops |
| Memory | 1 MB flash with ECC + 128 KB RAM with ECC + 64 KB emulated EEPROM with ECC |
| Safety Features | Built-in self-test (BIST) for CPU/RAM, voltage/clock monitoring, Error Signaling Module (ESM) with nERROR output |
| Peripherals | 3 DCAN controllers (CAN 2.0A/B), 2 MibSPI (128-word parity RAM), 2 SCI (1 with LIN 2.1), I²C, 7 ePWM, 6 eCAP, 2 eQEP, 2 × 12-bit MibADC |
| I/O & Packaging | 64 general-purpose I/O pins (10 interrupt-capable), 144-pin LQFP (PGE), 20.0 mm × 20.0 mm body |
| Operating Range | −40°C to +125°C ambient, core supply 1.14–1.32 V, I/O supply 3.0–3.6 V |
Pinout & Package
Package: 144-pin LQFP (PGE), green RoHS-compliant, 20.0 mm × 20.0 mm body size, 0.5 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| nPORRST | Power-on reset input | Active-low asynchronous reset asserted during power ramp; disables I/O buffers until stable |
| nRST | Warm reset input | Active-low synchronous reset triggered by software or external signal; preserves power domain state |
| nERROR | Error signaling output | Open-drain active-low output driven by ESM upon detected fault (CPU divergence, memory error, clock failure) |
| ECLK | External clock monitor output | Programmable low-frequency output derived from VCLK - used for external frequency validation |
| OSCIN / OSCOUT | Crytal oscillator interface | Differential crystal input/output pair supporting 4–25 MHz fundamental-mode crystals for system clock reference |
| ADREFHI / ADREFLO | ADC reference inputs | High/low reference voltage terminals shared by both MibADC modules; require external decoupling |
| VCCAD / VSSAD | ADC analog supply | Dedicated analog power and ground pins isolated from digital domains to minimize noise coupling into ADC conversions |
Key Features
| Feature | Design Value |
|---|---|
| Dual-lockstep CPU architecture | Hardware-enforced instruction-level redundancy with immediate fault detection and ESM-triggered response |
| ECC-protected memory subsystem | Single-bit correction and double-bit detection on 1 MB flash and 128 KB RAM - prevents silent data corruption in safety-critical storage |
| N2HET timing coprocessors | Two independent high-end timers (32 + 18 channels) with angle generator and HTU for offloading complex PWM/capture tasks from main CPU |
| Functional safety peripherals | Parity-protected MibSPI RAM, CRC modules, loopback-capable I/O, and dedicated diagnostic interfaces (JTAG/CoreSight/AJSM) |
| Automotive communication suite | Three DCAN controllers (64 mailboxes each), LIN-capable SCI, and I²C - all qualified for harsh EMI environments per ISO 11898 and LIN 2.1 |
Applications
| Electric Power Steering (EPS) | Braking Systems (ABS/ESC) |
|---|---|
Use Scenario: Real-time torque assist calculation and motor phase control under dynamic vehicle load and temperature conditions. IC Role / Device Role / Timing Role: Primary safety controller executing ASIL-D motor control algorithms with lockstep CPU verification and ePWM-driven gate drivers. Use Value: Deterministic 160-MHz execution and dual N2HET modules enable sub-microsecond PWM update timing critical for torque ripple suppression. |
Use Scenario: Closed-loop hydraulic pressure modulation during emergency braking events with fail-operational redundancy requirements. IC Role / Device Role / Timing Role: Safety-certified MCU managing ABS solenoid actuation, wheel speed decoding (eQEP), and CAN-based VCU coordination. Use Value: Triple DCAN interfaces support simultaneous communication with master ECU, sensor nodes, and actuator modules at 1 Mbps robustness. |
| Battery Management Systems (BMS) | HEV/EV Inverter Control |
Use Scenario: Cell voltage monitoring, thermal management, and isolation diagnostics across high-voltage traction battery packs. IC Role / Device Role / Timing Role: Safety monitor unit interfacing with isolated ADCs and communicating via CAN FD (via DCAN) to main BMS controller. Use Value: Dual 12-bit MibADCs with 64-word parity-protected buffers support synchronized sampling of 40+ cell voltages with built-in error detection. |
Use Scenario: High-fidelity field-oriented control (FOC) of permanent magnet motors with adaptive deadtime compensation and overcurrent shutdown. IC Role / Device Role / Timing Role: Real-time motor controller using ePWM modules with trip-zone protection and eCAP-based rotor position feedback. Use Value: Seven ePWM modules with complementary outputs and hardware deadband generation ensure precise gate drive timing for IGBT/SiC inverters. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar safety microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TMS570LS1224PGE | Higher flash (1280 KB) and RAM (192 KB); adds FlexRay and EMAC; same PGE package and pinout | Targeted at gateway ECUs requiring network bridging and Ethernet connectivity | Select when needing FlexRay protocol support or larger code footprint without changing PCB layout |
| TMS570LS0432PZ | Smaller 100-pin PZ package; reduced peripherals (2 DCAN, 1 N2HET, 1 eQEP); lower clock (80 MHz) | Cost-optimized entry-level safety MCU for non-motor-control applications like lighting or HVAC | Select for space-constrained designs where full TMS5700914APGEQQ1 feature set is unnecessary |
Compared with TMS570LS1224PGE and TMS570LS0432PZ, the TMS5700914APGEQQ1 offers optimal balance of ASIL-D-ready compute (160 MHz dual R4F), real-time I/O (7 ePWM, 2 eQEP), and memory (1 MB flash) in the 144-pin PGE footprint - making it the preferred choice for EPS and brake actuation where performance and peripheral density are critical.
Availability
TMS5700914APGEQQ1 is available at Aetrix Electronics and suitable for electric power steering, braking systems, and HEV/EV inverter control requiring stable component supply across automotive production lifecycles.
Supply support for TMS5700914APGEQQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions, with leadership in automotive safety MCUs and functional safety certification expertise.
The TMS570 Hercules family is designed specifically for ISO 26262 ASIL-D and IEC 61508 SIL-3 applications, integrating lockstep CPUs, memory ECC, and diagnostic accelerators to reduce safety case development effort.
FAQ
What safety certifications apply to the TMS5700914APGEQQ1?
The TMS5700914APGEQQ1 is qualified for automotive safety integrity level ASIL-D per ISO 26262 and industrial SIL-3 per IEC 61508. It includes hardware safety mechanisms such as dual lockstep CPUs, ECC on flash and RAM, BIST, clock/voltage monitors, and ESM with nERROR output - all documented in TI's Functional Safety Manual SPNU634.
Does the TMS5700914APGEQQ1 support CAN FD?
No, the TMS5700914APGEQQ1 integrates three DCAN controllers compliant only with CAN 2.0A and 2.0B protocols (up to 1 Mbps). It does not implement CAN FD physical layer or protocol features. For CAN FD support, consider TI's TCAN4550 or newer Hercules TMS570 variants with CAN FD peripherals.
What is the purpose of the N2HET modules in the TMS5700914APGEQQ1?
The TMS5700914APGEQQ1 includes two N2HET modules (N2HET1 with 32 channels, N2HET2 with 18 channels) that serve as programmable real-time timing coprocessors. They execute microcode to generate precise PWM waveforms, capture edge events, or manage encoder signals - offloading timing-critical tasks from the main Cortex-R4F CPU and improving determinism.
How is flash memory protected against corruption in the TMS5700914APGEQQ1?
The TMS5700914APGEQQ1 implements ECC (Error Correction Code) on its entire 1 MB flash array, providing single-bit error correction and double-bit error detection. This protection is active during all read, program, and erase operations and is enforced in hardware - ensuring data integrity even under radiation or voltage disturbance events common in automotive environments.
Can the TMS5700914APGEQQ1 operate with a 25-MHz crystal?
Yes, the TMS5700914APGEQQ1 supports crystal frequencies from 4 MHz to 25 MHz on the OSCIN/OSCOUT pins. The internal FMPLL multiplies this reference to generate the 160-MHz system clock. TI recommends using a fundamental-mode crystal with appropriate load capacitance and stability specifications per Section 6.6 of the SPNS225D datasheet.
TMS5700914APGEQQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 144-LQFP
- Series:
- Hercules™ TMS570 ARM® Cortex®-R
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-R4F
- Core Size:
- 16/32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, McBSP, SCI, SPI, UART/USART
- Peripherals:
- DMA, POR, PWM, WDT
- Number of I/O:
- 64
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 128K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.14V ~ 3.6V
- Data Converters:
- A/D 24x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
TMS5700914APGEQQ1 FAQ
1.How can I place an order for TMS5700914APGEQQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TMS5700914APGEQQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TMS5700914APGEQQ1 reliable?
The price and inventory of TMS5700914APGEQQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TMS5700914APGEQQ1 is usually 5 days.
3.What payment methods are accepted for TMS5700914APGEQQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TMS5700914APGEQQ1 transactions.
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4.How is shipping managed for TMS5700914APGEQQ1?
TMS5700914APGEQQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TMS5700914APGEQQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TMS5700914APGEQQ1?
For technical support, including TMS5700914APGEQQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TMS5700914APGEQQ1 requirements.
6.How does Aetrix verify that TMS5700914APGEQQ1 is sourced from the original manufacturer or authorized distributors?
All TMS5700914APGEQQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TMS5700914APGEQQ1 meets industry standards.
7.What is the process for return or replacement of TMS5700914APGEQQ1?
All TMS5700914APGEQQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TMS5700914APGEQQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TMS5700914APGEQQ1 part is unused and in its original packaging.
Return procedure for TMS5700914APGEQQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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