Texas Instruments TMX320C28346ZEP
- Part No.:
- TMX320C28346ZEP
- Manufacturer:
- Texas Instruments
- Category:
- DSP (Digital Signal Processors)
- Package:
- 256-BGA
- Datasheet:
-
TMX320C28346ZEP.pdf
- Description:
- IC MCU 32BIT ROMLESS 256BGA
- Quantity:
- Payment:

- Shipping:

Inventory:3,419
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TMS320C28346ZEP from Texas Instruments is a 300-MHz floating-point Delfino™ microcontroller designed for high-precision real-time control in power electronics. It integrates a TMS320C28x CPU with IEEE 754 FPU, 258K × 16 SARAM, 18 ePWM channels (including 9 HRPWM with 55-ps MEP resolution at 1.1 V), dual CAN interfaces, and 88 GPIOs - enabling closed-loop motor control in industrial servo amplifiers.
For engineers reviewing the TMS320C28346ZEP datasheet, TMS320C28346ZEP pinout, TMS320C28346ZEP application, or TMS320C28346ZEP equivalent, this page delivers verified specifications, package mapping to 256-ball ZFE BGA, functional pin roles, real-world use cases in solar inverters and CNC systems, and two validated alternative parts with documented technical and application differences.
Technical Context
The TMS320C28346ZEP implements a Harvard-architecture C28x CPU core with hardware FPU acceleration, supporting deterministic execution of complex control algorithms. Its 6-channel DMA controller offloads data movement between McBSP, XINTF, and SARAM, reducing CPU overhead during high-speed ADC sampling or serial communication bursts.
Real-time peripheral subsystems include three independent QEP modules for position feedback, six eCAP units configurable as timestamped capture inputs or auxiliary PWM outputs, and a PIE block managing all 64 peripheral interrupts with low-latency vectoring - essential for sub-microsecond response in overcurrent fault handling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | TMS320C28x 32-bit CPU with IEEE 754 single-precision FPU - enables direct implementation of floating-point PID, field-oriented control (FOC), and observer algorithms without software emulation. |
| Max Clock Speed | 300 MHz (3.33-ns cycle time at 1.2-V core) - delivers 300 MIPS + 300 MFLOPS for high-bandwidth current/voltage loop execution in 20-kHz+ switching inverters. |
| On-Chip RAM | 258K × 16 SARAM - provides zero-wait-state memory for critical control code, coefficient tables, and real-time data buffers, eliminating external memory latency. |
| ePWM Channels | 18 enhanced PWM outputs with dead-band generation, trip-zone protection, and carrier-based chopping - supports 3-phase inverter gate driving with hardware safety interlocks. |
| HRPWM Resolution | 55-ps MEP resolution on 9 HRPWM outputs at 1.1-V core - achieves <1-ns duty-cycle adjustment granularity for precise timing in resonant LLC or SiC gate control. |
| Communication Peripherals | 2× CAN 2.0B, 3× SCI (UART), 2× SPI, 2× McBSP (configurable as SPI), 1× I²C - enables multi-protocol system integration including motor drive CANopen networks and isolated UART debug links. |
| GPIO Count | 88 individually programmable, multiplexed GPIO pins with input filtering - supports flexible signal routing for encoder inputs, analog monitoring, digital I/O, and hardware fault signaling. |
Pinout & Package
Package: 256-ball plastic BGA (ZFE), 17.0 mm × 17.0 mm, 1.0-mm ball pitch, RoHS-compliant. Thermal pad on underside for enhanced heat dissipation in high-power control applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD / VDDIO / VDD18 | Power supply rails | VDD = 1.1/1.2-V core; VDDIO = 3.3-V I/O; VDD18 = 1.8-V PLL/oscillator - requires separate low-noise LDO regulation and sequencing per TI SPRS516F Section 7.4. |
| X1 / X2 / XCLKIN | Oscillator interface | Supports crystal (1–20 MHz), external clock, or oscillator module input - feeds on-chip PLL for stable 300-MHz system clock generation. |
| TRST / TCK / TMS / TDI / TDO / EMU0 / EMU1 | JTAG boundary-scan interface | IEEE 1149.1-compliant debug port for real-time emulation, flashless development, and production boundary-scan testing. |
| EPWM1A–EPWM9B | Enhanced PWM outputs | Dual complementary outputs per channel with programmable dead time, trip-zone masking, and HRPWM fine-resolution mode. |
| EQEP1A/B/S/I – EQEP3A/B/S/I | Quadrature encoder inputs | Three independent 32-bit QEP modules accept A/B/Index/Sync signals for high-resolution motor position/speed feedback with automatic direction detection. |
Key Features
| Feature | Design Value |
|---|---|
| Floating-Point Unit (FPU) | Hardware IEEE 754 single-precision unit eliminates software library overhead, enabling native C/C++ implementation of trigonometric, exponential, and matrix operations in motor control loops. |
| High-Resolution PWM (HRPWM) | 55-ps minimum pulse width resolution on 9 channels allows sub-nanosecond timing control for SiC/GaN gate drivers and soft-switching topologies. |
| Peripheral Interrupt Expansion (PIE) | Centralized 64-interrupt vector table with priority encoding and low-latency dispatch - ensures deterministic response to ADC end-of-conversion or PWM fault events within ≤6 cycles. |
| External Interface (XINTF) | 16-/32-bit parallel bus supporting >2M × 16 address space - enables direct connection to external FPGA co-processors, high-speed DACs, or legacy memory-mapped peripherals. |
| Code Security | No on-chip flash; SARAM content protected only by boot ROM security key - simplifies secure boot design but requires external encrypted storage for firmware integrity. |
Applications
| Industrial Servo Amplifiers | Solar Inverters |
|---|---|
|
Use Scenario: High-bandwidth torque and speed control of PMSM/BLDC motors in robotic arms and CNC axes. IC Role / Device Role / Timing Role: Real-time execution of field-oriented control (FOC) algorithm with simultaneous 18-PWM output generation, 3-QEP position tracking, and dual-CAN motion network interfacing. Use Value: 300-MHz FPU enables 20-kHz current loop execution with <500-ns jitter, while HRPWM resolves 12-bit effective resolution at 100-kHz switching frequency. |
Use Scenario: Grid-tied photovoltaic inverter with MPPT, DC-link voltage regulation, and reactive power support. IC Role / Device Role / Timing Role: Dual-loop control (inner current + outer DC-voltage) synchronized to grid phase via eCAP zero-crossing detection and 2-CAN communication with string-level optimizers. Use Value: 258K SARAM stores full LUT-based MPPT tables and harmonic compensation coefficients; 9-HRPWM channels enable precise interleaved boost stage timing. |
| Uninterruptible Power Supplies | Computer Numerical Control (CNC) |
|
Use Scenario: Online double-conversion UPS with battery charging, inverter output regulation, and seamless transfer switching. IC Role / Device Role / Timing Role: Coordinated control of rectifier (AC→DC), inverter (DC→AC), and charger stages using shared SARAM buffers and XINTF-linked ADC/DAC. Use Value: Six 32-bit eCAP modules timestamp AC line zero crossings and battery voltage transients with 5-ns resolution, enabling <10-μs transfer decision latency. |
Use Scenario: Multi-axis coordinated motion control in milling machines with real-time path interpolation and spindle synchronization. IC Role / Device Role / Timing Role: Execution of G-code interpreter, trajectory planner, and axis-specific PID loops with hardware-accelerated math and synchronized ePWM/eQEP timing across 3 axes. Use Value: Three independent QEP modules track encoder feedback from X/Y/Z axes simultaneously; 88 GPIOs route limit switches, emergency stops, and tool-change signals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar real-time control applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TMS320C28345ZEP | 200-MHz CPU, 130K × 16 SARAM, identical peripheral set except reduced ePWM count (18 → 12) and HRPWM count (9 → 6). | Suitable for cost-sensitive servo drives with lower bandwidth requirements (<10 kHz current loop) and smaller control law memory footprint. | Select when 200-MHz performance suffices and BOM cost reduction is prioritized over maximum PWM channel density. |
| TMS320F28379DZWT | Dual-C28x+CLA architecture, 200-MHz CPU + 200-MHz CLA, 1MB Flash, integrated 16-bit ADC, 32-pin larger 337-ball BGA package. | Targeted at next-generation designs requiring on-chip Flash for firmware updates, CLA-accelerated math, and higher-resolution analog sensing without external ADC. | Choose for new designs needing Flash-based field upgrades, CLA offload of FFT/observer tasks, or integrated high-speed ADC - not a drop-in replacement. |
Compared with TMS320C28345ZEP, the TMS320C28346ZEP delivers 50% higher CPU throughput and 2× more HRPWM channels for advanced SiC gate control; versus TMS320F28379DZWT, it offers superior raw FPU performance and smaller footprint but lacks Flash and CLA acceleration.
Availability
TMS320C28346ZEP is available at Aetrix Electronics and suitable for industrial servo amplifiers, solar inverters, uninterruptible power supplies, and computer numerical control (CNC) machining requiring stable component supply across extended product lifecycles.
Supply support for TMS320C28346ZEP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in real-time control silicon.
The TMS320C28346ZEP belongs to TI's Delfino™ MCU family, engineered specifically for high-performance digital power conversion, motor control, and industrial automation where deterministic timing, floating-point precision, and rich PWM/peripheral integration are critical.
FAQ
What is the maximum operating frequency of the TMS320C28346ZEP?
The TMS320C28346ZEP operates at up to 300 MHz with a 1.2-V core supply, delivering 3.33-ns instruction cycle time. At 1.1-V core, maximum frequency is 200 MHz. This rating is validated per TI SPRS516F Section 7.4 Recommended Operating Conditions and applies only to the ZFE/ZEP package variants under specified thermal conditions.
Does the TMS320C28346ZEP include on-chip Flash memory?
No, the TMS320C28346ZEP does not integrate Flash memory. It relies entirely on on-chip SARAM (258K × 16) and external memory via XINTF for program storage. This architecture enables higher clock speeds and eliminates Flash write/erase wear-out concerns in continuous-operation control systems.
How many HRPWM outputs does the TMS320C28346ZEP support?
The TMS320C28346ZEP supports nine HRPWM outputs (EPWM1A–EPWM9A), each capable of 55-ps MEP resolution at 1.1-V core voltage (65 ps at 1.2 V). These outputs are derived from the nine primary ePWM modules and require configuration into HRPWM mode via dedicated control registers.
What package type is used for the TMS320C28346ZEP?
The TMS320C28346ZEP uses a 256-ball plastic BGA (ZFE) package measuring 17.0 mm × 17.0 mm with 1.0-mm ball pitch. Pin assignments match the ZFE mechanical footprint defined in TI SPRS516F Section 11.1, and it shares thermal and electrical characteristics with other ZFE-packaged C2834x devices.
Is the TMS320C28346ZEP qualified for automotive applications?
No, the TMS320C28346ZEP is not AEC-Q100 qualified. Automotive-grade alternatives include the TMS320C28346-Q1 (ZFE package, –40°C to 125°C), which undergoes additional stress testing and screening per AEC-Q100 Rev-G standards for under-hood powertrain and chassis control applications.
TMX320C28346ZEP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- TMS320C2834x Delfino™
- Package/Case:
- 256-BGA
- Packaging:
- Box
- Product Status:
- Obsolete
- Type:
- Floating Point
- Interface:
- CAN, EBI/EMI, I2C, McBSP, SCI, SPI
- Clock Rate:
- 300MHz
- Non-Volatile Memory:
- ROM (16kB)
- On-Chip RAM:
- 516kB
- Voltage - I/O:
- 3.30V
- Voltage - Core:
- 1.20V
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 256-BGA (17x17)
TMX320C28346ZEP FAQ
1.How can I place an order for TMX320C28346ZEP through Aetrix?
Please submit a Request for Quotation (RFQ) for TMX320C28346ZEP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TMX320C28346ZEP reliable?
The price and inventory of TMX320C28346ZEP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TMX320C28346ZEP is usually 5 days.
3.What payment methods are accepted for TMX320C28346ZEP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TMX320C28346ZEP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TMX320C28346ZEP?
TMX320C28346ZEP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TMX320C28346ZEP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TMX320C28346ZEP?
For technical support, including TMX320C28346ZEP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TMX320C28346ZEP requirements.
6.How does Aetrix verify that TMX320C28346ZEP is sourced from the original manufacturer or authorized distributors?
All TMX320C28346ZEP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TMX320C28346ZEP meets industry standards.
7.What is the process for return or replacement of TMX320C28346ZEP?
All TMX320C28346ZEP units undergo pre-shipment inspection (PSI). If there is an issue with TMX320C28346ZEP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TMX320C28346ZEP part is unused and in its original packaging.
Return procedure for TMX320C28346ZEP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TMX320C28346ZEP Tags
-
TMS320C5535AZAY10
Texas Instruments

-
TMS320VC5501PGF300
Texas Instruments

-
ADSP-BF592KCPZ
Analog Devices Inc.

-
ADAU1463WBCPZ150
Analog Devices Inc.

-
TMS320VC5402PGE100
Texas Instruments

-
ADAU1701JSTZ-RL
Analog Devices Inc.

-
ADAU1701JSTZ
Analog Devices Inc.

-
TMS320VC5502PGF300
Texas Instruments

-
ADAU1462WBCPZ300RL
Analog Devices Inc.

-
ADAU1452KCPZRL
Analog Devices Inc.

-
ADAU1452WBCPZ-RL
Analog Devices Inc.

-
TMS320C6747DZKB3
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
