Texas Instruments TMX5703137AZWTQQ1
- Part No.:
- TMX5703137AZWTQQ1
- Manufacturer:
- Texas Instruments
- Category:
- Microcontrollers
- Package:
- 337-LFBGA
- Datasheet:
-
TMX5703137AZWTQQ1.pdf
- Description:
- IC MCU 16/32B 3MB FLASH 337NFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:4,063
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Product details
Overview
TMS570LS3137ZWTQQ1 from Texas Instruments is an automotive-grade 32-bit RISC flash microcontroller with dual lockstep ARM Cortex-R4F CPUs, 3 MB ECC-protected flash, 256 KB ECC-protected RAM, and integrated safety features including BIST, ESM, and voltage/clock monitoring - deployed in braking systems, electric power steering, and battery management.
For engineers reviewing the TMS570LS3137ZWTQQ1 datasheet, TMS570LS3137ZWTQQ1 pinout, TMS570LS3137ZWTQQ1 application, or TMS570LS3137ZWTQQ1 equivalent, key selection criteria include ASIL-D compliance support, dual-CPU lockstep execution integrity, FMPLL clock redundancy, FlexRay/DCAN/Ethernet interface concurrency, and N2HET timer channel count for real-time actuator control.
Technical Context
The TMS570LS3137ZWTQQ1 implements a safety-critical architecture with two identical Cortex-R4F cores executing identical instructions in lockstep, with continuous comparison logic detecting divergence. Its FMPLL provides frequency-modulated clock synthesis with built-in slip detection, while a separate nonmodulating PLL supplies FlexRay timing.
Memory subsystems include ECC on 3 MB flash and 256 KB RAM, parity protection on 64 KB emulated EEPROM, 8 KB FlexRay message RAM, and 64 mailbox buffers - all monitored by BIST and error signaling modules. Peripheral interfaces are isolated via dedicated MPUs: HTU for N2HET, FTU for FlexRay, and DMA controller MPU for memory access enforcement.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM Cortex-R4F, 1.66 DMIPS/MHz, up to 180 MHz (298 DMIPS), lockstep dual-core operation |
| Flash Memory | 3 MB with single-bit correction/double-bit detection (ECC), 3.3-V I/O compatible, pipeline-mode operation at 180 MHz |
| RAM | 256 KB SRAM with ECC, plus 64 KB flash-emulated EEPROM with ECC |
| ADC | Two 12-bit MibADCs: ADC1 with 24 channels, ADC2 with 16 shared channels; 64-word parity-protected buffer per module |
| Timers | N2HET1 (32 channels) and N2HET2 (18 channels), each with dedicated HTU, instruction RAM, and angle generator |
| Communication | Three DCAN (CAN 2.0B, up to 1 Mbps), FlexRay dual-channel (10 Mbps/channel), 10/100 Mbps EMAC (MII/RMII/MDIO), LIN 2.1, I²C (100/400 kbps) |
| Safety Features | Dual-CPU lockstep, CPU/RAM BIST, ESM with ERROR pin, voltage/clock monitors, memory protection units (MPU) per DMA/HTU/FTU |
Pinout & Package
Package: 337-ball NFBGA (ZWT), 16.0 mm × 16.0 mm, 0.8-mm ball pitch, green RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCCAD / VSSAD | Analog supply/ground | 3.0–5.25 V ADC domain power and return; decoupling critical for 12-bit conversion accuracy |
| nERROR | Error signaling output | Active-low open-drain fault indicator driven by ESM; asserts on uncorrectable memory or CPU divergence |
| FRAY_TX1 / FRAY_RX1 | FlexRay Channel 1 I/O | Differential transmit/receive pair for high-integrity deterministic communication (10 Mbps, time-triggered) |
| CAN1_TX / CAN1_RX | DCAN1 differential I/O | High-noise-tolerance bus interface compliant with ISO 11898-1; supports up to 1 Mbps bit rate |
| MII_TXD[3:0] / MII_RXD[3:0] | Ethernet MAC data lanes | 4-bit parallel MII interface supporting 10/100 Mbps full-duplex; requires external PHY connection |
| N2HET1[31:0] | N2HET1 programmable I/O | 32-pin dedicated timer port for PWM generation, input capture, or GPIO; supports complex waveform synthesis |
Key Features
| Feature | Design Value |
|---|---|
| Dual-CPU Lockstep Execution | Hardware-enforced instruction-level redundancy with real-time divergence detection and error flagging |
| Fault-Tolerant Memory Subsystem | ECC on flash and RAM + parity on peripheral buffers enables detection/correction of single-bit errors and detection of double-bit faults |
| FlexRay Dual-Channel Controller | Autonomous FTU transfers with MPU-protected memory access; supports time-triggered deterministic networking for drive-by-wire |
| N2HET Timing Coprocessors | Two independent high-end timers (32 + 18 channels) with hardware angle generation and HTU-assisted DMA transfers |
| ASIL-D Ready Safety Architecture | Integrated ESM, BIST, clock/voltage monitors, and loopback-capable I/O enable ISO 26262-compliant system design |
| EMAC with MII/RMII Support | IEEE 802.3-compliant Ethernet MAC enabling vehicle-to-infrastructure (V2X) and diagnostic over IP without external PHY dependency |
Applications
| Braking Systems | Electric Power Steering (EPS) |
|---|---|
|
Use Scenario: Real-time hydraulic pressure modulation and wheel-speed-based torque vectoring in ABS and ESC modules. IC Role / Device Role / Timing Role: Primary safety controller executing ASIL-D software with lockstep CPU verification and N2HET-driven solenoid PWM timing. Use Value: Sub-microsecond timer resolution and fault-signaling ERROR pin enable fail-safe actuator shutdown within <100 µs of detected divergence. |
Use Scenario: Torque assist calculation, motor current control, and road feedback compensation in column-assist EPS systems. IC Role / Device Role / Timing Role: Real-time motor control unit with dual 12-bit ADC sampling for current sensing and N2HET-driven gate driver timing. Use Value: 24-channel ADC with shared sequencing and 64-word parity buffers ensure synchronized multi-sensor acquisition for precise torque estimation. |
| Battery Management Systems | Railway Communications |
|
Use Scenario: Cell voltage monitoring, thermal management, and isolation barrier communication in high-voltage traction battery packs. IC Role / Device Role / Timing Role: Central BMS controller interfacing with isolated ADCs and CAN/FlexRay for pack-level coordination. Use Value: Three DCAN controllers and dual FlexRay channels allow redundant communication paths between master and slave nodes under SIL3 requirements. |
Use Scenario: Onboard train control unit managing signaling interlocks, door control, and PIS integration via deterministic fieldbus. IC Role / Device Role / Timing Role: Safety-certified communication gateway with EMAC for ETCS Level 2 and FlexRay for brake command distribution. Use Value: IEEE 802.3-compliant EMAC and time-triggered FlexRay support EN 5012x-certified network topologies with sub-ms latency guarantees. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar safety microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TMS570LS3135ZWT | Same package and core, but reduced Flash (3 MB → 3 MB unchanged), same RAM, no EMAC module | Lacks Ethernet MAC; suitable for CAN/FlexRay-only networks where IP connectivity is unnecessary | Select when Ethernet is not required and cost optimization is prioritized without sacrificing safety architecture |
| TMS570LC4357ZWT | ARM Cortex-R5F core (300 MHz), larger Flash (4 MB), higher ADC channel count (41 vs. 24), adds ePWM/eCAP | Supports more complex motor control algorithms and higher-resolution sensor fusion; targets next-gen ADAS domain controllers | Choose for future-proofing with higher compute headroom and enhanced peripheral set while maintaining ZWT footprint |
Compared with TMS570LS3137ZWTQQ1, the TMS570LS3135ZWT removes Ethernet capability but retains identical safety architecture and pinout, whereas the TMS570LC4357ZWT upgrades to Cortex-R5F with expanded peripherals and performance - both share the ZWT package but differ in functional scope and certification pathway alignment.
Availability
TMS570LS3137ZWTQQ1 is available at Aetrix Electronics and suitable for braking systems, electric power steering, and battery management requiring stable component supply across automotive production lifecycles.
Supply support for TMS570LS3137ZWTQQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies with decades of automotive qualification experience.
The TMS570 Hercules™ family delivers ASIL-B/D-capable microcontrollers designed specifically for safety-critical automotive and industrial real-time control applications - emphasizing lockstep reliability, memory integrity, and deterministic peripheral timing.
FAQ
What safety certifications does the TMS570LS3137ZWTQQ1 support?
The TMS570LS3137ZWTQQ1 is architected to support ISO 26262 ASIL-D development, with dual lockstep CPUs, ECC memory, BIST, ESM, and voltage/clock monitors. TI provides safety manuals, FMEDA reports, and diagnostic software libraries to accelerate certification - all documented in the TMS570LS3137ZWTQQ1 functional safety package.
Does the TMS570LS3137ZWTQQ1 include an Ethernet MAC, and what interfaces does it support?
Yes, the TMS570LS3137ZWTQQ1 integrates a 10/100 Mbps Ethernet MAC (EMAC) compliant with IEEE 802.3. It supports MII, RMII, and MDIO interfaces - enabling direct connection to external PHYs for vehicle diagnostics, OTA updates, or V2X communication without additional bridge ICs.
How many CAN controllers are integrated into the TMS570LS3137ZWTQQ1, and what protocol versions do they support?
The TMS570LS3137ZWTQQ1 integrates three DCAN controllers, each compliant with CAN Protocol Version 2.0B. They support bit rates up to 1 Mbps and operate in noisy automotive environments with robust error handling, making them ideal for chassis, powertrain, and body domain networking.
What is the role of the N2HET modules in the TMS570LS3137ZWTQQ1, and how many channels do they provide?
The TMS570LS3137ZWTQQ1 includes two Next Generation High-End Timer (N2HET) modules: N2HET1 with 32 programmable channels and N2HET2 with 18 channels. These offload precise timing tasks - such as PWM generation, input capture, and GPIO control - from the main CPU, ensuring deterministic real-time response in safety-critical functions.
Is the TMS570LS3137ZWTQQ1 pin-compatible with other devices in the TMS570 family?
The TMS570LS3137ZWTQQ1 shares the 337-ball ZWT package with several TMS570 variants (e.g., TMS570LS3135ZWT, TMS570LC4357ZWT), enabling PCB reuse across product tiers. However, signal mapping differs for peripherals like EMAC and ePWM - full pin compatibility requires verification against specific variant ball maps and multiplexing tables.
TMX5703137AZWTQQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 337-LFBGA
- Series:
- Hercules™ TMS570 ARM® Cortex®-R
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-R4F
- Core Size:
- 16/32-Bit
- Speed:
- 180MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, FlexRay, I2C, LINbus, MibSPI, SCI, SPI, UART/USART
- Peripherals:
- DMA, POR, PWM, WDT
- Number of I/O:
- 120
- Program Memory Size:
- 3MB (3M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.14V ~ 3.6V
- Data Converters:
- A/D 24x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
TMX5703137AZWTQQ1 FAQ
1.How can I place an order for TMX5703137AZWTQQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TMX5703137AZWTQQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TMX5703137AZWTQQ1 reliable?
The price and inventory of TMX5703137AZWTQQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TMX5703137AZWTQQ1 is usually 5 days.
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Once your TMX5703137AZWTQQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TMX5703137AZWTQQ1?
For technical support, including TMX5703137AZWTQQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TMX5703137AZWTQQ1 requirements.
6.How does Aetrix verify that TMX5703137AZWTQQ1 is sourced from the original manufacturer or authorized distributors?
All TMX5703137AZWTQQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TMX5703137AZWTQQ1 meets industry standards.
7.What is the process for return or replacement of TMX5703137AZWTQQ1?
All TMX5703137AZWTQQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TMX5703137AZWTQQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TMX5703137AZWTQQ1 part is unused and in its original packaging.
Return procedure for TMX5703137AZWTQQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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