Texas Instruments TPS2013DRG4
- Part No.:
- TPS2013DRG4
- Manufacturer:
- Texas Instruments
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TPS2013DRG4.pdf
- Description:
- IC PWR SWITCH N-CHAN 1:1 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,636
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS2013DRG4 from Texas Instruments is a high-side N-channel MOSFET power-distribution switch in SOIC-8 package, delivering 2.6 A typical short-circuit current limit at 25°C, 95 mΩ max on-state resistance at 5.5 V input, and controlled 3.5–4 ms rise/fall times to suppress EMI. It operates from 2.7 V to 5.5 V and integrates thermal shutdown (≈180°C) and electrostatic discharge protection (12 kV on OUT, 6 kV elsewhere), used for USB port power control and hot-swap subsystems.
For engineers reviewing the TPS2013DRG4 datasheet, TPS2013DRG4 pinout, TPS2013DRG4 application, or TPS2013DRG4 equivalent, key selection criteria include its 2.6 A current-limit threshold, SOIC-8 drop-in compatibility with Siliconix Littlefoot™ PMOS switches (with GND connected), logic-compatible enable input, and junction temperature range of –40°C to 125°C.
Technical Context
The TPS2013DRG4 implements a charge-pump–driven gate driver that sustains MOSFET turn-on down to 2.7 V input, operating at 100 kHz without external components. Its current-limit circuit uses a sense FET-not a shunt resistor-to enter constant-current mode during overloads, minimizing voltage drop and power loss in the current path.
Thermal protection employs hysteresis: the device shuts off at ≈180°C junction temperature and auto-recovers after cooling ~20°C. The enable input accepts TTL/CMOS logic levels, drawing ≤0.5 µA when high or low, and reduces supply current to ≤10 µA in disabled state.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Short-circuit current limit | 2.6 A typical at 25°C, 5.5 V input - sets maximum safe output current under fault conditions |
| On-state resistance (RON) | 95 mΩ max at 5.5 V, 25°C - determines I²R conduction loss and voltage drop at full load |
| Input voltage range | 2.7 V to 5.5 V - supports single-supply operation across 3.3 V and 5 V systems |
| Rise/fall time | 3.5–4 ms with 1 µF load - limits di/dt, suppresses inrush current and EMI during switching |
| Standby supply current | ≤10 µA when EN = high - enables ultra-low-power system sleep modes |
| Junction temperature range | –40°C to 125°C - validated for industrial ambient environments with derated power |
| ESD protection | 12 kV HBM on OUT, 6 kV HBM on all other terminals - meets IEC 61000-4-2 Level 4 robustness |
Pinout & Package
TPS2013DRG4 is housed in an 8-pin SOIC (D) package with gull-wing leads, 1.27 mm pitch, and JEDEC MS-012AC outline. Pin 1 is marked by a beveled corner or dot; the device is surface-mount compatible and RoHS-compliant with NiPdAu lead finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pin 1) | Ground reference | Return path for internal charge pump, driver, and thermal sense circuits; must be connected for proper operation |
| IN (Pins 2, 3) | Power input | Dual parallel inputs reduce trace resistance and voltage drop; accept 2.7–5.5 V supply |
| EN (Pin 4) | Enable control | Active-low logic input; TTL/CMOS compatible; pulls internal bias offline when high to achieve ≤10 µA quiescent current |
| OUT (Pins 5–8) | Switched output | Four parallel output pins minimize bond-wire resistance and thermal stress under 2.6 A load |
Key Features
| Feature | Design Value |
|---|---|
| Integrated charge pump | Enables full N-MOSFET gate drive from 2.7 V input without external components, eliminating need for external boost circuitry |
| Sense-FET current limiting | Replaces lossy shunt resistors with matched transistor sensing, preserving efficiency and avoiding additional PCB area or thermal burden |
| Controlled switching transitions | 2–4 ms rise/fall times inherently limit peak inrush current and radiated EMI, reducing need for external filtering |
| Auto-recovering thermal shutdown | Hysteresis-based cycling (≈180°C trip, ≈160°C recovery) protects against sustained overload without requiring system-level reset intervention |
| SOIC-8 drop-in compatibility | Pinout matches Siliconix Littlefoot™ PMOS switches when GND is connected-enables legacy design upgrades without layout change |
Applications
| USB Peripheral Power Switching | Industrial Hot-Swap Module |
|---|---|
Use Scenario: Controlling power delivery to downstream USB peripherals (e.g., hubs, storage) while preventing bus faults from propagating upstream. IC Role / Device Role / Timing Role: High-side load switch with fast fault response and automatic current limiting to isolate shorted ports within milliseconds. Use Value: Prevents host controller reset or VBUS collapse during plug/unplug events or cable shorts, maintaining system stability per USB 2.0 specifications. | Use Scenario: Enabling safe insertion/removal of field-replaceable modules (e.g., I/O cards, sensor nodes) in powered-backplane systems. IC Role / Device Role / Timing Role: Controlled power ramp generator with soft-start behavior and overload containment during live insertion. Use Value: Limits inrush current to <1 A during module insertion, avoids brownouts on shared 5 V rails, and prevents damage from capacitive loading transients. |
| Embedded System Power Sequencing | Point-of-Load Protection for FPGA I/O Banks |
Use Scenario: Staged activation of multiple voltage domains (e.g., core, I/O, auxiliary) in microcontroller-based edge devices. IC Role / Device Role / Timing Role: Enable-controlled power rail gate with precise timing via external RC on EN node to enforce sequencing delays. Use Value: Ensures correct power-up order without dedicated sequencer ICs, reducing BOM count and board space in cost-sensitive designs. | Use Scenario: Isolating FPGA I/O banks during configuration or fault conditions to prevent latch-up or cross-rail contention. IC Role / Device Role / Timing Role: Individually controllable 5 V power switch per bank, coordinated with FPGA configuration status signals. Use Value: Enables dynamic reconfiguration of I/O standards (LVCMOS, SSTL) without powering down entire FPGA, improving system flexibility and reliability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-side load switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS2013DR | Identical electrical specs and SOIC-8 package; differs only in lead finish (NIPDAU vs. NIPDAU-G4) and tape/reel packaging (standard vs. green-qualified) | No functional difference; both rated for –40°C to 85°C ambient, same MSL-1 rating and reflow profile | Select TPS2013DRG4 if RoHS-compliant green-qualified assembly is required; otherwise TPS2013DR is functionally interchangeable |
| TPS2051BDBVR | Lower 1.5 A current limit, 130 mΩ RON, SOT-23-5 package; no thermal shutdown hysteresis, only current limiting | Targeted for space-constrained, lower-current applications (e.g., portable sensors); lacks auto-recovery thermal protection | Choose TPS2051BDBVR only when footprint and cost outweigh need for 2.6 A capability and thermal resilience |
Compared with TPS2013DR and TPS2051BDBVR, the TPS2013DRG4 provides identical performance to TPS2013DR but with TI's green-qualified finish, while offering significantly higher current capacity, lower RON, and robust thermal cycling behavior versus the SOT-23 alternative-making it optimal for industrial 5 V distribution where reliability and fault tolerance are critical.
Availability
TPS2013DRG4 is available at Aetrix Electronics and suitable for USB peripheral management, industrial hot-swap modules, embedded power sequencing, and FPGA I/O bank isolation requiring stable component supply and long-term industrial lifecycle support.
Supply support for TPS2013DRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability power-switching solutions.
The TPS201x family was designed specifically for robust power distribution in systems exposed to heavy capacitive loads and frequent short-circuit events-targeting USB, docking stations, and industrial backplanes where fault containment and EMI control are essential.
FAQ
What is the maximum continuous output current rating for the TPS2013DRG4?
The TPS2013DRG4 does not specify a maximum continuous output current independent of thermal conditions; instead, it features a current-limit threshold of 2.6 A typical at 25°C. Continuous current capability depends on PCB layout, ambient temperature, and heatsinking. At 25°C ambient with adequate copper area, it can sustain ≥1.5 A continuously before thermal limiting activates. The TPS2013DRG4 datasheet defines recommended operating conditions up to 1.5 A continuous load.
Does the TPS2013DRG4 require external components for basic operation?
No, the TPS2013DRG4 requires no external components for core functionality: its internal 100 kHz charge pump eliminates the need for boost capacitors, and logic-level EN input interfaces directly to MCU GPIOs. However, TI recommends a 0.1 µF ceramic bypass capacitor between IN and GND, and a 0.1 µF capacitor on OUT, to ensure ESD immunity and transient stability-both are mandatory for robust operation per the TPS2013DRG4 application note.
How does the thermal protection mechanism work in the TPS2013DRG4?
The TPS2013DRG4 incorporates a junction-temperature sensor that disables the power switch when die temperature reaches ≈180°C. After shutdown, the device remains off until the junction cools by ~20°C (to ≈160°C), then automatically resumes operation. This hysteresis prevents rapid on-off cycling and allows gradual fault clearance. The TPS2013DRG4 continues this cycle until the overload or short is removed, protecting both itself and downstream circuitry without external supervision.
Is the TPS2013DRG4 pin-compatible with earlier versions like TPS2010D?
Yes, the TPS2013DRG4 shares identical SOIC-8 pinout and footprint with all TPS201x family members including TPS2010D, TPS2011D, and TPS2012D. All variants use the same D-package mechanical outline, terminal numbering, and electrical pin functions-only the current-limit threshold differs. This allows direct substitution in existing layouts when upgraded current capability is needed, provided the enable logic and thermal design accommodate the higher 2.6 A limit.
What is the significance of the "G4" suffix in TPS2013DRG4?
"G4" denotes Texas Instruments' green-qualified packaging standard: lead finish is NiPdAu (nickel-palladium-gold), fully RoHS-compliant with no lead, antimony, or brominated flame retardants. It also indicates compliance with TI's enhanced environmental requirements for halogen-free materials and stricter process controls. The TPS2013DRG4 maintains identical electrical performance and reliability as TPS2013DR but meets stricter sustainability and assembly standards for automotive and industrial end equipment.
TPS2013DRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Switch Type:
- General Purpose
- Number of Outputs:
- 1
- Ratio - Input:Output:
- 1:1
- Output Configuration:
- High Side
- Output Type:
- N-Channel
- Interface:
- On/Off
- Voltage - Load:
- 2.7V ~ 5.5V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 1.5A
- Rds On (Typ):
- 75mOhm
- Input Type:
- Non-Inverting
- Features:
- -
- Fault Protection:
- Current Limiting (Fixed), Over Temperature
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TPS2013DRG4 FAQ
1.How can I place an order for TPS2013DRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS2013DRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS2013DRG4 reliable?
The price and inventory of TPS2013DRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS2013DRG4 is usually 5 days.
3.What payment methods are accepted for TPS2013DRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS2013DRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS2013DRG4?
TPS2013DRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS2013DRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS2013DRG4?
For technical support, including TPS2013DRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS2013DRG4 requirements.
6.How does Aetrix verify that TPS2013DRG4 is sourced from the original manufacturer or authorized distributors?
All TPS2013DRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS2013DRG4 meets industry standards.
7.What is the process for return or replacement of TPS2013DRG4?
All TPS2013DRG4 units undergo pre-shipment inspection (PSI). If there is an issue with TPS2013DRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS2013DRG4 part is unused and in its original packaging.
Return procedure for TPS2013DRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS2013DRG4 Tags

-
TPS22919DCKR
Texas Instruments

-
MIC2091-1YM5-TR
Microchip Technology

-
MIC2090-1YM5-TR
Microchip Technology

-
TPS22995RZFR
Texas Instruments

-
TPS22975DSGR
Texas Instruments

-
SIP32510DT-T1-GE3
Vishay Siliconix

-
ULN2003D1013TR
STMicroelectronics

-
MIC2005A-1YM5-TR
Microchip Technology

-
MIC2005A-1YM6-TR
Microchip Technology

-
TPS22916BYFPR
Texas Instruments

-
TPS22917DBVR
Texas Instruments
-
ULN2003APWR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

