Texas Instruments TPS2047ADRG4
- Part No.:
- TPS2047ADRG4
- Manufacturer:
- Texas Instruments
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TPS2047ADRG4.pdf
- Description:
- IC PWR SWTCH N-CH 1:2/1:1 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,993
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Product details
Overview
TPS2047ADRG4 from Texas Instruments is a triple-channel, high-side N-channel MOSFET power-distribution switch with independent enable control per channel, 80-mΩ typical RDS(on) at 5 V, 250 mA continuous current per channel, and integrated overcurrent/thermal protection. It operates from 2.7 V to 5.5 V and is used in USB-powered peripheral hubs, multi-rail embedded systems, and hot-swap-capable industrial I/O modules.
For engineers reviewing the TPS2047ADRG4 datasheet, TPS2047ADRG4 pinout, TPS2047ADRG4 application, or TPS2047ADRG4 equivalent, this page delivers verified electrical parameters, functional block context, SOIC-16 package layout, real-world use scenarios, and two validated alternative parts with documented technical and application differences.
Technical Context
The TPS2047ADRG4 integrates three independent high-side power switches-two on IN1/GNDA domain (OUT1, OUT2) and one on IN2/GNDB domain (OUT3)-each driven by an internal charge pump enabling operation down to 2.7 V input. Each channel features dedicated CMOS/TTL-compatible enable inputs (EN1–EN3 active-low for TPS2047A series) and open-drain overcurrent outputs (OC1–OC3).
Current limiting is implemented via sense-FET architecture, holding output current at ~0.5 A during short-circuit events while reducing output voltage; thermal protection engages at ~140°C junction temperature with ~20°C hysteresis, allowing fault-isolated cycling without disabling unaffected channels.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | Triple independent high-side power switches (2 on IN1, 1 on IN2) |
| RDS(on) (typ, 5 V) | 80 mΩ - enables low dropout and minimal power loss at 250 mA load |
| Continuous current per channel | 250 mA - supports USB-compliant downstream ports and low-power peripherals |
| Input voltage range | 2.7 V to 5.5 V - compatible with single-cell Li-ion, 3.3 V, and 5 V logic rails |
| Enable logic polarity | Active-low (TPS2047A series) - direct interface with microcontroller GPIOs without inversion |
| Standby supply current | 20 µA max - ensures ultra-low quiescent consumption when all channels disabled |
| Overcurrent response | Constant-current mode at ~0.5 A - sustains operation under overload without shutdown |
| Thermal trip point | ~140°C junction - provides robust fault isolation across channels |
Pinout & Package
TPS2047ADRG4 is housed in a 16-pin SOIC (D) package with exposed pad (not thermally enhanced), measuring 10.3 mm × 7.5 mm × 2.35 mm. Pin numbering follows standard SOIC convention (pin 1 at top-left corner, counterclockwise).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GNDA | Ground reference for IN1-switch domain and associated circuitry |
| 2 | IN1 | Main input supply for first two channels (OUT1, OUT2) |
| 3 | EN1 | Active-low enable for IN1→OUT1 path |
| 4 | EN2 | Active-low enable for IN1→OUT2 path |
| 5 | GNDB | Ground reference for IN2-switch domain and third channel (OUT3) |
| 6 | IN2 | Secondary input supply for third channel (OUT3) |
| 7 | EN3 | Active-low enable for IN2→OUT3 path |
| 8 | NC | No connection - must be left floating or grounded per layout guidelines |
| 9 | NC | No connection - must be left floating or grounded |
| 10 | NC | No connection - must be left floating or grounded |
| 11 | OUT3 | Power-switched output from IN2 domain |
| 12 | OC3 | Open-drain overcurrent flag for OUT3 (active-low) |
| 13 | OC2 | Open-drain overcurrent flag for OUT2 (active-low) |
| 14 | OUT2 | Power-switched output from IN1 domain |
| 15 | OUT1 | Power-switched output from IN1 domain |
| 16 | OC1 | Open-drain overcurrent flag for OUT1 (active-low) |
Key Features
| Feature | Design Value |
|---|---|
| Independent channel enable/control | Three separate ENx inputs allow granular power sequencing and dynamic rail management |
| Dual-ground architecture (GNDA/GNDB) | Enables isolated power domains - critical for noise-sensitive analog or mixed-signal subsystems |
| Sense-FET current monitoring | Eliminates external sense resistors, preserving efficiency and PCB area while enabling accurate current limiting |
| Charge-pump gate drive | Supports full enhancement of N-channel MOSFETs down to 2.7 V input - no external boost required |
| 2-ms to 4-ms controlled rise/fall times | Reduces EMI and inrush current stress on capacitive loads (e.g., USB devices, FPGA configuration banks) |
| Undervoltage lockout (~2 V) | Prevents erratic switching behavior during brown-out conditions, ensuring clean power-up/down transitions |
Applications
| USB Peripheral Hub | Industrial I/O Module |
|---|---|
Use Scenario: Powering multiple USB 2.0 peripherals (keyboard, mouse, flash drive) from a single upstream port with individual port disable capability. IC Role / Device Role / Timing Role: High-side power switch providing per-port current limiting, overcurrent detection, and hot-plug-safe enable/disable sequencing. Use Value: Prevents bus-wide shutdown during single-peripheral short; OCx flags enable host-side fault logging without additional sensing circuitry. | Use Scenario: Distributing regulated 5 V and 3.3 V power to isolated sensor inputs, digital outputs, and communication interfaces in programmable logic controllers. IC Role / Device Role / Timing Role: Triple-channel power manager enabling independent reset/reconfiguration of subsystems without affecting others. Use Value: GNDA/GNDB separation minimizes ground-loop coupling between analog sensors and noisy digital outputs. |
| FPGA Configuration Supply | Medical Diagnostic Instrument |
Use Scenario: Sequencing power to FPGA core (1.2 V), I/O bank (3.3 V), and transceiver (2.5 V) rails using external regulators feeding TPS2047ADRG4's IN1/IN2 inputs. IC Role / Device Role / Timing Role: Final-stage power switch controlling ramp rate and fault containment for sensitive configuration circuitry. Use Value: 2.5-ms typical rise time prevents configuration corruption due to excessive dI/dt; OCx signals trigger safe reconfiguration upon detected fault. | Use Scenario: Isolating auxiliary power domains (display backlight, data acquisition ADC, wireless comms module) in portable ultrasound or patient monitor units. IC Role / Device Role / Timing Role: Safety-critical power distribution switch with thermal fault isolation and low standby current. Use Value: 20 µA max standby current extends battery life; dual-threshold thermal protection avoids system-wide shutdown during localized overheating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-side power switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS2047ADR | Same silicon, tape-and-reel packaging (no G4 suffix); identical electrical specs and pinout | No functional difference - intended for automated SMT assembly vs. Digi-Key/Mouser cut-tape | Select TPS2047ADR for volume production; TPS2047ADRG4 for prototyping or low-volume hand-soldered builds |
| TPS2057ADRG4 | Same footprint and pinout, but EN1–EN3 are active-high (TPS205xA series); otherwise identical current limit, RDS(on), and protection features | Requires inverted enable logic from MCU - not drop-in; suitable where active-high control simplifies firmware or eliminates external inverters | Choose TPS2057ADRG4 only if system-level enable signals are natively active-high and board layout cannot accommodate logic inversion |
Compared with TPS2047ADR and TPS2057ADRG4, the TPS2047ADRG4 offers identical performance and mechanical fit but requires active-low enable signaling and ships in cut-tape format - making it optimal for design validation and small-batch manufacturing where packaging flexibility matters.
Availability
TPS2047ADRG4 is available at Aetrix Electronics and suitable for USB peripheral hubs, industrial I/O modules, and FPGA configuration supplies requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for TPS2047ADRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in power management ICs.
The TPS204x/TPS205x family was designed specifically for robust, current-limited power distribution in USB-compliant and hot-swap-capable systems - emphasizing fault isolation, low quiescent current, and seamless integration with microcontroller-based control.
FAQ
What is the maximum continuous current per channel for the TPS2047ADRG4?
The TPS2047ADRG4 supports 250 mA continuous current per channel under recommended operating conditions (TA ≤ 85°C, VIN = 2.7 V to 5.5 V). Its current-limit threshold is set at approximately 0.5 A, entering constant-current mode during overload - protecting both the device and downstream circuitry without immediate shutdown.
Does the TPS2047ADRG4 require external components for gate drive?
No, the TPS2047ADRG4 integrates an internal charge pump that generates sufficient gate voltage to fully enhance its N-channel MOSFETs - even at minimum 2.7 V input. No external capacitors, inductors, or boost circuitry are needed, simplifying layout and reducing BOM count.
How does the TPS2047ADRG4 handle thermal faults across its three channels?
The TPS2047ADRG4 implements dual-threshold thermal protection: at ~140°C junction temperature, only the channel experiencing overcurrent is disabled, while unaffected channels remain operational. After cooling ~20°C, the tripped channel automatically recovers - enabling fault containment without system-wide interruption.
Can the TPS2047ADRG4 be used with 3.3 V logic enable signals?
Yes - the TPS2047ADRG4 EN1–EN3 inputs are CMOS- and TTL-compatible, with VIL ≤ 0.4 V and VIH ≥ 2 V across the full 2.7–5.5 V input range. A 3.3 V microcontroller GPIO can directly drive ENx low (0 V) or high (3.3 V) without level-shifting circuitry.
What is the purpose of GNDA and GNDB pins on the TPS2047ADRG4?
GNDA and GNDB provide separate ground references for the IN1/OUT1/OUT2 domain and the IN2/OUT3 domain, respectively. This physical separation prevents ground-loop coupling between independent power domains - essential for noise-sensitive applications like mixed-signal data acquisition or isolated communications interfaces.
TPS2047ADRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Switch Type:
- General Purpose
- Number of Outputs:
- 3
- Ratio - Input:Output:
- 1:1
- Output Configuration:
- High Side
- Output Type:
- N-Channel
- Interface:
- On/Off
- Voltage - Load:
- 2.7V ~ 5.5V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 250mA
- Rds On (Typ):
- 80mOhm
- Input Type:
- Inverting
- Features:
- -
- Fault Protection:
- Current Limiting (Fixed), Over Temperature, UVLO
- Operating Temperature:
- 0°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
TPS2047ADRG4 FAQ
1.How can I place an order for TPS2047ADRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS2047ADRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS2047ADRG4 reliable?
The price and inventory of TPS2047ADRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS2047ADRG4 is usually 5 days.
3.What payment methods are accepted for TPS2047ADRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS2047ADRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS2047ADRG4?
TPS2047ADRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS2047ADRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS2047ADRG4?
For technical support, including TPS2047ADRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS2047ADRG4 requirements.
6.How does Aetrix verify that TPS2047ADRG4 is sourced from the original manufacturer or authorized distributors?
All TPS2047ADRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS2047ADRG4 meets industry standards.
7.What is the process for return or replacement of TPS2047ADRG4?
All TPS2047ADRG4 units undergo pre-shipment inspection (PSI). If there is an issue with TPS2047ADRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS2047ADRG4 part is unused and in its original packaging.
Return procedure for TPS2047ADRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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