Texas Instruments TPS2047BDR
- Part No.:
- TPS2047BDR
- Manufacturer:
- Texas Instruments
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TPS2047BDR.pdf
- Description:
- IC PWR SWTCH N-CH 1:2/1:1 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS2047BDR from Texas Instruments is a triple-channel, current-limited, high-side power-distribution switch with 70-mΩ N-channel MOSFETs per channel, 250-mA continuous output current per switch, active-low enable inputs (EN1/EN2/EN3), and independent open-drain overcurrent outputs (OC1/OC2/OC3). It operates from 2.7 V to 5.5 V and is designed for USB host/hub power management in industrial and embedded systems.
For engineers reviewing the TPS2047BDR datasheet, TPS2047BDR pinout, TPS2047BDR application, or TPS2047BDR equivalent, key selection criteria include per-channel enable control, thermal/short-circuit protection with deglitched OC reporting, low standby current (≤2 µA), precise 0.5-A typical current limit, and SOIC-16 (D-16) package compatibility with USB 2.0 bus-powered and self-powered hub designs.
Technical Context
The TPS2047BDR integrates three independent high-side switches, each with internal charge-pump gate drive enabling operation down to 2.7 V input while maintaining controlled 0.6-ms typical rise time and <0.5-ms fall time. Each channel features dedicated undervoltage lockout (UVLO), current-sense FET-based limiting (0.3–0.7 A), and thermal shutdown at 135°C with 10°C hysteresis.
It implements per-channel fault detection via open-drain OCx outputs with 4–15 ms deglitching, eliminating false triggers during inrush or hot-plug events. The device supports bidirectional current flow and includes reverse leakage suppression (<0.2 µA at 25°C) and ESD protection (2 kV HBM, 500 V CDM).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.5 V - Enables direct use with USB 5-V rails and 3.3-V/2.7-V logic-supplied systems without external regulators. |
| Continuous Output Current | 250 mA per channel - Sustains full load across all three channels simultaneously under thermal limits. |
| rDS(on) | 70 mΩ typical at 5 V - Minimizes power loss (≤4.4 mW at 250 mA) and junction heating in compact SOIC-16 layout. |
| Current Limit Threshold | 0.3 A min / 0.7 A max - Ensures robust short-circuit protection while accommodating capacitive inrush up to 100 µF without false triggering. |
| Standby Supply Current | 2 µA max (all channels disabled) - Supports ultra-low-power system sleep states without compromising wake-up responsiveness. |
| OC Deglitch Time | 4–15 ms - Filters transient overloads (e.g., hot-plug, load capacitance charging) while preserving fast fault response for sustained shorts. |
| Thermal Shutdown Threshold | 135°C - Protects silicon integrity during continuous overload; automatic recovery at 125°C enables self-resetting fault handling. |
Pinout & Package
TPS2047BDR is packaged in a 16-pin SOIC (D-16) surface-mount package with exposed pad for thermal enhancement. Pin assignments are validated per TI SLVS532C datasheet Figure 3 and Terminal Functions table for TPS2047B.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 5 | GND | Power ground reference for all three channels; dual pins reduce ground impedance and improve thermal dissipation. |
| 2 | IN1 | Main input supply for OUT1 and OUT2; connects to upstream 5-V rail or regulated source shared by first two channels. |
| 3 | EN1 | Active-low enable for IN1→OUT1 path; logic low activates channel 1; pulled high internally when unused. |
| 4 | EN2 | Active-low enable for IN1→OUT2 path; independent control allows staggered power-up of downstream peripherals. |
| 6 | IN2 | Dedicated input for OUT3; enables dual-rail operation (e.g., separate 5-V and 3.3-V domains or isolated USB ports). |
| 7 | EN3 | Active-low enable for IN2→OUT3 path; decouples third channel from first two for flexible power domain partitioning. |
| 11 | OUT3 | High-side switched output for third channel; rated for 250 mA continuous, 70-mΩ rDS(on), and reverse leakage <0.2 µA. |
| 12 | OC3 | Open-drain overcurrent flag for channel 3; sinks current when IN2→OUT3 exceeds limit or overheats; requires external pull-up. |
| 13 | OC2 | Open-drain overcurrent flag for channel 2; electrically isolated from OC1/OC3 to support independent fault monitoring per port. |
| 14 | OUT2 | High-side switched output for second channel; shares IN1 but has independent EN2 and OC2 for discrete USB port control. |
| 15 | OUT1 | High-side switched output for first channel; primary port for critical downstream function (e.g., hub controller core logic). |
| 16 | OC1 | Open-drain overcurrent flag for channel 1; asserted low during fault; compatible with standard 3.3-V or 5-V microcontroller GPIO inputs. |
| 8, 9, 10 | NC | No-connect pins - must remain unconnected; no internal circuitry or thermal function; omitted from PCB layout. |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent high-side switches | Enables discrete power control of three USB downstream ports or mixed-voltage subsystems (e.g., IN1 for two 5-V ports, IN2 for isolated 3.3-V peripheral). |
| Per-channel active-low enable & OC reporting | Supports individual port enable/disable sequencing and fault isolation-critical for USB enumeration compliance and diagnostics in multi-port hubs. |
| 70-mΩ rDS(on) at 5 V | Reduces conduction loss to <3.5 mW per channel at 250 mA, minimizing thermal stress in SOIC-16 and eliminating need for heatsinking in most applications. |
| 0.6-ms typical rise time | Controls inrush into heavy capacitive loads (e.g., 100 µF per port) while meeting USB 2.0 hot-plug voltage slew requirements (<1 V/ms). |
| 135°C thermal shutdown with 10°C hysteresis | Prevents permanent damage during sustained short circuits; automatic cycling allows graceful degradation instead of hard failure. |
| 2.7-V minimum operating voltage | Ensures reliable operation across brown-out conditions and battery-backed 3.3-V systems, extending usability beyond standard USB 5-V only designs. |
Applications
| USB Self-Powered Hub | Industrial USB Host Controller |
|---|---|
|
Use Scenario: Desktop PC or monitor with four downstream USB ports requiring independent power control and overcurrent reporting to host controller. IC Role / Device Role / Timing Role: Triple high-side switch managing VBUS distribution to ports 1–3; provides per-port EN/OC signals to USB hub IC for compliance with USB 2.0 specification. Use Value: Eliminates need for three discrete single-channel switches, reduces BOM count by 60%, and ensures <100-ms fault response required for USB enumeration. |
Use Scenario: Ruggedized industrial computer with hot-swappable USB peripherals (barcode scanners, PLC interfaces) operating in wide temperature range. IC Role / Device Role / Timing Role: Power sequencer and protector for mission-critical USB functions; coordinates power-up timing across multiple peripherals using staggered EN1/EN2/EN3 asserts. Use Value: Prevents system reset due to inrush-induced voltage droop; thermal cycling tolerance (-40°C to 85°C ambient) maintains reliability in factory environments. |
| Embedded USB OTG Device | Multi-Rail Peripheral Power Manager |
|
Use Scenario: Portable medical device acting as USB OTG host for flash drives and sensors, requiring strict inrush control and fault isolation. IC Role / Device Role / Timing Role: Dual-rail manager: IN1 powers core controller and one port; IN2 powers isolated sensor interface; OCx flags feed MCU for real-time diagnostics. Use Value: Meets USB Battery Charging v1.2 inrush limits (<44 Ω + 10 µF) and enables safe hot-plug of untrusted peripherals without risking main system rail collapse. |
Use Scenario: Test equipment with mixed 5-V, 3.3-V, and 2.7-V peripheral slots requiring independent enable and fault monitoring. IC Role / Device Role / Timing Role: High-side switch array: IN1 supplies 5-V ports 1–2; IN2 supplies 3.3-V port 3; ENx/OCx provide granular control and diagnostics per slot. Use Value: Replaces discrete MOSFET + resistor + comparator solutions; achieves <1% current-limit tolerance and eliminates external sense resistors that add series resistance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-side power-switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS2046BD | Dual-channel version in same SOIC-16 package; lacks third IN2/EN3/OUT3/OC3 path; 1-µA standby current vs. 2-µA for TPS2047BDR. | Suitable for two-port USB hubs or dual-rail systems without need for third independent channel. | Select when BOM simplification and lower quiescent current outweigh requirement for triple-channel independence. |
| TPS2055BDR | Single-channel, active-high enable (EN), same 70-mΩ rDS(on) and 250-mA rating; SOIC-8 package; OC output active-low with identical deglitch. | Used where discrete per-port control is preferred over integrated multi-channel solution (e.g., modular board design). | Choose for scalability-stack multiple units for N-port hubs-or when legacy designs mandate active-high enable logic. |
Compared with TPS2046BD and TPS2055BDR, the TPS2047BDR uniquely delivers three independently enabled, thermally protected, and fault-reported power paths in a single SOIC-16 footprint-reducing PCB area by 40% versus dual TPS2055BDRs and enabling true triple-port USB hub integration without external logic.
Availability
TPS2047BDR is available at Aetrix Electronics and suitable for USB host/hub designs, industrial embedded controllers, and portable medical devices requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for TPS2047BDR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies with over 50 years of power management innovation.
The TPS204xB family-including TPS2047BDR-is engineered specifically for USB-compliant power distribution, delivering integrated current limiting, thermal protection, and per-port fault reporting in compact packages for host, hub, and peripheral applications.
FAQ
What is the maximum continuous current per channel for the TPS2047BDR?
The TPS2047BDR supports 250 mA continuous output current per channel under recommended operating conditions (VI(IN) = 2.7 V to 5.5 V, TA ≤ 85°C). This rating is maintained across all three channels simultaneously when thermal design limits (e.g., PCB copper area, airflow) prevent junction temperature exceeding 125°C. The device enters constant-current mode if load exceeds 0.3–0.7 A threshold.
Does the TPS2047BDR support USB 2.0 hot-plug compliance?
Yes, the TPS2047BDR meets USB 2.0 hot-plug requirements through its controlled 0.6-ms typical rise time, deglitched OC reporting (4–15 ms), and ability to limit inrush into 100-µF loads without false triggering. Its 2.7-V minimum operating voltage and -40°C to 85°C ambient range further ensure robustness during unplanned connect/disconnect events in real-world USB systems.
How does the TPS2047BDR handle thermal overload conditions?
When power dissipation raises junction temperature to 135°C, the TPS2047BDR initiates thermal shutdown, turning off all enabled channels. Recovery occurs automatically once die cools to 125°C (10°C hysteresis), allowing cyclical operation until fault removal. This behavior prevents permanent damage while maintaining visibility via persistent OCx assertion during overtemperature events.
Can the TPS2047BDR be used with both 5-V and 3.3-V input rails?
Yes-the TPS2047BDR accepts 2.7 V to 5.5 V on IN1 and IN2, supporting direct connection to standard USB 5-V VBUS and regulated 3.3-V system rails. Its charge-pump gate driver ensures full MOSFET enhancement even at 2.7 V, and logic thresholds (VIH = 2 V, VIL = 0.8 V) are compatible with both 3.3-V and 5-V enable signals.
What is the purpose of the NC pins (8, 9, 10) on the TPS2047BDR D-16 package?
Pins 8, 9, and 10 on the TPS2047BDR are designated No Connection (NC) and contain no internal circuitry. They must remain unconnected on the PCB-neither routed nor soldered-to avoid unintended coupling, parasitic capacitance, or thermal interference. These pins exist solely for mechanical symmetry and package standardization within the SOIC-16 footprint.
TPS2047BDR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Switch Type:
- General Purpose
- Number of Outputs:
- 3
- Ratio - Input:Output:
- 1:1
- Output Configuration:
- High Side
- Output Type:
- N-Channel
- Interface:
- On/Off
- Voltage - Load:
- 2.7V ~ 5.5V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 250mA
- Rds On (Typ):
- 70mOhm
- Input Type:
- Inverting
- Features:
- -
- Fault Protection:
- Current Limiting (Fixed), Over Temperature, UVLO
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
TPS2047BDR FAQ
1.How can I place an order for TPS2047BDR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS2047BDR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS2047BDR reliable?
The price and inventory of TPS2047BDR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS2047BDR is usually 5 days.
3.What payment methods are accepted for TPS2047BDR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS2047BDR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS2047BDR?
TPS2047BDR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS2047BDR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS2047BDR?
For technical support, including TPS2047BDR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS2047BDR requirements.
6.How does Aetrix verify that TPS2047BDR is sourced from the original manufacturer or authorized distributors?
All TPS2047BDR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS2047BDR meets industry standards.
7.What is the process for return or replacement of TPS2047BDR?
All TPS2047BDR units undergo pre-shipment inspection (PSI). If there is an issue with TPS2047BDR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS2047BDR part is unused and in its original packaging.
Return procedure for TPS2047BDR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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