Texas Instruments TPS2062AD
- Part No.:
- TPS2062AD
- Manufacturer:
- Texas Instruments
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TPS2062AD.pdf
- Description:
- IC PWR SWITCH N-CHAN 1:2 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:314
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Product details
Overview
TPS2062AD from Texas Instruments is a dual-channel, current-limited, high-side power-distribution switch featuring two 70 mΩ N-channel MOSFETs, 1 A continuous per-channel output, undervoltage lockout (UVLO) with 2.0 V rising threshold, thermal shutdown at 135°C, and active-low enable inputs. It is used in USB host ports and industrial peripheral power rails where controlled inrush and short-circuit protection are required.
For engineers reviewing the TPS2062AD datasheet, TPS2062AD pinout, TPS2062AD application, or TPS2062AD equivalent, key selection criteria include per-channel current-limit accuracy (1.2–2.0 A), SOIC-8 package thermal resistance (119.3°C/W), UVLO hysteresis (75 mV), soft-start rise time (0.6 ms typ.), and open-drain OCx fault reporting with 4–15 ms deglitching.
Technical Context
The TPS2062AD integrates an internal charge pump to drive N-channel MOSFET gates from 2.7–5.5 V input supplies, enabling low on-resistance operation without external gate bias. Its flat current-limit architecture responds solely to short-circuit output current (IOS), not a separate overcurrent trip threshold - distinguishing it from TPS2062ADRB/TPS2066A variants.
Each channel features independent thermal sensing, automatic recovery after cooling ≥10°C, and deglitched OCx outputs that assert only after sustained overload (≥4 ms). Enable logic is active-low, and UVLO disables both switches until IN rises above 2.0 V (±0.6 V over temperature), with built-in 75 mV hysteresis to prevent oscillation during transient dips.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| rDS(on) | 70 mΩ typical per channel at 25°C; enables ≤1 A continuous load with <70 mW conduction loss at 1 A |
| Current limit | 1.2–2.0 A short-circuit output current (IOS); fixed flat-limit behavior - no separate IOC trip point |
| Input voltage range | 2.7–5.5 V; supports USB 5 V and single-cell Li-ion systems with margin |
| UVLO threshold | 2.0–2.6 V rising edge; prevents erratic switching during brownout or cold-start conditions |
| Rise time | 0.6 ms typical (CL = 1 μF, RL = 5 Ω); limits inrush di/dt into heavy capacitive loads |
| OCx deglitch | 4–15 ms; suppresses false fault flags during hot-plug or bulk capacitor charging |
| Supply current (enabled) | 95–120 μA at 25°C; ultra-low quiescent draw for always-on power-rail monitoring |
Pinout & Package
TPS2062AD is packaged in an 8-pin SOIC (D package), with exposed pad not present - distinct from DRB-8 SON variant. All pins are surface-mount, lead-free, and RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN | Power input | Primary supply rail (2.7–5.5 V); feeds both channels and internal charge pump |
| GND | Ground reference | Common return for power, logic, and thermal sensing; must be low-impedance |
| EN1 | Channel 1 enable | Active-low logic input; pulls low to activate OUT1; high-Z when disabled |
| EN2 | Channel 2 enable | Active-low logic input; pulls low to activate OUT2; independent of EN1 |
| OUT1 | Channel 1 output | Switched high-side output; connects to load when EN1 = low and no fault |
| OUT2 | Channel 2 output | Switched high-side output; connects to load when EN2 = low and no fault |
| OC1 | Channel 1 fault flag | Open-drain, active-low output; sinks current when OUT1 is in overcurrent or thermal shutdown |
| OC2 | Channel 2 fault flag | Open-drain, active-low output; sinks current when OUT2 is in overcurrent or thermal shutdown |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional switch capability | Supports reverse current flow (e.g., backfeed from load to IN) up to 0.2 μA leakage at 5.5 V |
| Built-in soft-start | Controlled 0.6 ms rise time minimizes peak inrush into 1000 µF+ loads without external RC networks |
| Thermal protection with auto-recovery | Shuts down individual channel at ≥135°C junction; re-enables after cooling to ≤125°C - no latch-up |
| UL certification | UL File E169910 listed for both single- and ganged-channel configurations - meets end-equipment safety requirements |
| Low standby current | ≤1 μA max supply current when both EN1/EN2 high; enables battery-backed always-on monitoring |
Applications
| USB Host Port Protection | Industrial I/O Module Power Switching |
|---|---|
|
Use Scenario: Protecting downstream USB peripherals (e.g., hubs, storage, sensors) connected to a PC or embedded host against short circuits and hot-plug inrush. IC Role / Device Role / Timing Role: Dual-channel high-side power switch controlling +5 V distribution to two independent USB ports with per-port fault isolation. Use Value: Prevents host port shutdown during cable faults; OC1/OC2 signals allow firmware to disable only the affected port while maintaining operation on the other. |
Use Scenario: Powering field-connected analog I/O modules (e.g., 4–20 mA transmitters, RTD interfaces) in programmable logic controllers. IC Role / Device Role / Timing Role: Current-limited, thermally protected power switch delivering regulated 5 V to isolated sensor front-ends with diagnostic feedback. Use Value: Enables safe hot-swap of I/O cards; flat current limit ensures predictable trip behavior under varying load impedances and ambient temperatures. |
| Embedded System Peripheral Rail Control | Capacitive Load Sequencing in Test Equipment |
|
Use Scenario: Managing power to auxiliary subsystems (e.g., display backlight, SD card slot, Wi-Fi module) in medical or automotive infotainment units. IC Role / Device Role / Timing Role: Dual-channel enable-controlled power gate with soft-start and UVLO, synchronized to system power-up sequence. Use Value: Eliminates need for discrete FETs, gate drivers, and current-sense resistors; reduces BOM count and layout area by >40% vs discrete solution. |
Use Scenario: Controlled energization of large test fixtures containing multiple solenoids, relays, and decoupling banks (>10,000 µF total). IC Role / Device Role / Timing Role: High-current, slew-rate-controlled power switch limiting peak inrush to <2 A during fixture power-on. Use Value: Prevents tripping of upstream lab supplies; 0.6 ms rise time ensures repeatable, non-destructive turn-on across production test cycles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel power-switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS2062ADRB | Same functionality but in 8-pin SON (DRB) package; 47.5°C/W RθJA; includes overcurrent trip threshold (IOC) in addition to IOS | Better thermal performance in space-constrained layouts; supports IOC-based fault detection for tighter current tolerance | Select TPS2062ADRB when board area is limited and thermal dissipation >1 W is expected; verify PCB land pattern matches DRB-8 |
| TPS2061D | Single-channel version in SOIC-8; identical electrical specs except one channel; 50% lower supply current when only one rail needed | Used where only one switched rail is required - eliminates unused channel and simplifies enable logic | Choose TPS2061D for cost-optimized single-rail designs; avoids paying for second channel and OCx pin overhead |
Compared with TPS2062ADRB and TPS2061D, the TPS2062AD offers lowest-cost dual-channel SOIC solution with proven thermal margin for ≤0.5 W per channel, while retaining full fault diagnostics and UL listing - ideal for volume industrial USB and peripheral power applications.
Availability
TPS2062AD is available at Aetrix Electronics and suitable for USB host port protection, industrial I/O module power switching, and embedded peripheral rail control requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for TPS2062AD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, designing and manufacturing analog ICs, embedded processors, and power management solutions for industrial, automotive, and communications markets.
The TPS206xA family was developed specifically for robust, low-component-count power distribution in USB-compliant and industrial peripheral systems - emphasizing fault resilience, thermal autonomy, and plug-and-play integration without external current-sense or timing components.
FAQ
What is the undervoltage lockout (UVLO) behavior of the TPS2062AD?
The TPS2062AD disables both power switches when input voltage falls below 2.0 V (rising threshold) and re-enables them only after IN exceeds 2.6 V maximum. Hysteresis is fixed at 75 mV to prevent chattering during marginal supply conditions. This behavior is confirmed in Section 5.4 of the SLVS798G datasheet and applies exclusively to the TPS2062AD variant - not shared with TPS2066A or DRB-package versions.
Does the TPS2062AD support ganged operation of both channels?
Yes, the TPS2062AD supports ganged operation by tying EN1 and EN2 together and monitoring combined OC1/OC2 status. However, its ganged short-circuit current is specified at 2.4–4.0 A (IOS_G), and thermal shutdown remains per-channel - meaning one channel may shut down while the other continues operating. This behavior is documented in Table 5-4 and Section 7.3.2 of the TPS2062AD datasheet.
How does the TPS2062AD differ from the TPS2062ADRB in current-limit architecture?
The TPS2062AD implements a flat current-limit profile defined solely by short-circuit output current (IOS), whereas the TPS2062ADRB uses a peaking profile with both overcurrent trip threshold (IOC) and IOS. This means TPS2062AD has no separate IOC - it transitions directly to constant-current mode at IOS. The distinction is explicitly stated in Section 7.3 and Figure 7-1 of the SLVS798G datasheet.
What is the maximum continuous output current per channel for the TPS2062AD?
The TPS2062AD is rated for 1 A continuous output current per channel under recommended operating conditions (TJ ≤ 125°C, VIN = 2.7–5.5 V). This rating assumes proper PCB copper area and airflow; derating is required above 85°C ambient. The 1 A value is specified in Section 5.2 and reinforced by thermal data in Table 5.3 showing RθJA = 119.3°C/W for the SOIC-8 (D) package.
Can the OC1 and OC2 pins of the TPS2062AD drive an LED directly?
No - OC1 and OC2 are open-drain outputs rated for 5 mA sink current at 0.4 VOL. Driving an LED typically requires >5 mA and forward voltage >1.8 V, exceeding the OCx output's voltage compliance and current capability. A pull-up resistor to 3.3 V or 5 V and an external NPN transistor or logic buffer is required to interface with indicator LEDs. This limitation is specified in Section 5.4 under "Overcurrent Flag" parameters.
TPS2062AD Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Series:
- -
- Packaging:
- Bulk
- Product Status:
- Last Time Buy
- Switch Type:
- General Purpose
- Number of Outputs:
- 2
- Ratio - Input:Output:
- 1:2
- Output Configuration:
- High Side
- Output Type:
- N-Channel
- Interface:
- On/Off
- Voltage - Load:
- 2.7V ~ 5.5V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 1A
- Rds On (Typ):
- 70mOhm
- Input Type:
- Non-Inverting
- Features:
- Status Flag
- Fault Protection:
- Current Limiting (Fixed), Over Temperature, UVLO
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TPS2062AD FAQ
1.How can I place an order for TPS2062AD through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS2062AD on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS2062AD reliable?
The price and inventory of TPS2062AD are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS2062AD is usually 5 days.
3.What payment methods are accepted for TPS2062AD?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS2062AD transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS2062AD?
TPS2062AD orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS2062AD order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS2062AD?
For technical support, including TPS2062AD datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS2062AD requirements.
6.How does Aetrix verify that TPS2062AD is sourced from the original manufacturer or authorized distributors?
All TPS2062AD products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS2062AD meets industry standards.
7.What is the process for return or replacement of TPS2062AD?
All TPS2062AD units undergo pre-shipment inspection (PSI). If there is an issue with TPS2062AD, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS2062AD part is unused and in its original packaging.
Return procedure for TPS2062AD:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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