Texas Instruments TPS2062CDGN
- Part No.:
- TPS2062CDGN
- Manufacturer:
- Texas Instruments
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
- Datasheet:
-
TPS2062CDGN.pdf
- Description:
- IC PWR SWITCH N-CHAN 1:2 8MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:534
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Product details
Overview
TPS2062CDGN from Texas Instruments is a dual-channel, current-limited power-distribution switch designed for USB and peripheral power management. It delivers 1 A per channel with ±20% current-limit tolerance, 70 mΩ typical on-resistance, fast 2 µs overcurrent response, and operates from 4.5 V to 5.5 V - enabling robust short-circuit protection in laptops and USB hubs.
For engineers reviewing the TPS2062CDGN datasheet, TPS2062CDGN pinout, TPS2062CDGN application, or TPS2062CDGN equivalent, key selection criteria include active-low enable logic, deglitched fault reporting (FLT1/FLT2), built-in softstart, reverse current blocking, and SOIC-8 package thermal performance (RθJA = 129.9°C/W).
Technical Context
The TPS2062CDGN integrates two independent high-side N-channel MOSFET power switches with precision current limiting and thermal shutdown. Each channel features separate enable (EN1/EN2, active-low) and open-drain fault (FLT1/FLT2) signals, with deglitching (7–13 ms) to prevent false trip during transient overload.
It employs controlled rise/fall times (1.4–3.25 ms) to limit inrush current into capacitive loads up to 150 µF, while maintaining reverse current blocking and output discharge functionality. The device operates across –40°C to 85°C ambient and includes undervoltage lockout (UVLO) at 3.4–4.0 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Rated Current | 1 A per channel - supports USB 2.0 downstream ports and auxiliary 5 V rails requiring precise current limiting. |
| Input Voltage Range | 4.5 V to 5.5 V - compatible with standard USB 5 V supply with margin for line drop and ripple. |
| rDS(on) | 90 mΩ typical (SOIC-8) - limits conduction loss to ≤90 mW at 1 A, reducing thermal stress in compact layouts. |
| Overcurrent Response | 2 µs typical - enables rapid current foldback before system-level damage occurs during hard shorts. |
| Fault Reporting | Active-low, deglitched open-drain FLT1/FLT2 - simplifies host MCU interrupt handling without external debouncing. |
| Enable Logic | Active-low EN1/EN2 - interfaces directly with low-voltage GPIOs or dedicated USB power-control logic. |
| Ambient Temp Range | –40°C to 85°C - qualified for industrial and consumer equipment operating in uncontrolled environments. |
Pinout & Package
TPS2062CDGN uses an 8-pin SOIC (D) package (3.90 mm × 4.90 mm) with exposed PowerPAD™ thermal pad connected internally to GND. The package supports PCB-level heat sinking via soldered pad connection to ground plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pin 1) | Ground reference | Primary return path for power and logic; must be low-impedance connection to PCB ground plane. |
| IN (Pin 2) | Power input | 5 V supply input; requires ≥0.1 µF ceramic bypass capacitor placed adjacent to pin. |
| EN1 (Pin 3) | Channel 1 enable | Active-low control - drives low to turn on OUT1; pulled high via external resistor if unused. |
| EN2 (Pin 4) | Channel 2 enable | Active-low control - drives low to turn on OUT2; independent of EN1 for discrete load control. |
| OUT1 (Pin 5) | Channel 1 output | Switched 5 V output to load; includes softstart and reverse-current blocking. |
| OUT2 (Pin 6) | Channel 2 output | Switched 5 V output to second load; electrically isolated from OUT1 except through shared IN/GND. |
| FLT1 (Pin 7) | Channel 1 fault indicator | Open-drain output asserted low during overcurrent or overtemperature on OUT1. |
| FLT2 (Pin 8) | Channel 2 fault indicator | Open-drain output asserted low during overcurrent or overtemperature on OUT2. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent high-side switches | Enables discrete power control of two USB ports or peripherals without cross-talk or shared failure modes. |
| Accurate ±20% current limit | Guarantees predictable 1.28–1.94 A trip threshold across temperature and voltage, eliminating need for external sensing. |
| Built-in softstart | Controls output slew rate (1.4–3.25 ms turnon/off) to suppress inrush into large capacitive loads (e.g., 150 µF). |
| Reverse current blocking | Prevents backfeed from powered loads into the 5 V rail when IN is absent - critical for hot-swap compliance. |
| Output discharge (TPS2062C variant) | Internally discharges OUT1/OUT2 to GND when disabled, ensuring safe state transition for downstream circuitry. |
Applications
| USB Hub Power Management | Laptop Peripheral Port Control |
|---|---|
Use Scenario: Distributing regulated 5 V to four downstream USB 2.0 ports with individual overcurrent protection. IC Role / Device Role / Timing Role: Dual-channel power switch providing independent enable/fault signaling per port pair. Use Value: Eliminates need for discrete MOSFETs, sense resistors, and comparator circuits - reduces BOM count by ≥7 components per port pair. | Use Scenario: Controlling power to ExpressCard slot and HDMI port on ultrabook motherboard. IC Role / Device Role / Timing Role: High-side load switch with fast fault response and softstart for hot-plug compliance. Use Value: Prevents system reset during card insertion by limiting inrush to <1.94 A and asserting FLT within 2 µs on short. |
| Set-Top Box USB Host Ports | Digital TV Backlight Power Sequencing |
Use Scenario: Powering external storage and HID devices from STB's dual USB-A receptacles. IC Role / Device Role / Timing Role: Current-limited distribution switch with deglitched fault reporting for MCU monitoring. Use Value: Enables firmware-based port disable/recovery without hardware redesign - supports USB Battery Charging spec. | Use Scenario: Sequencing 5 V bias to LED driver ICs after main DC-DC rails stabilize. IC Role / Device Role / Timing Role: Controlled power-enable switch with precise timing (1.4–2.4 ms turnon) and reverse blocking. Use Value: Prevents backfeed into standby rails and ensures clean power-up sequence for display subsystems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel power-switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS2062C-2DGN | No output discharge function; otherwise identical current rating, pinout, and enable logic. | Suitable where fast output discharge is not required (e.g., non-hot-swap systems). | Select TPS2062C-2DGN only if output discharge is unnecessary - saves no board space but removes pulldown path. |
| TPS2066CDGN | Active-high enable (EN1/EN2), same 1 A rating, SOIC-8 package, identical rDS(on) and fault behavior. | Requires inverted control signal; preferred in designs using push-pull drivers or level-shifted GPIOs. | Choose TPS2066CDGN when MCU GPIOs drive high-active logic - avoids external inverters in enable path. |
Compared with TPS2062CDGN, TPS2062C-2DGN removes output discharge (reducing internal complexity), while TPS2066CDGN changes enable polarity - both retain identical thermal, current-limit, and fault-reporting performance in SOIC-8 form factor.
Availability
TPS2062CDGN is available at Aetrix Electronics and suitable for USB hubs, laptop peripheral ports, and set-top box host interfaces requiring stable component supply, long-term lifecycle support, and TI-qualified industrial-grade reliability.
Supply support for TPS2062CDGN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and consumer markets.
The TPS20xxC family was engineered specifically for USB-compliant power distribution - emphasizing fast fault response, softstart, reverse blocking, and seamless integration with host controller power management firmware.
FAQ
What is the maximum continuous output current per channel for the TPS2062CDGN?
The TPS2062CDGN supports 1 A continuous output current per channel under recommended operating conditions (4.5 V to 5.5 V input, –40°C to 85°C ambient). Its current-limit threshold is specified at 1.28–1.94 A, with ±20% tolerance across temperature and voltage. This rating is validated for SOIC-8 package operation with proper PCB thermal design.
Does the TPS2062CDGN provide reverse current blocking?
Yes, the TPS2062CDGN provides integrated reverse current blocking. When the input (IN) is de-energized while the output (OUT1 or OUT2) remains biased, the internal high-side N-channel MOSFET prevents backflow from the load into the source rail - a critical feature for USB hot-swap and system-level power sequencing integrity.
What is the enable logic polarity for the TPS2062CDGN?
The TPS2062CDGN uses active-low enable logic on both EN1 and EN2 pins. Driving either pin low enables its respective output channel; pulling high disables it. This matches common microcontroller GPIO configurations used in USB power control firmware and eliminates need for external inverters in most implementations.
How does the TPS2062CDGN report overcurrent faults?
The TPS2062CDGN reports overcurrent faults via two independent open-drain outputs: FLT1 for channel 1 and FLT2 for channel 2. Each asserts low during overcurrent or overtemperature events and includes 7–13 ms deglitching to reject noise-induced false triggers. External pull-up resistors are required to interface with MCU interrupt inputs.
Is the TPS2062CDGN pin-compatible with other devices in the TPS20xxC family?
Yes, the TPS2062CDGN in SOIC-8 (D) package shares identical pinout with TPS2066CDGN and TPS2060CDGN. However, enable polarity differs: TPS2062CDGN uses active-low EN, while TPS2066CDGN uses active-high EN. No PCB changes are needed for footprint compatibility, but firmware or external logic must accommodate enable polarity differences.
TPS2062CDGN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
- Series:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Switch Type:
- General Purpose
- Number of Outputs:
- 2
- Ratio - Input:Output:
- 1:2
- Output Configuration:
- High Side
- Output Type:
- N-Channel
- Interface:
- On/Off
- Voltage - Load:
- 4.5V ~ 5.5V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 1A
- Rds On (Typ):
- 70mOhm
- Input Type:
- Non-Inverting
- Features:
- Load Discharge, Status Flag
- Fault Protection:
- Current Limiting (Fixed), Over Temperature, Reverse Current, UVLO
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-HVSSOP
TPS2062CDGN FAQ
1.How can I place an order for TPS2062CDGN through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS2062CDGN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS2062CDGN reliable?
The price and inventory of TPS2062CDGN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS2062CDGN is usually 5 days.
3.What payment methods are accepted for TPS2062CDGN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS2062CDGN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS2062CDGN?
TPS2062CDGN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS2062CDGN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS2062CDGN?
For technical support, including TPS2062CDGN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS2062CDGN requirements.
6.How does Aetrix verify that TPS2062CDGN is sourced from the original manufacturer or authorized distributors?
All TPS2062CDGN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS2062CDGN meets industry standards.
7.What is the process for return or replacement of TPS2062CDGN?
All TPS2062CDGN units undergo pre-shipment inspection (PSI). If there is an issue with TPS2062CDGN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS2062CDGN part is unused and in its original packaging.
Return procedure for TPS2062CDGN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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