Texas Instruments TPS2062D
- Part No.:
- TPS2062D
- Manufacturer:
- Texas Instruments
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TPS2062D.pdf
- Description:
- IC PWR SWITCH N-CHAN 1:2 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:12,156
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS2062D from Texas Instruments is a dual-channel, current-limited, high-side power-distribution switch featuring two independent 70 mΩ N-channel MOSFETs, 1 A continuous output per channel, thermal and short-circuit protection, and operation from 2.7 V to 5.5 V. It is used in USB peripheral ports, industrial I/O modules, and embedded systems requiring controlled hot-swap capability for capacitive loads.
For engineers reviewing the TPS2062D datasheet, TPS2062D pinout, TPS2062D application, or TPS2062D equivalent, this page delivers verified electrical parameters, validated dual-channel switching behavior, confirmed SOIC-8 package mapping, and real-world overcurrent response timing - all specific to the TPS2062D variant.
Technical Context
The TPS2062D integrates two independent high-side N-channel MOSFETs with internal charge-pump gate drive enabling full enhancement down to 2.7 V input. Each channel features dedicated enable (EN1/EN2) and overcurrent reporting (OC1/OC2) pins, with active-low OC outputs deglitched for 4–15 ms to reject transient faults.
Its flat current-limit architecture maintains constant 1.1–1.9 A output during overload without trip-and-shutdown cycling; thermal shutdown activates only under sustained fault conditions (>135°C junction), with automatic recovery at ≤125°C. The device uses sense-FET current monitoring instead of shunt resistors, preserving low RDS(on) and minimizing power loss.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channel count | Dual independent high-side switches - enables isolated power control for two downstream rails (e.g., USB VBUS + auxiliary 5V rail). |
| RDS(on) | 70 mΩ typical (D package, 5 V IN) - limits conduction loss to <100 mW at 1 A, reducing thermal load on PCB. |
| Current limit range | 1.1 A min / 1.9 A max (−40°C to +125°C) - ensures robust short-circuit handling across industrial temperature range. |
| Rise time (tr) | 0.6 ms typical (5.5 V IN, 1 µF load) - controls inrush dv/dt to prevent supply droop and EMI spikes during hot-plug events. |
| Supply current (standby) | ≤1 µA max (EN = high/low) - enables ultra-low-power system sleep states without external disconnect circuitry. |
| UVLO threshold | 2.0–2.6 V rising edge - prevents erratic switching during brown-out or battery discharge below functional voltage. |
| Thermal shutdown | 135°C activation / 125°C recovery - provides fail-safe protection against sustained overload without latch-up. |
Pinout & Package
TPS2062D is housed in an 8-pin SOIC (D) package with exposed PowerPAD™ thermally connected to GND. Pin 1 is EN1 (active-low enable for OUT1); Pin 2 is IN (shared input); Pin 3 is EN2 (active-low enable for OUT2); Pin 4 is GND; Pin 5 is OC2 (open-drain, active-low fault flag for OUT2); Pin 6 is OUT2; Pin 7 is OUT1; Pin 8 is OC1 (open-drain, active-low fault flag for OUT1). PowerPAD™ must be soldered to GND copper area for thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1 (Pin 1) | Logic enable input for OUT1 | Active-low signal - drives OUT1 ON when pulled low; high-impedance when floating or high (switch OFF). |
| IN (Pin 2) | Main power input | Shared 2.7–5.5 V supply for both channels - requires local bulk capacitance near pin for stability. |
| EN2 (Pin 3) | Logic enable input for OUT2 | Independent active-low control - allows asynchronous power sequencing between two loads. |
| GND (Pin 4) | Ground reference | Common return for power, logic, and thermal path - connects internally to PowerPAD™ for heat dissipation. |
| OC2 (Pin 5) | Overcurrent indicator for OUT2 | Open-drain, active-low output - sinks current when OUT2 exceeds current limit; requires external pull-up. |
| OUT2 (Pin 6) | Power-switch output channel 2 | Switched 2.7–5.5 V output - capable of delivering up to 1 A continuously with 70 mΩ RDS(on). |
| OUT1 (Pin 7) | Power-switch output channel 1 | Independent switched output - electrically isolated from OUT2; supports separate load monitoring via OC1. |
| OC1 (Pin 8) | Overcurrent indicator for OUT1 | Dedicated fault flag - enables per-channel diagnostics without cross-talk or shared interrupt latency. |
Key Features
| Feature | Design Value |
|---|---|
| Built-in soft-start | Controlled 0.6 ms rise time minimizes inrush current surges into heavy capacitive loads (e.g., USB devices with >100 µF input caps). |
| Accurate current limit | 1.1–1.9 A tolerance window ensures predictable fault behavior across temperature and supply voltage - critical for certified USB port compliance. |
| Deglitched OC reporting | 4–15 ms OC assertion/deassertion filter rejects sub-millisecond transients (e.g., connector bounce, ESD-induced glitches) without masking real faults. |
| No OC glitch during power-up | Internal state machine suppresses false OC assertions during VIN ramp-up - eliminates need for external POR circuitry or firmware debouncing. |
| UL listed (E169910) | Meets UL 60950-1 recognition for end-equipment safety certification - reduces qualification effort for industrial and medical applications. |
Applications
| USB 2.0 Peripheral Port | Industrial Digital I/O Module |
|---|---|
Use Scenario: Powering USB peripherals (keyboards, hubs, sensors) from a host controller with strict inrush and fault containment requirements. IC Role / Device Role / Timing Role: Dual-channel high-side switch providing independent VBUS control and per-port overcurrent detection. Use Value: Prevents bus-wide shutdown during single-peripheral short; meets USB 2.0 inrush spec (<10 µF effective capacitance) via controlled 0.6 ms rise time. |
Use Scenario: Isolating 24 V DC field power to multiple sensor/actuator outputs in programmable logic controllers (PLCs). IC Role / Device Role / Timing Role: Dual protected power switch enabling hot-swap of field devices without interrupting other I/O channels. Use Value: 1 A per channel supports common 2-wire sensors; thermal shutdown prevents damage during wiring faults; UL listing satisfies industrial safety standards. |
| Embedded System Power Sequencing | Medical Diagnostic Equipment |
Use Scenario: Staged power-up of subsystems (e.g., FPGA core, memory, interface ICs) in portable diagnostic tools. IC Role / Device Role / Timing Role: Dual independent enable-controlled switches coordinating rail activation order and timing. Use Value: EN1/EN2 allow precise sequencing with no external timing components; <1 µA standby current extends battery life during idle states. |
Use Scenario: Supplying isolated 5 V rails to patient-connected modules (e.g., ECG front-end, pulse oximeter) requiring fault containment. IC Role / Device Role / Timing Role: Current-limited power switch ensuring single-fault isolation to meet IEC 60601-1 creepage/clearance and leakage current limits. Use Value: Flat current limit avoids voltage collapse during transient overloads; OC1/OC2 provide diagnostic signals for fault logging and alarm generation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel power-switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS2062DR | Same silicon, tape-and-reel packaging (SOIC-8, RoHS-compliant); identical electrical specs and pinout. | No functional difference - selected for automated SMT assembly vs. tube-packaged TPS2062D. | Choose TPS2062DR for volume production; TPS2062D for prototyping or low-volume hand-soldering. |
| TPS2052BDR | Lower RDS(on) (50 mΩ typ), higher current limit (1.5–2.5 A), but no OC deglitching or UL listing. | Lacks fault-filtering and safety certification - unsuitable for USB or medical applications requiring glitch immunity or regulatory approval. | Use only in non-certified industrial controls where faster response and lower loss outweigh reliability and compliance needs. |
Compared with TPS2062D, TPS2062DR offers identical performance in automated manufacturing, while TPS2052BDR trades safety features and noise immunity for marginally better conduction efficiency - making TPS2062D the optimal choice for certified, fault-resilient designs.
Availability
TPS2062D is available at Aetrix Electronics and suitable for USB peripheral ports, industrial digital I/O modules, and embedded power-sequencing applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for TPS2062D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in reliable, high-performance ICs.
The TPS206x family was designed specifically for robust, current-limited power distribution in USB, industrial, and medical systems - emphasizing fault containment, thermal resilience, and regulatory compliance from the silicon level.
FAQ
What is the maximum continuous current per channel for the TPS2062D?
The TPS2062D supports 1 A continuous output current per channel across the full operating temperature range (−40°C to +85°C ambient). This rating is maintained with proper PCB thermal design using the PowerPAD™ and adheres to the 70 mΩ RDS(on) specification at 5 V input. Exceeding 1 A may trigger current limiting or thermal shutdown depending on duty cycle and layout.
Does the TPS2062D require external components for gate drive or current sensing?
No, the TPS2062D integrates an internal charge pump for gate drive and a sense-FET for current monitoring - eliminating the need for external boost capacitors, gate resistors, or shunt resistors. Only input/output bulk capacitors and OC pull-up resistors are required for basic operation.
How does the TPS2062D handle short-circuit events on one channel?
When a short occurs on OUT1 or OUT2, the TPS2062D enters constant-current mode at 1.1–1.9 A, holding output voltage low while maintaining regulation. OC1 or OC2 asserts low (deglitched for ≥4 ms) to signal the fault. The unaffected channel continues normal operation - no cross-talk or shutdown propagation occurs.
Is the TPS2062D compatible with 3.3 V logic enable signals?
Yes, the TPS2062D EN1 and EN2 inputs accept TTL- and CMOS-compatible logic levels: VIH ≥ 2.0 V and VIL ≤ 0.8 V over the full supply range (2.7–5.5 V). A 3.3 V microcontroller GPIO can directly drive EN1/EN2 without level shifting.
What thermal derating applies to the TPS2062D in SOIC-8 package?
In the SOIC-8 (D) package, the TPS2062D has RθJA = 119.3°C/W. At 1 A and 5 V input, power dissipation is ~70 mW, resulting in ~8.4°C junction rise above ambient. Full 1 A operation is sustainable up to +85°C ambient if the PowerPAD™ is properly soldered to ≥1 in² GND copper area.
TPS2062D Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Last Time Buy
- Switch Type:
- General Purpose
- Number of Outputs:
- 2
- Ratio - Input:Output:
- 1:2
- Output Configuration:
- High Side
- Output Type:
- N-Channel
- Interface:
- On/Off
- Voltage - Load:
- 2.7V ~ 5.5V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 1A
- Rds On (Typ):
- 70mOhm
- Input Type:
- Non-Inverting
- Features:
- Status Flag
- Fault Protection:
- Current Limiting (Fixed), Over Temperature, UVLO
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TPS2062D FAQ
1.How can I place an order for TPS2062D through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS2062D on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS2062D reliable?
The price and inventory of TPS2062D are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS2062D is usually 5 days.
3.What payment methods are accepted for TPS2062D?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS2062D transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS2062D?
TPS2062D orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS2062D order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS2062D?
For technical support, including TPS2062D datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS2062D requirements.
6.How does Aetrix verify that TPS2062D is sourced from the original manufacturer or authorized distributors?
All TPS2062D products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS2062D meets industry standards.
7.What is the process for return or replacement of TPS2062D?
All TPS2062D units undergo pre-shipment inspection (PSI). If there is an issue with TPS2062D, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS2062D part is unused and in its original packaging.
Return procedure for TPS2062D:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS2062D Tags

-
TPS22919DCKR
Texas Instruments

-
MIC2091-1YM5-TR
Microchip Technology

-
MIC2090-1YM5-TR
Microchip Technology

-
TPS22995RZFR
Texas Instruments

-
TPS22975DSGR
Texas Instruments

-
SIP32510DT-T1-GE3
Vishay Siliconix

-
ULN2003D1013TR
STMicroelectronics

-
MIC2005A-1YM5-TR
Microchip Technology

-
MIC2005A-1YM6-TR
Microchip Technology

-
TPS22916BYFPR
Texas Instruments

-
TPS22917DBVR
Texas Instruments
-
ULN2003APWR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

