Texas Instruments TPS2066DGN
- Part No.:
- TPS2066DGN
- Manufacturer:
- Texas Instruments
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
- Datasheet:
-
TPS2066DGN.pdf
- Description:
- IC PWR SWITCH N-CHAN 1:2 8MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,279
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS2066DGN from Texas Instruments is a dual-channel, current-limited, high-side power-distribution switch featuring two 70 mΩ N-channel MOSFETs, 1 A continuous output per channel, thermal and short-circuit protection, and operation from 2.7 V to 5.5 V supply. It is used in USB peripheral ports and hot-swap interfaces where controlled inrush into heavy capacitive loads is required.
For engineers reviewing the TPS2066DGN datasheet, TPS2066DGN pinout, TPS2066DGN application, or TPS2066DGN equivalent, key selection criteria include per-channel current limit accuracy (1.1–1.9 A), rise time (0.6 ms typical), undervoltage lockout threshold (2.0–2.6 V), bidirectional switching capability, and HVSSOP-8 package thermal performance (RθJA = 53.6 °C/W).
Technical Context
The TPS2066DGN integrates two independent high-side power switches with internal charge-pump gate drive enabling full enhancement down to 2.7 V input. Each channel features dedicated enable (EN1/EN2, active-high) and overcurrent reporting (OC1/OC2, open-drain active-low) pins, supporting discrete control and fault monitoring.
Its flat current-limit architecture maintains constant output current (IOS) during overload without trip-and-shutdown behavior - limiting at 1.5 A typical across temperature - while thermal shutdown activates only under sustained fault conditions (>135 °C junction). The deglitched OC outputs suppress false triggers during power-up or transient load events.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Continuous Output Current | 1 A per channel - supports stable USB 2.0 port power delivery and peripheral hot-plug without external current sensing. |
| On-Resistance (rDS(on)) | 70 mΩ typical at 5 V - minimizes conduction loss (≤70 mW at 1 A), reducing thermal stress in compact layouts. |
| Current Limit Range | 1.1 A min / 1.9 A max - ensures robust short-circuit tolerance while avoiding nuisance tripping on capacitive inrush. |
| Rise Time (tr) | 0.6 ms typical - controls inrush dv/dt to limit peak surge current into 100 µF+ loads (e.g., USB hubs, SSD enclosures). |
| Supply Voltage Range | 2.7 V to 5.5 V - compatible with single Li-ion, 3.3 V logic rails, and 5 V USB bus without level-shifting. |
| Standby Supply Current | 1 µA max - enables ultra-low-power system sleep states without disabling downstream rail sequencing. |
| Operating Temperature | -40°C to +85°C ambient - validated for industrial-grade embedded systems and automotive accessory modules. |
Pinout & Package
HVSSOP-8 (DGN) package with exposed PowerPAD™ thermally connected to GND; 0.65 mm pitch, 3.0 mm × 3.0 mm footprint, 1.0 mm height. PowerPAD must be soldered to PCB ground plane for thermal compliance (RθJB = 35.5 °C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - GND | Ground reference and thermal pad connection | Primary return path for power and logic; PowerPAD soldering mandatory for thermal reliability above 0.5 A continuous. |
| 2 - IN | Input voltage supply | Common input rail for both channels; accepts 2.7–5.5 V; must be decoupled locally (≥1 µF ceramic). |
| 3 - EN1 | Channel 1 enable input | Active-high logic control (VIH ≥ 2 V); drives internal bias circuits to activate OUT1 when high. |
| 4 - EN2 | Channel 2 enable input | Active-high logic control (VIH ≥ 2 V); independent of EN1, enabling asymmetric power sequencing. |
| 5 - OC2 | Channel 2 overcurrent flag | Open-drain, active-low output; pulled low during current limit; requires external pull-up (≥10 kΩ) to VI(IN). |
| 6 - OUT2 | Channel 2 switched output | High-side power output; no reverse conduction; supports bidirectional load current flow only when enabled. |
| 7 - OUT1 | Channel 1 switched output | High-side power output; electrically isolated from OUT2; supports independent load domains. |
| 8 - OC1 | Channel 1 overcurrent flag | Open-drain, active-low output; de-glitched (4–15 ms filter); asserts only after sustained overcurrent. |
Key Features
| Feature | Design Value |
|---|---|
| Built-in soft-start | Controlled 0.6 ms rise time prevents >1 A inrush into 100 µF loads, eliminating need for external RC networks. |
| Accurate current limit | 1.1–1.9 A range with ±20% tolerance ensures predictable fault response without derating for worst-case temp/voltage. |
| Thermal and short-circuit protection | Auto-recovery thermal shutdown at 135 °C junction with 10 °C hysteresis avoids latch-up during intermittent faults. |
| Undervoltage lockout (UVLO) | 2.0–2.6 V turn-on threshold prevents erratic switching during brown-out or battery sag below 2.7 V nominal. |
| Deglitched OC reporting | 4–15 ms OC assertion delay rejects sub-millisecond transients (e.g., ESD, connector bounce), improving system diagnostics. |
| 1 µA standby current | Enables true zero-power disable mode - critical for battery-backed systems requiring multi-year shelf life. |
Applications
| USB Peripheral Port Protection | Industrial Hot-Swap Module |
|---|---|
|
Use Scenario: Powering USB 2.0 peripherals (keyboards, webcams, flash drives) from a shared 5 V rail with plug-in detection. IC Role / Device Role / Timing Role: Dual high-side switch isolating each peripheral; EN1/EN2 sequenced by host controller GPIO; OC1/OC2 feed interrupt lines. Use Value: Prevents bus collapse during hot-insertion of 100–470 µF capacitive loads; eliminates need for discrete polyfuses or current-sense amps. |
Use Scenario: Adding modular I/O cards to programmable logic controllers (PLCs) without powering down the main backplane. IC Role / Device Role / Timing Role: Dual-channel power gate controlling 24 V or 5 V auxiliary rails; soft-start limits inrush into card-level bulk capacitance. Use Value: Enables safe field replacement of I/O modules; thermal protection prevents damage during accidental short-circuit wiring errors. |
| Embedded System Power Sequencing | Automotive Accessory Interface |
|
Use Scenario: Managing power to camera sensors and Wi-Fi modules in edge AI gateways with strict wake-up timing budgets. IC Role / Device Role / Timing Role: Independent EN1/EN2 control allows staggered activation of subsystems; OC flags trigger firmware fault logging. Use Value: Reduces system-level BOM count by replacing two discrete load switches; 1 µA standby supports always-on wake-on-event functionality. |
Use Scenario: Powering USB-C or legacy USB-A ports in vehicle infotainment head units with battery backup during engine cranking. IC Role / Device Role / Timing Role: High-side switch operating from 9–16 V battery via LDO; UVLO prevents dropout-induced resets during cold cranking. Use Value: Maintains port availability during 6 V battery dips; thermal shutdown protects against sustained shorts in harsh under-hood environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel power-switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS2062DR | SOIC-8 package (RθJA = 119.3 °C/W); identical electrical specs; no PowerPAD™ | Lower power density; suitable for non-thermally constrained boards with ample copper area | Select when board space permits larger SOIC footprint and thermal management relies on trace copper rather than thermal pad soldering. |
| TPS2052BDR | 2.7–5.5 V range; 500 mA per channel; 100 mΩ rDS(on); no OC reporting | Limited to low-power peripherals (e.g., mice, HID devices); lacks fault visibility for diagnostics | Choose only for cost-sensitive, low-current designs where overcurrent feedback is unnecessary and 1 A rating is excessive. |
Compared with TPS2066DGN, TPS2062DR trades thermal performance for ease of hand-soldering and legacy footprint compatibility, while TPS2052BDR reduces capability to cut cost - neither offers the same combination of 1 A/channel, accurate current limit, dual OC reporting, and HVSSOP thermal efficiency.
Availability
TPS2066DGN is available at Aetrix Electronics and suitable for USB peripheral protection, industrial hot-swap modules, and embedded power sequencing requiring stable component supply and long-term manufacturability.
Supply support for TPS2066DGN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management IC design and manufacturing.
The TPS206x family was engineered specifically for robust, low-EMI power distribution in USB and hot-swap applications - emphasizing precise current limiting, thermal resilience, and minimal external component count.
FAQ
What is the maximum continuous current per channel for the TPS2066DGN?
The TPS2066DGN supports 1 A continuous output current per channel under recommended operating conditions (TA ≤ 85°C, proper PCB thermal design). This rating is maintained across the full 2.7–5.5 V input range and is validated with the HVSSOP-8 PowerPAD™ soldered to a 1-in² ground plane. Exceeding 1 A may trigger current limiting or thermal shutdown depending on ambient and layout conditions.
Does the TPS2066DGN support bidirectional current flow?
Yes, the TPS2066DGN supports bidirectional current flow when enabled - meaning load current can flow from IN to OUT (normal operation) or from OUT to IN (e.g., backfeeding during hot-swap disconnect). However, it does not allow reverse conduction when disabled; the high-side N-MOSFET blocks all current in the off state, preventing backpowering of the input rail.
How does the overcurrent (OC) reporting work on the TPS2066DGN?
The TPS2066DGN provides two independent open-drain, active-low OC outputs (OC1 and OC2), each corresponding to its respective channel. When current exceeds the 1.1–1.9 A limit, the associated OC pin pulls low after a 4–15 ms deglitch delay to reject noise. The output remains low until current falls below the hysteresis threshold, enabling reliable microcontroller interrupt handling without software debouncing.
What is the purpose of the PowerPAD™ on the TPS2066DGN package?
The exposed PowerPAD™ on the HVSSOP-8 package of the TPS2066DGN is internally connected to GND and serves as the primary thermal conduction path. Soldering it to a PCB ground plane reduces RθJB to 35.5 °C/W - essential for sustaining 1 A per channel at elevated ambient temperatures. Omitting PowerPAD™ soldering risks thermal shutdown even at moderate loads due to excessive junction temperature rise.
Can the TPS2066DGN operate from a 3.3 V supply?
Yes, the TPS2066DGN operates fully across 2.7 V to 5.5 V, including 3.3 V nominal rails. At 3.3 V input, rDS(on) increases to 135 mΩ typical (vs. 70 mΩ at 5 V), resulting in ~180 mW conduction loss at 1 A. Rise time extends to ~0.8 ms, but remains within specification. All logic thresholds (EN, OC) remain compatible with 3.3 V CMOS/TTL levels.
TPS2066DGN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Last Time Buy
- Switch Type:
- General Purpose
- Number of Outputs:
- 2
- Ratio - Input:Output:
- 1:2
- Output Configuration:
- High Side
- Output Type:
- N-Channel
- Interface:
- On/Off
- Voltage - Load:
- 2.7V ~ 5.5V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 1A
- Rds On (Typ):
- 70mOhm
- Input Type:
- Non-Inverting
- Features:
- Status Flag
- Fault Protection:
- Current Limiting (Fixed), Over Temperature, UVLO
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-HVSSOP
TPS2066DGN FAQ
1.How can I place an order for TPS2066DGN through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS2066DGN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS2066DGN reliable?
The price and inventory of TPS2066DGN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS2066DGN is usually 5 days.
3.What payment methods are accepted for TPS2066DGN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS2066DGN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS2066DGN?
TPS2066DGN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS2066DGN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS2066DGN?
For technical support, including TPS2066DGN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS2066DGN requirements.
6.How does Aetrix verify that TPS2066DGN is sourced from the original manufacturer or authorized distributors?
All TPS2066DGN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS2066DGN meets industry standards.
7.What is the process for return or replacement of TPS2066DGN?
All TPS2066DGN units undergo pre-shipment inspection (PSI). If there is an issue with TPS2066DGN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS2066DGN part is unused and in its original packaging.
Return procedure for TPS2066DGN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS2066DGN Tags

-
TPS22919DCKR
Texas Instruments

-
MIC2091-1YM5-TR
Microchip Technology

-
MIC2090-1YM5-TR
Microchip Technology

-
TPS22995RZFR
Texas Instruments

-
TPS22975DSGR
Texas Instruments

-
SIP32510DT-T1-GE3
Vishay Siliconix

-
ULN2003D1013TR
STMicroelectronics

-
MIC2005A-1YM5-TR
Microchip Technology

-
MIC2005A-1YM6-TR
Microchip Technology

-
TPS22916BYFPR
Texas Instruments

-
TPS22917DBVR
Texas Instruments
-
ULN2003APWR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

