Texas Instruments TPS2075DB
- Part No.:
- TPS2075DB
- Manufacturer:
- Texas Instruments
- Package:
- 24-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
TPS2075DB.pdf
- Description:
- IC PWR SWITCH N-CHAN 1:4 24SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:174
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS2075DB from Texas Instruments is a four-port USB hub power controller IC with independent high-side N-channel MOSFET switches, integrated 3.3-V/100-mA LDO regulator, and bus/self-power mode auto-switching logic. It delivers 500 mA per port in self-powered mode (SP→OUTx) and 100 mA per port in bus-powered mode (BP→OUTx), supports USB 1.1/2.0 compliance, and operates across –40°C to 85°C ambient temperature.
For engineers reviewing the TPS2075DB datasheet, TPS2075DB pinout, TPS2075DB application, or TPS2075DB equivalent, key selection considerations include BPMODE polarity (active-high for TPS2075), PG_DLY-adjustable power-good timing, DP0_RST hub reset signaling, thermal/short-circuit protection per channel, and dual-supply enable logic compatible with TTL/CMOS levels.
Technical Context
The TPS2075DB implements two independent power switch domains: SP-to-OUTx paths use 100-mΩ MOSFETs rated for 500 mA continuous current, while BP-to-OUTx paths use 500-mΩ MOSFETs rated for 100 mA - both with no parasitic body diodes to prevent backfeed. Its control logic monitors BP and SP voltages against UVLO thresholds (BP start: 4.25 V, SP start: 4.5 V) and enables automatic switchover unless disabled via BP_DIS.
It integrates a 3.3-V LDO (3.2–3.4 V output, 100-mA max, 0.6-V dropout) with PG and PG_DLY pins for programmable delay (e.g., 0.47 µF → 190 ms), plus dedicated OCx outputs (active-low, 3.2-mA sink) per port and BPMODE output signaling bus-powered mode with active-high polarity - distinct from the TPS2074's active-low BPMODE.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating voltage range | 4.5 V to 5.5 V on BP input; SP input supports 0–5.5 V - enables flexible self-powered supply integration. |
| Output current capability | 500 mA per port (SP→OUTx); 100 mA per port (BP→OUTx) - meets USB 2.0 downstream port requirements in respective modes. |
| rDS(on) (SP switch) | 100 mΩ at TA = 25°C - minimizes conduction loss and heat rise during 500-mA operation. |
| rDS(on) (BP switch) | 500 mΩ at TA = 25°C - optimized for lower-current bus-powered operation with controlled inrush. |
| 3.3-V LDO output | 3.3 V ±0.1 V, 100 mA max - powers USB hub controllers directly without external regulation. |
| Thermal shutdown | Triggers at TJ ≥140°C (first stage), with 15°C hysteresis - protects against sustained overload or poor PCB thermal design. |
| PG_DLY timing | Adjustable delay (e.g., 190 ms with 0.47 µF) - ensures stable 3.3V_OUT before asserting PG and DP0_RST signals. |
Pinout & Package
TPS2075DB is housed in a 24-pin SSOP (DB) package with 0.64-mm pitch, RoHS-compliant, and available taped/reel (TPS2075DBR). Pin functions are validated per TI SLVS288A datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PG_DLY | Timing capacitor node | Connects external capacitor to set PG and DP0_RST pulse width - critical for USB hub controller reset sequencing. |
| EN1–EN4 | Active-low enable inputs | Individually control each port's power switch - enables selective port powering and dynamic power management. |
| AGND / DGND | Analog/digital ground | Separate ground pins reduce noise coupling between analog LDO control and digital OC/BPMODE logic. |
| 3.3V_OUT | LDO output | Supplies regulated 3.3 V to hub controller; requires 4.7–33 µF output capacitor with 0.2–10 Ω ESR. |
| BPMODE | Bus-power status indicator | Active-high output signals bus-powered mode - used by hub controller to configure USB descriptors and power budgeting. |
| DP0_RST | Upstream hub reset signal | Drives DP0 line via 1.5-kΩ resistor to generate clean attach/detach signaling per USB specification. |
| OC1–OC4 | Overcurrent fault indicators | Active-low open-drain outputs per port - interface directly to microcontroller GPIO for real-time fault logging. |
| BP_DIS | Auto-switch disable input | Active-high logic disables SP→BP fallback - required for fixed-mode hubs or safety-critical applications. |
Key Features
| Feature | Design Value |
|---|---|
| Independent SP/BP power domains | Enables hybrid hub designs that seamlessly transition between self- and bus-powered operation without firmware intervention. |
| No parasitic body diodes in MOSFETs | Prevents reverse current flow from OUTx back into BP or SP rails - eliminates need for external blocking diodes. |
| Programmable PG and DP0_RST timing | Single external capacitor (PG_DLY) sets both power-good assertion and hub reset pulse width - simplifies BOM and layout. |
| Dedicated OCx per port | Provides per-port overcurrent detection with latchable or auto-retry behavior - supports robust USB compliance testing and diagnostics. |
| TTL/CMOS-compatible EN inputs | Accepts standard logic-level signals without level-shifting - interoperates directly with MCU GPIO or FPGA I/O banks. |
Applications
| USB Bus-Powered Hub | USB Self-Powered Hub |
|---|---|
Use Scenario: Compact desktop or travel hub drawing power solely from host PC USB port. IC Role / Device Role / Timing Role: TPS2075DB acts as primary power manager, enabling all four downstream ports from VBUS while regulating 3.3 V for hub controller and signaling attach via DP0_RST. Use Value: Delivers full 100 mA per port under USB 2.0 bus-powered limits, with thermal protection preventing host port overcurrent shutdown. | Use Scenario: Industrial docking station with external 5-V supply powering multiple peripherals. IC Role / Device Role / Timing Role: TPS2075DB routes 5-V input to four downstream ports at 500 mA each, supplies 3.3 V to hub controller, and asserts BPMODE high only when bus power is absent. Use Value: Enables full-speed USB peripheral support (e.g., external HDDs, webcams) without host power dependency or voltage drop issues. |
| Hybrid USB Hub with Auto-Switch | USB-C Multiport Adapter |
Use Scenario: Laptop dock that operates from AC adapter but falls back to laptop USB-C port if AC fails. IC Role / Device Role / Timing Role: TPS2075DB monitors SP voltage; upon loss of self-power, it automatically enables BP→OUTx paths and asserts BPMODE to reconfigure hub descriptors. Use Value: Maintains uninterrupted USB connectivity during power source transitions - critical for enterprise and medical devices. | Use Scenario: Portable USB-C adapter supporting HDMI, USB-A, and SD card slots powered via single cable. IC Role / Device Role / Timing Role: TPS2075DB manages power distribution to USB-A ports, provides 3.3 V to embedded USB hub IC, and uses OCx outputs to detect short circuits during hot-plug events. Use Value: Integrates protection, regulation, and signaling in one DB-package IC - reduces board area vs. discrete FET + LDO + logic solutions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar USB hub power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS2074DB | BPMODE is active-low; identical pinout, electrical specs, and functionality otherwise. | Requires inverted logic handling in hub controller firmware for bus-power status reporting. | Select TPS2074DB only when existing firmware expects low-true BPMODE signaling. |
| TPS2064D | Two-port device; no integrated LDO; no DP0_RST or PG_DLY; simpler feature set. | Suitable for cost-sensitive, low-port-count hubs without hub controller regulation needs. | Choose TPS2064D for minimal BOM count where 3.3-V regulation and USB reset signaling are handled externally. |
Compared with TPS2074DB, the TPS2075DB offers identical protection, switching, and regulation but with active-high BPMODE - eliminating firmware inversion. Versus TPS2064D, it adds four-port support, integrated LDO, and USB-compliant reset signaling - making it suitable for full-featured, single-chip hub designs.
Availability
TPS2075DB is available at Aetrix Electronics and suitable for USB hub development, industrial docking stations, and portable multiport adapters requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for TPS2075DB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions with emphasis on reliability, precision, and system-level integration.
The TPS207x family was designed specifically for USB hub power management - integrating high-side switches, LDO regulation, and USB-compliant signaling in a single IC to simplify compliance and reduce bill-of-materials for USB peripheral manufacturers.
FAQ
What is the BPMODE polarity difference between TPS2075DB and TPS2074DB?
The TPS2075DB features an active-high BPMODE output that asserts logic high when operating in bus-powered mode. In contrast, the TPS2074DB uses active-low BPMODE. This polarity difference requires corresponding firmware logic adjustments in the USB hub controller to correctly interpret power-source status - the TPS2075DB eliminates the need for external inversion circuitry or software negation.
Does TPS2075DB require external capacitors, and what are the critical values?
Yes, TPS2075DB requires several external capacitors: a 0.1-µF ceramic + 10-µF bulk capacitor on BP–AGND; 0.1-µF + 68-µF on SP–AGND; 33-µF (min) per OUTx–GND for heavy loads; and 4.7–33 µF on 3.3V_OUT–GND with 0.2–10 Ω ESR. The PG_DLY pin requires a timing capacitor (e.g., 0.47 µF) to set power-good delay - omission causes improper hub controller reset sequencing.
How does TPS2075DB handle overcurrent conditions on individual ports?
TPS2075DB monitors each port independently using internal sense FETs. When overcurrent is detected, it limits output current and pulls the corresponding OCx pin low (open-drain, 3.2-mA sink capability). OCx remains asserted until the fault clears - enabling microcontrollers to log faults per port. No external current-sense resistors are needed, preserving efficiency and board space.
Can TPS2075DB be used in a hub without an integrated 3.3-V regulator?
No - the TPS2075DB includes a mandatory 3.3-V/100-mA LDO regulator whose 3.3V_OUT pin must be used to power the USB hub controller. If a 5-V regulator is required instead, TI recommends the TPS2070 or TPS2071. The TPS2075DB is not functionally compatible with hub designs relying solely on external 3.3-V supplies, as its internal LDO is integral to PG generation and control logic operation.
What is the purpose of the DP0_RST pin on TPS2075DB, and how is it connected?
The DP0_RST pin on TPS2075DB generates a clean USB attach/detach signal on the upstream DP0 data line. It connects through a 1.5-kΩ resistor to the host's DP0 line. During attach, DP0_RST pulses low then goes Hi-Z to discharge cable capacitance, followed by a high state - ensuring proper enumeration. Detachment is signaled by Hi-Z. Its timing is synchronized with PG and adjustable via PG_DLY, making it essential for USB specification compliance.
TPS2075DB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 24-SSOP (0.209", 5.30mm Width)
- Series:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Switch Type:
- USB Switch
- Number of Outputs:
- 4
- Ratio - Input:Output:
- 1:4
- Output Configuration:
- High Side
- Output Type:
- N-Channel
- Interface:
- On/Off
- Voltage - Load:
- 4.5V ~ 5.5V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 100mA
- Rds On (Typ):
- 100mOhm
- Input Type:
- -
- Features:
- Power Good, Status Flag
- Fault Protection:
- Over Temperature
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-SSOP
TPS2075DB FAQ
1.How can I place an order for TPS2075DB through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS2075DB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS2075DB reliable?
The price and inventory of TPS2075DB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS2075DB is usually 5 days.
3.What payment methods are accepted for TPS2075DB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS2075DB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS2075DB?
TPS2075DB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS2075DB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS2075DB?
For technical support, including TPS2075DB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS2075DB requirements.
6.How does Aetrix verify that TPS2075DB is sourced from the original manufacturer or authorized distributors?
All TPS2075DB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS2075DB meets industry standards.
7.What is the process for return or replacement of TPS2075DB?
All TPS2075DB units undergo pre-shipment inspection (PSI). If there is an issue with TPS2075DB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS2075DB part is unused and in its original packaging.
Return procedure for TPS2075DB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS2075DB Tags

-
TPS22919DCKR
Texas Instruments

-
MIC2091-1YM5-TR
Microchip Technology

-
MIC2090-1YM5-TR
Microchip Technology

-
TPS22995RZFR
Texas Instruments

-
TPS22975DSGR
Texas Instruments

-
SIP32510DT-T1-GE3
Vishay Siliconix

-
ULN2003D1013TR
STMicroelectronics

-
MIC2005A-1YM5-TR
Microchip Technology

-
MIC2005A-1YM6-TR
Microchip Technology

-
TPS22916BYFPR
Texas Instruments

-
TPS22917DBVR
Texas Instruments
-
ULN2003APWR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

