Texas Instruments TPS2075DBR
- Part No.:
- TPS2075DBR
- Manufacturer:
- Texas Instruments
- Package:
- 24-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
TPS2075DBR.pdf
- Description:
- IC PWR SWITCH N-CHAN 1:4 24SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,813
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS2075DBR from Texas Instruments is a four-port USB hub power controller integrating independent high-side N-channel MOSFET power switches (100 mA bus-powered / 500 mA self-powered per port), a 3.3-V/100-mA LDO regulator, and DP0_RST hub reset signaling. It supports USB 1.1/2.0 compliance in bus-powered, self-powered, and hybrid hub architectures.
For engineers reviewing the TPS2075DBR datasheet, TPS2075DBR pinout, TPS2075DBR application, or TPS2075DBR equivalent, key selection considerations include BPMODE polarity (active-high for bus-powered indication), BP_DIS-controlled autoswitching disable, PG_DLY-adjustable power-good timing, and dual-mode overcurrent protection with OCx logic outputs.
Technical Context
The TPS2075DBR implements two independent power-switching paths: BP-to-OUTx (500 mΩ rDS(on) at 100 mA) for bus-powered operation and SP-to-OUTx (100 mΩ rDS(on) at 500 mA) for self-powered mode, both with thermal and short-circuit protection. Its internal 3.3-V LDO supplies up to 100 mA with 0.6-V dropout and 40-dB PSRR at 1 kHz.
Control logic enables automatic switchover from self- to bus-powered mode when SP drops below 4.0 V (UVLO stop threshold), unless disabled via BP_DIS. BPMODE output asserts high during bus-powered operation, while DP0_RST provides synchronized upstream hub reset with adjustable pulse width via PG_DLY capacitor.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating voltage range | 4.5 V to 5.5 V on BP input; supports USB VBUS tolerance |
| Output current per port | 100 mA (bus-powered mode) or 500 mA (self-powered mode), internally current-limited |
| rDS(on) - BP switch | 500 mΩ max at 100 mA, 70°C - ensures <50 mV drop under full bus-power load |
| rDS(on) - SP switch | 100 mΩ max at 500 mA, 25°C - enables low-loss 5-V distribution to downstream ports |
| 3.3-V LDO output | 3.2–3.4 V at 5–100 mA load; powers USB hub controllers without external regulator |
| PG_DLY timing control | Capacitor-adjustable delay (e.g., 190 ms with 0.47 µF); synchronizes PG and DP0_RST assertion |
| Overcurrent response | 1–10 ms delay; OCx outputs assert low to signal fault condition per port |
Pinout & Package
TPS2075DBR is housed in a 24-pin SSOP (DB) package with 0.65-mm pitch, tape-and-reel format (R suffix). Pin functions are validated per SLVS288A Rev FEBRUARY 2001.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PG_DLY | Timing capacitor node | Connects external capacitor to set PG and DP0_RST delay; reference voltage = 1.22 V |
| EN1–EN4 | Active-low enable inputs | Individually control each port's power switch; TTL/CMOS compatible |
| AGND / DGND | Analog & digital ground | Separate ground pins minimize noise coupling between LDO and switching logic |
| 3.3V_OUT | LDO output | Supplies regulated 3.3 V to hub controller; requires 4.7–33 µF output capacitor |
| BPMODE | Bus-power status indicator | Active-high output signals bus-powered mode (distinct from TPS2074's active-low) |
| DP0_RST | Upstream hub reset driver | Drives DP0 line via 1.5-kΩ resistor; low→Hi-Z→high sequence ensures clean attach/detach |
| OC1–OC4 | Per-port overcurrent flags | Open-drain, active-low outputs; asserted within 10 ms of fault detection |
| BP / SP | Power inputs | BP = VBUS source; SP = local 5-V supply; both monitored for UVLO (BP: 3.75–4.25 V) |
| BP_DIS | Autoswitch disable | Active-high input; when high, prevents fallback to bus power if SP fails |
| OUT1–OUT4 | Switched 5-V outputs | High-side N-MOS outputs; no parasitic diodes prevent backfeed into BP/SP |
Key Features
| Feature | Design Value |
|---|---|
| Independent bus/self-power switching | Enables hybrid hub designs with seamless failover: SP loss triggers automatic BP takeover unless BP_DIS is asserted |
| Integrated 3.3-V/100-mA LDO | Eliminates need for external regulator; supports hub controller ICs requiring stable 3.3 V rail |
| DP0_RST synchronized reset | Provides controlled upstream DP0 discharge and reassertion, meeting USB attach/detach timing requirements |
| Thermal + short-circuit protection | Dual-level thermal shutdown (140°C/150°C) plus per-port current limiting prevents damage during sustained overload |
| Adjustable power-good timing | PG_DLY pin allows precise tuning of PG and DP0_RST delays to match hub controller reset specifications |
Applications
| USB Bus-Powered Hub | USB Self-Powered Hub |
|---|---|
Use Scenario: Compact desktop or travel hub drawing power solely from host USB port. IC Role / Device Role / Timing Role: TPS2075DBR acts as primary power distributor and supervisor, enabling four downstream ports from 500 mA total VBUS budget. Use Value: Delivers guaranteed 100 mA/port with overcurrent protection and PG signaling - compliant with USB 2.0 bus-powered hub requirements. | Use Scenario: Industrial docking station with external 5-V supply powering multiple peripherals. IC Role / Device Role / Timing Role: TPS2075DBR routes 5 V from local supply to all four ports, while monitoring SP voltage and asserting BPMODE low to indicate self-powered state. Use Value: Enables 500 mA/port delivery with 100 mΩ rDS(on), minimizing voltage drop and heat generation in high-current applications. |
| Hybrid USB Hub | USB-C Multiport Adapter |
Use Scenario: Laptop dock supporting both bus-powered accessories and self-powered displays. IC Role / Device Role / Timing Role: TPS2075DBR manages dual-input sourcing (BP and SP), automatically switching to VBUS if external supply fails - signaled via BPMODE transition. Use Value: Ensures uninterrupted downstream port operation during power source transitions without host intervention or firmware changes. | Use Scenario: Portable adapter converting USB-C PD input to legacy USB-A ports. IC Role / Device Role / Timing Role: TPS2075DBR conditions and distributes 5 V from USB-C PD contract to four USB-A ports, using DP0_RST to coordinate upstream enumeration after power-up. Use Value: Integrates power sequencing, reset signaling, and fault reporting in single IC - reducing BOM count and PCB area vs discrete solutions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar USB hub power control applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS2074DBR | BPMODE is active-low (vs TPS2075DBR's active-high); identical pinout, electrical specs, and functionality otherwise | Requires inverted logic handling in hub controller firmware for bus-power detection | Select TPS2074DBR only if existing design uses active-low BPMODE signaling or firmware cannot accommodate polarity change |
| TPS2064D | Two-port controller; no integrated 3.3-V LDO; lacks DP0_RST and BPMODE signals | Suitable only for simpler hubs without upstream reset or hub controller bias requirements | Choose TPS2064D for cost-sensitive, low-port-count designs where external 3.3-V regulation and manual reset are acceptable |
Compared with TPS2074DBR and TPS2064D, the TPS2075DBR uniquely combines four-port switching, active-high BPMODE, integrated 3.3-V LDO, and DP0_RST - making it optimal for full-featured, standards-compliant USB 2.0 hubs requiring minimal external components and robust power management.
Availability
TPS2075DBR is available at Aetrix Electronics and suitable for USB hub designs, industrial docking stations, and portable multiport adapters requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for TPS2075DBR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and communications markets.
The TPS207x family was designed specifically for USB hub power management - integrating switching, regulation, and signaling functions to simplify compliance with USB 1.1/2.0 power delivery and enumeration requirements.
FAQ
What is the key functional difference between TPS2075DBR and TPS2074DBR?
The TPS2075DBR features an active-high BPMODE output to indicate bus-powered operation, whereas the TPS2074DBR uses active-low BPMODE. All other electrical characteristics, pinout, package, and functional blocks - including the 3.3-V LDO, DP0_RST, OCx outputs, and dual-mode power switching - are identical between the two devices. This polarity difference requires corresponding logic inversion in the hub controller's BPMODE interpretation.
Does TPS2075DBR require external capacitors, and what values are recommended?
Yes, TPS2075DBR requires several external capacitors: a 0.1-µF ceramic + 10-µF bulk capacitor on BP–AGND; 0.1-µF + 68-µF on SP–AGND; ≥33-µF on each OUTx–GND for heavy loads; and 4.7–33-µF on 3.3V_OUT–GND with 0.2–10-Ω ESR. The PG_DLY pin needs a capacitor (e.g., 0.47 µF) to set power-good timing. These values are specified in SLVS288A Section 32.
How does the BP_DIS pin affect TPS2075DBR operation?
The BP_DIS pin disables automatic switchover from self-powered to bus-powered mode. When BP_DIS is pulled high, the TPS2075DBR remains in self-powered operation even if SP falls below the 4.0-V UVLO stop threshold. This prevents unintended fallback to VBUS during transient SP dips. When BP_DIS is low or grounded, autoswitching operates normally - critical for fail-safe hub operation.
Can TPS2075DBR be used in USB 3.0 hub designs?
No, the TPS2075DBR is specified and tested only for USB 1.1 and USB 2.0 compliance. Its 3.3-V LDO, switching timing, and overcurrent response parameters meet USB 2.0 power delivery and enumeration requirements but lack validation for USB 3.0's higher current demands (up to 900 mA per port), faster signaling, or SuperSpeed lane power sequencing. Use TI's TPS6598x or equivalent for USB 3.x applications.
What thermal protection mechanisms does TPS2075DBR implement?
The TPS2075DBR incorporates dual-threshold thermal shutdown: first-stage activation at 140°C and second-stage at 150°C, with hysteresis of 15°C and 25°C respectively. It also includes per-port overcurrent protection that limits output current and asserts OCx within 1–10 ms. These protections operate independently of enable states and remain active even when ENx inputs are deasserted, ensuring robust fault containment across all operating modes.
TPS2075DBR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 24-SSOP (0.209", 5.30mm Width)
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Type:
- USB Switch
- Number of Outputs:
- 4
- Ratio - Input:Output:
- 1:4
- Output Configuration:
- High Side
- Output Type:
- N-Channel
- Interface:
- On/Off
- Voltage - Load:
- 4.5V ~ 5.5V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 100mA
- Rds On (Typ):
- 100mOhm
- Input Type:
- -
- Features:
- Power Good, Status Flag
- Fault Protection:
- Over Temperature
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-SSOP
TPS2075DBR FAQ
1.How can I place an order for TPS2075DBR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS2075DBR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS2075DBR reliable?
The price and inventory of TPS2075DBR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS2075DBR is usually 5 days.
3.What payment methods are accepted for TPS2075DBR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS2075DBR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS2075DBR?
TPS2075DBR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS2075DBR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS2075DBR?
For technical support, including TPS2075DBR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS2075DBR requirements.
6.How does Aetrix verify that TPS2075DBR is sourced from the original manufacturer or authorized distributors?
All TPS2075DBR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS2075DBR meets industry standards.
7.What is the process for return or replacement of TPS2075DBR?
All TPS2075DBR units undergo pre-shipment inspection (PSI). If there is an issue with TPS2075DBR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS2075DBR part is unused and in its original packaging.
Return procedure for TPS2075DBR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS2075DBR Tags

-
TPS22919DCKR
Texas Instruments

-
MIC2091-1YM5-TR
Microchip Technology

-
MIC2090-1YM5-TR
Microchip Technology

-
TPS22995RZFR
Texas Instruments

-
TPS22975DSGR
Texas Instruments

-
SIP32510DT-T1-GE3
Vishay Siliconix

-
ULN2003D1013TR
STMicroelectronics

-
MIC2005A-1YM5-TR
Microchip Technology

-
MIC2005A-1YM6-TR
Microchip Technology

-
TPS22916BYFPR
Texas Instruments

-
TPS22917DBVR
Texas Instruments
-
ULN2003APWR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

