Texas Instruments TPS2096D
- Part No.:
- TPS2096D
- Manufacturer:
- Texas Instruments
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TPS2096D.pdf
- Description:
- IC PWR SWITCH N-CHAN 1:1 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,007
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS2096D from Texas Instruments is a quad-channel high-side power-distribution switch featuring four independent 80-mΩ N-channel MOSFETs, 250 mA continuous current per channel, undervoltage lockout (2 V threshold), and integrated thermal/short-circuit protection with open-drain OC outputs-designed for hot-plug USB peripherals and modular embedded systems requiring controlled inrush current and fault isolation.
For engineers reviewing the TPS2096D datasheet, TPS2096D pinout, TPS2096D application, or TPS2096D equivalent, key selection criteria include per-channel enable polarity (active-low for all four inputs), SOIC-16 package footprint, 2.7–5.5 V input range, 2.5-ms typical rise time, and dual thermal trip architecture enabling independent channel shutdown during overtemperature events.
Technical Context
The TPS2096D integrates four independent high-side switches, each driven by an internal charge pump that operates down to 2.7 V and eliminates external components while controlling gate voltage slew to limit EMI. Each channel features dedicated enable logic (EN1–EN4, all active-low) and shares two overcurrent indicators: OCA for channels 1–2 and OCB for channels 3–4.
Its protection architecture includes current-limiting (0.5 A short-circuit trip), thermal shutdown at ~140°C with ~20°C hysteresis, and undervoltage lockout below ~2 V. The device implements dual thermal trip logic-shutting down only the faulted channel at 140°C and both channels of a pair at 160°C-preserving partial functionality during localized faults.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Channels | Quad independent high-side power switches |
| rDS(on) max | 135 mΩ at 5 V IN, 125°C - limits conduction loss and self-heating under full load |
| Continuous current | 250 mA per channel - supports USB-compliant downstream ports and low-power peripheral rails |
| Input voltage range | 2.7 V to 5.5 V - compatible with 3.3 V and 5 V system rails without level-shifting |
| Rise time | 2.5 ms typical (5.5 V, 1 μF load) - controls inrush, reduces EMI, enables safe hot-plug insertion |
| Enable polarity | All four EN inputs active-low - simplifies direct interface with microcontroller GPIOs asserting low to enable |
| Overcurrent signaling | OCA (channels 1–2) and OCB (channels 3–4) open-drain outputs - allow shared interrupt lines with pull-up resistors |
Pinout & Package
TPS2096D is housed in a 16-pin SOIC (D) package with 1.27 mm pitch, JEDEC MS-012AC compliant, rated for 0°C to 85°C ambient operation and RoHS-compliant NIPDAU lead finish (MSL Level-1).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1–EN4 | Active-low enable inputs | Each independently controls one high-side switch; low = ON, high = OFF with <10 μA standby draw |
| IN1–IN4 | Power input terminals | Drain connections of internal N-MOSFETs; accept 2.7–5.5 V supply for respective output channels |
| OUT1–OUT4 | Switched power outputs | Source connections delivering controlled, current-limited power to downstream loads |
| GNDA, GNDB | Separate ground returns | GNDA serves IN1/IN2/OUT1/OUT2 circuitry; GNDB serves IN3/IN4/OUT3/OUT4 - reduces ground coupling between channel pairs |
| OCA, OCB | Open-drain fault indicators | OCA asserts low on overcurrent/overtemperature in channels 1 or 2; OCB for channels 3 or 4 - supports shared interrupt routing |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional switching capability | Prevents reverse current flow from OUT to IN when disabled - protects upstream supplies during hot-swap or backfeed scenarios |
| Integrated charge pump | Enables full MOSFET enhancement from 2.7 V input without external capacitors - ensures reliable turn-on across entire operating range |
| Dual thermal trip architecture | Shuts down only the faulted channel at 140°C; both channels in a pair at 160°C - maximizes system uptime during partial faults |
| Internal current-sense FET | Replaces lossy sense resistors - maintains low rDS(on) while enabling accurate, temperature-stable current limiting at 0.5 A |
| Undervoltage lockout | Disables all switches below ~2 V input - prevents erratic behavior during brownout or power ramp-up, ensuring clean startup |
Applications
| USB Peripheral Power Management | Hot-Pluggable Module Supply |
|---|---|
|
Use Scenario: Powering USB hubs, card readers, or HID devices from a shared 5 V rail with individual port control and fault containment. IC Role / Device Role / Timing Role: Quad high-side switch providing independent enable, current limiting, and per-port OC reporting via OCA/OCA. Use Value: Prevents bus-wide shutdown during single-port short circuits and eliminates need for discrete polyfuses or resettable fuses. |
Use Scenario: Inserting/removing daughterboards or I/O modules into powered backplanes without disrupting main system operation. IC Role / Device Role / Timing Role: Controlled power ramp generator with 2.5-ms rise time and UVLO-enforced safe startup sequence. Use Value: Limits inrush current to <1 A peak, suppresses EMI, and avoids voltage droop on shared supply rails during insertion. |
| Industrial Control I/O Protection | Embedded System Rail Sequencing |
|
Use Scenario: Isolating sensor, actuator, or communication interface rails in PLCs or motor drives where field wiring faults are common. IC Role / Device Role / Timing Role: Fault-tolerant power switch with thermal and overcurrent protection plus open-drain OC feedback to controller. Use Value: Enables automatic fault logging and recovery without manual fuse replacement or system reboot after transient shorts. |
Use Scenario: Staged power-up of multiple subsystems (e.g., MCU core, memory, peripherals) using independent enable signals. IC Role / Device Role / Timing Role: Four individually controllable power gates with precise timing via MCU-driven EN pins. Use Value: Eliminates need for discrete MOSFETs, gate drivers, and timing RC networks - reduces BOM count and layout area. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad high-side power switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS2056D | Lower 110-mΩ rDS(on), but only 120 mA per channel and no OCB/OCA split - single OC output for all channels | Limited to lower-current applications; lacks independent fault reporting per channel pair | Choose when cost sensitivity outweighs need for per-pair fault visibility and higher current capability |
| TPS22965DCKR | Single-channel, 3.6-A rated, 20-mΩ switch in SC-70 - no thermal trip, no OC output, no UVLO | Requires four separate ICs and external logic for quad control - no integrated fault management | Use only when ultra-low rDS(on) and minimal footprint are critical, and system-level fault handling is implemented externally |
Compared with TPS2096D, TPS2056D offers lower conduction loss but reduced current rating and coarser fault reporting, while TPS22965DCKR provides superior per-channel performance at the cost of quadrupled component count and zero integrated protection-making TPS2096D optimal for compact, fault-resilient quad-rail designs.
Availability
TPS2096D is available at Aetrix Electronics and suitable for USB peripheral power management, hot-pluggable module supply, and industrial I/O protection requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for TPS2096D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in power management IC design and manufacturing.
The TPS209x family was developed specifically for robust, low-EMI hot-plug power distribution in computing, industrial, and communications equipment-emphasizing fault resilience, ease of integration, and predictable current limiting without external components.
FAQ
What is the enable input logic polarity for TPS2096D?
The TPS2096D uses active-low enable inputs: EN1 through EN4 must be pulled low to turn on their respective high-side switches. When any EN pin is high, its channel remains off with <10 μA supply current. This polarity allows direct connection to microcontroller GPIOs configured as open-drain or push-pull outputs without inversion logic.
Does TPS2096D support bidirectional current flow?
Yes, TPS2096D supports bidirectional current flow in the sense that it blocks reverse current from OUT to IN when disabled, preventing backfeeding into the source rail. However, it is not a true bidirectional switch like a transmission gate-it conducts only from IN to OUT when enabled, with body diode conduction blocked by the high-side topology.
How does the thermal protection work in TPS2096D?
TPS2096D implements dual thermal trip logic: at ~140°C junction temperature, only the faulted channel shuts down; if temperature rises further to ~160°C, both channels sharing a thermal domain (1–2 or 3–4) shut off. Recovery occurs automatically after cooling ~20°C, enabling fault containment without full system reset.
What is the purpose of separate GNDA and GNDB pins on TPS2096D?
GNDA and GNDB provide isolated ground return paths for the two channel pairs (1–2 and 3–4). This separation minimizes ground coupling noise and prevents fault currents in one pair from affecting voltage reference integrity or OC detection accuracy in the other pair-critical for mixed-signal or noise-sensitive applications.
Can TPS2096D be used with a 3.3 V supply?
Yes, TPS2096D operates fully across 2.7 V to 5.5 V, including standard 3.3 V rails. Its internal charge pump ensures proper gate drive at 3.3 V, and all specifications-including 250 mA per channel, 80-mΩ rDS(on), and 2.5-ms rise time-are guaranteed at this voltage. Enable inputs remain TTL/CMOS-compatible within this range.
TPS2096D Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Switch Type:
- General Purpose
- Number of Outputs:
- 4
- Ratio - Input:Output:
- 1:1
- Output Configuration:
- High Side
- Output Type:
- N-Channel
- Interface:
- On/Off
- Voltage - Load:
- 2.7V ~ 5.5V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 250mA
- Rds On (Typ):
- 80mOhm
- Input Type:
- Non-Inverting
- Features:
- Status Flag
- Fault Protection:
- Current Limiting (Fixed), Over Temperature, UVLO
- Operating Temperature:
- 0°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
TPS2096D FAQ
1.How can I place an order for TPS2096D through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS2096D on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS2096D reliable?
The price and inventory of TPS2096D are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS2096D is usually 5 days.
3.What payment methods are accepted for TPS2096D?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS2096D transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS2096D?
TPS2096D orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS2096D order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS2096D?
For technical support, including TPS2096D datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS2096D requirements.
6.How does Aetrix verify that TPS2096D is sourced from the original manufacturer or authorized distributors?
All TPS2096D products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS2096D meets industry standards.
7.What is the process for return or replacement of TPS2096D?
All TPS2096D units undergo pre-shipment inspection (PSI). If there is an issue with TPS2096D, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS2096D part is unused and in its original packaging.
Return procedure for TPS2096D:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS2096D Tags

-
TPS22919DCKR
Texas Instruments

-
MIC2091-1YM5-TR
Microchip Technology

-
MIC2090-1YM5-TR
Microchip Technology

-
TPS22995RZFR
Texas Instruments

-
TPS22975DSGR
Texas Instruments

-
SIP32510DT-T1-GE3
Vishay Siliconix

-
ULN2003D1013TR
STMicroelectronics

-
MIC2005A-1YM5-TR
Microchip Technology

-
MIC2005A-1YM6-TR
Microchip Technology

-
TPS22916BYFPR
Texas Instruments

-
TPS22917DBVR
Texas Instruments
-
ULN2003APWR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
