Texas Instruments TPS22949ADRGR
- Part No.:
- TPS22949ADRGR
- Manufacturer:
- Texas Instruments
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
TPS22949ADRGR.pdf
- Description:
- IC PWR SWITCH P-CHAN 1:1 8SON
- Quantity:
- Payment:

- Shipping:

Inventory:1,624
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Product details
Overview
TPS22949ADRGR from Texas Instruments is a dual-function current-limited load switch with integrated low-noise 1.8-V RF LDO regulator. It features a P-channel MOSFET switch (rON = 350 mΩ at 3.3 V), 100-mA minimum current limit, 50 μVrms output noise (10 Hz–100 kHz), and fast 130-μs LDO start-up - used for protecting fingerprint modules and powering noise-sensitive RF subsystems in smartphones.
For engineers reviewing the TPS22949ADRGR datasheet, TPS22949ADRGR pinout, TPS22949ADRGR application, or TPS22949ADRGR equivalent, key selection criteria include its dual enable control (EN1/EN2), OC fault flag behavior, thermal shutdown thresholds (120°C return), and WSON-8 package compatibility with high-density portable PCB layouts.
Technical Context
The TPS22949ADRGR integrates two independent power paths: a current-limited switch (VIN → VOUTCL) with auto-restart disabled and an LDO regulator (VOUTCL → VOUTLDO) fixed at 1.8 V. Its EN1 controls only the switch; EN2 independently enables the LDO. The OC pin reports overcurrent, UVLO, or overtemperature via open-drain logic-low assertion.
It operates across VIN = 1.62–4.5 V and V+ = 2.6–5.5 V, with undervoltage lockout on both rails (UVLO-CL = 1.49 V typical, UVLO-V+ = 2.45 V typical). Thermal protection triggers at 135°C junction temperature and resets at 120°C with 10°C hysteresis - confirmed for TPS22949A variant per datasheet Section 7.5.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input voltage range (VIN) | 1.62 V to 4.5 V - supports Li-ion battery discharge down to 1.62 V while maintaining switch regulation. |
| ON-resistance (rON) | 350 mΩ at VIN = 3.3 V - limits conduction loss to ≤35 mV drop at 100 mA, enabling efficient low-voltage rail switching. |
| LDO output voltage | 1.8 V ±2% - factory-trimmed precision output stable across –40°C to 85°C, suitable for RF IC biasing. |
| Output noise (LDO) | 50 μVrms (10 Hz–100 kHz) - ultra-low spectral density critical for sensitive receivers and PLLs. |
| Current limit threshold | 100 mA minimum - hard-clamps fault current to protect downstream circuitry without external components. |
| Start-up time (LDO) | 130 μs - ensures rapid power delivery to timing-critical peripherals during wake-up sequences. |
| PSRR (LDO, 10 kHz) | 80 dB - suppresses supply ripple from noisy system rails, preserving signal integrity in mixed-signal blocks. |
Pinout & Package
TPS22949ADRGR uses an 8-pin WSON (DRG) package measuring 3.0 mm × 3.0 mm with 0.5-mm pitch. The exposed thermal pad on the underside must be connected to GND for optimal thermal performance (RθJB = 25.9°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN1 | Switch enable input | Active-high control for current limiter path only; logic threshold compatible with 1.8-V I/O systems. |
| EN2 | LDO enable input | Independent active-high control for 1.8-V LDO; allows staged power sequencing (e.g., switch first, then LDO). |
| GND | Ground reference | Common return for switch, LDO, and logic; ties to exposed thermal pad for thermal management. |
| OC | Fault flag output | Open-drain output pulled low during overcurrent, UVLO, or overtemperature; requires external pull-up to VIN. |
| V+ | LDO bias supply | Separate 2.6–5.5 V bias rail powers internal LDO circuitry - decoupled from VIN to improve PSRR. |
| VIN | Switch input | Primary input to current-limited P-MOSFET; bypassed with ≥1-μF ceramic capacitor for transient stability. |
| VOUTCL | Switch output | Current-limited output feeding LDO input; must be routed with low-inductance trace to minimize ringing. |
| VOUTLDO | LDO regulated output | Stable 1.8-V output capable of 100 mA; stable with 2.2-μF ceramic capacitor and exhibits 110-mV dropout at full load. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent enables | EN1 and EN2 allow separate control of switch and LDO - enabling flexible power sequencing in multi-rail systems. |
| Integrated fault blanking | 6–18 ms overcurrent blanking window prevents false triggering during inrush or transient load spikes. |
| Low-noise RF LDO | 50 μVrms noise + 80-dB PSRR at 10 kHz - meets stringent requirements for RF front-end and clock distribution circuits. |
| Thermal shutdown with hysteresis | Shuts down at 135°C and auto-restarts at 120°C - protects against sustained overload without manual reset. |
| ESD robustness | ±3500 V HBM / ±1000 V CDM - qualified for handling in standard manufacturing environments without special precautions. |
Applications
| Fingerprint Module Protection | Smartphone RF Subsystem Power |
|---|---|
Use Scenario: Powering capacitive fingerprint sensors during biometric authentication sequences with strict EMI and noise budgets. IC Role / Device Role / Timing Role: Current-limited switch isolates sensor from main battery; LDO supplies ultra-clean 1.8-V bias to analog front-end and ADC. Use Value: Prevents sensor damage from accidental shorts while ensuring <50 μVrms noise floor required for high-SNR image capture. |
Use Scenario: Delivering regulated 1.8-V power to LTE/Wi-Fi transceivers and RF switches in compact smartphone designs. IC Role / Device Role / Timing Role: Dual-path device provides sequenced enable (switch → LDO) and real-time OC fault reporting to baseband processor. Use Value: Maintains 80-dB PSRR under dynamic RF load modulation, eliminating need for discrete filtering and saving board space. |
| Notebook USB-C Peripheral Port | Access Control System Sensor Interface |
Use Scenario: Managing power to USB-C alternate mode accessories (e.g., DisplayPort sink) with hot-plug current limiting. IC Role / Device Role / Timing Role: Switch handles up to 4.5-V input from USB PD contract; LDO powers interface logic and level shifters. Use Value: 100-mA current limit prevents bus overcurrent faults during plug-in transients; 130-μs start-up meets USB enumeration timing. |
Use Scenario: Supplying secure biometric readers (e.g., facial recognition IR illuminators) in enterprise access panels. IC Role / Device Role / Timing Role: Provides isolated, fault-protected 1.8-V rail with OC signaling to microcontroller for tamper detection. Use Value: Integrated UVLO and thermal shutdown ensure reliable operation in unventilated enclosures across –40°C to 85°C ambient. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar current-limited load switch with integrated LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS22948ADRGR | Single-enable version (EN only); no EN2 control; LDO always enabled when switch is on; 1.2-A current limit. | Lacks independent LDO sequencing; unsuitable where staged power-up or LDO-only operation is required. | Select when simplified control and higher current capability are prioritized over dual-enable flexibility. |
| TPS22965YFPR | Single-path load switch only (no LDO); 4.5-V max VIN; 20-mΩ rON; 4-A current limit; WSON-6 package. | No integrated regulation - requires external LDO for noise-sensitive loads; larger footprint than TPS22949ADRGR's 3×3 mm. | Select when high-current switching dominates design needs and LDO functionality is implemented separately. |
Compared with TPS22948ADRGR and TPS22965YFPR, the TPS22949ADRGR uniquely delivers independent switch/LDO control in a space-constrained 3×3 mm WSON package - essential for portable devices requiring both protection and ultra-low-noise regulation in one die.
Availability
TPS22949ADRGR is available at Aetrix Electronics and suitable for fingerprint module protection, smartphone RF subsystems, notebook USB-C ports, and access control system sensor interfaces requiring stable component supply and guaranteed long-term manufacturability.
Supply support for TPS22949ADRGR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog and embedded processing solutions for industrial, automotive, and personal electronics markets.
The TPS22949ADRGR belongs to TI's load switch and power management portfolio, designed specifically for portable and battery-powered systems needing integrated protection, sequencing, and low-noise regulation in minimal footprint.
FAQ
What is the function of EN1 and EN2 on the TPS22949ADRGR?
EN1 controls only the current-limited switch path (VIN → VOUTCL), while EN2 independently enables the 1.8-V LDO (VOUTCL → VOUTLDO). This allows precise power sequencing - for example, enabling the switch first to charge intermediate capacitance, then asserting EN2 to activate clean LDO output. Both inputs are active-high and 1.8-V compatible, per datasheet Table 1 and Section 8.4.
Does the TPS22949ADRGR require external capacitors for stability?
Yes: a ≥1-μF ceramic capacitor is recommended between VIN and GND for transient suppression, and a 0.1-μF capacitor (CCL) is mandatory between VOUTCL and GND to prevent negative voltage spikes during switch turn-off. The LDO output (VOUTLDO) is stable with a 2.2-μF ceramic capacitor, as verified in Section 7.7 and Figure 12 of the datasheet.
How does the OC pin behave during fault conditions on the TPS22949ADRGR?
The OC pin is an open-drain output that pulls low during overcurrent, VIN undervoltage (below 1.49 V), or junction overtemperature (≥135°C). It remains asserted for the duration of the fault and releases only after the condition clears and the device exits shutdown - confirmed by functional block diagram Figure 42 and Section 8.3.2. An external pull-up resistor to VIN is required.
What is the maximum continuous output current for the LDO section of the TPS22949ADRGR?
The LDO section of the TPS22949ADRGR delivers up to 100 mA continuously at 1.8 V with ≤200 mV dropout (at full load), as specified in Section 7.7 (VDO parameter) and Figure 12. Output voltage remains within ±2% accuracy across line, load, process, and temperature - validated over –40°C to 85°C operating range.
Is the TPS22949ADRGR pin-compatible with other devices in the TPS229xx family?
No - the TPS22949ADRGR uses an 8-pin WSON (DRG) package with unique pinout (e.g., EN2 on Pin 1, V+ on Pin 8) incompatible with 6-pin variants like TPS22965YFPR or 8-pin DSBGA variants like TPS22949YFPR. Pin mapping is defined in Section 6 and Figure 6 of the datasheet; substitution requires PCB layout revision.
TPS22949ADRGR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 8-WFDFN Exposed Pad
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Type:
- General Purpose
- Number of Outputs:
- 2
- Ratio - Input:Output:
- 1:1
- Output Configuration:
- High Side
- Output Type:
- P-Channel
- Interface:
- On/Off
- Voltage - Load:
- 1.62V ~ 4.5V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 100mA
- Rds On (Typ):
- 400mOhm
- Input Type:
- Non-Inverting
- Features:
- Auto Restart, Load Discharge
- Fault Protection:
- Current Limiting (Fixed), Over Temperature
- Operating Temperature:
- -40°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SON (3x3)
TPS22949ADRGR FAQ
1.How can I place an order for TPS22949ADRGR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS22949ADRGR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS22949ADRGR reliable?
The price and inventory of TPS22949ADRGR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS22949ADRGR is usually 5 days.
3.What payment methods are accepted for TPS22949ADRGR?
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4.How is shipping managed for TPS22949ADRGR?
TPS22949ADRGR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS22949ADRGR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS22949ADRGR?
For technical support, including TPS22949ADRGR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS22949ADRGR requirements.
6.How does Aetrix verify that TPS22949ADRGR is sourced from the original manufacturer or authorized distributors?
All TPS22949ADRGR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS22949ADRGR meets industry standards.
7.What is the process for return or replacement of TPS22949ADRGR?
All TPS22949ADRGR units undergo pre-shipment inspection (PSI). If there is an issue with TPS22949ADRGR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS22949ADRGR part is unused and in its original packaging.
Return procedure for TPS22949ADRGR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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