My Inquiry
My Account
Texas Instruments TPS3307-18QDRQ1
- Part No.:
- TPS3307-18QDRQ1
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TPS3307-18QDRQ1.pdf
- Description:
- IC SUPERVISOR 3 CHANNEL 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,442
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS3307-18QDRQ1 from Texas Instruments is an automotive-grade triple voltage supervisor IC for DSP and microprocessor-based systems, monitoring 3.3 V, 1.8 V, and adjustable supply rails with fixed 200 ms power-on reset delay, 40 µA max supply current, and operation from −40°C to 125°C in SO-8 package.
For engineers reviewing the TPS3307-18QDRQ1 datasheet, TPS3307-18QDRQ1 pinout, TPS3307-18QDRQ1 application, or TPS3307-18QDRQ1 equivalent, this page delivers verified specifications, automotive-qualified timing behavior, dual active-high/active-low RESET outputs, and SENSE input threshold values for reliable system initialization in safety-critical embedded designs.
Technical Context
The TPS3307-18QDRQ1 integrates three independent comparators with temperature-compensated 1.25 V reference, enabling simultaneous monitoring of 3.3 V (VIT− = 2.93 V), 1.8 V (VIT− = 1.68 V), and user-defined >1.25 V supplies via resistor-divider on SENSE3. Each input features 2–60 mV hysteresis depending on threshold level.
It implements a deterministic power-on reset sequence: RESET asserts when VDD exceeds 1.1 V, remains active until all SENSE inputs exceed their respective VIT+ thresholds, then delays 200 ms (typ) before deasserting. Manual reset (MR) provides asynchronous override with 100 ns minimum pulse width.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2 V to 6 V - supports wide-input rail monitoring including 3.3 V, 2.5 V, and 1.8 V domains without external regulation. |
| RESET Delay Time | 200 ms (typ) - fixed internal timer ensures sufficient processor core and peripheral stabilization before release; no capacitor required. |
| SENSE1 Threshold | 2.93 V (typ) - factory-trimmed for accurate 3.3 V rail supervision with ±0.09 V tolerance over −40°C to 125°C. |
| SENSE2 Threshold | 1.68 V (typ) - factory-trimmed for precise 1.8 V rail supervision with ±0.05 V tolerance across full temperature range. |
| SENSE3 Threshold | 1.25 V (fixed reference) - enables monitoring of any supply >1.25 V using external resistor divider; threshold accuracy referenced to internal bandgap. |
| Supply Current | 40 µA (max) - ultra-low quiescent current preserves battery life in always-on automotive modules and low-power ECUs. |
| Operating Temperature | −40°C to 125°C - AEC-Q100 qualified for under-hood and transmission control unit environments. |
Pinout & Package
TPS3307-18QDRQ1 is housed in an 8-pin SOIC (D) package with 1.27 mm pitch, 3.91 mm body width, and 1.75 mm max height per JEDEC MS-012AA. Pin 1 identifier located at top-left corner with beveled edge marking.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SENSE1) | Voltage monitor input | Fixed 2.93 V threshold comparator input for 3.3 V rail; connects directly to target supply node. |
| 2 (SENSE2) | Voltage monitor input | Fixed 1.68 V threshold comparator input for 1.8 V rail; requires no external components. |
| 3 (SENSE3) | Adjustable monitor input | Connects to resistor divider for custom supply monitoring (>1.25 V); referenced to internal 1.25 V bandgap. |
| 4 (GND) | Ground reference | Analog and digital ground return; must be low-impedance connection to system GND plane. |
| 5 (VDD) | Power supply input | Primary device supply (2–6 V); powers internal reference, comparators, and RESET logic. |
| 6 (MR) | Manual reset input | Active-low asynchronous reset trigger; pulls RESET low when driven ≤0.3×VDD for ≥100 ns. |
| 7 (RESET) | Active-low reset output | Open-drain output asserted low during fault or reset; requires external pull-up to monitored rail or VDD. |
| 8 (RESET) | Active-high reset output | Push-pull output asserted high during fault or reset; directly interfaces with processors requiring active-high reset. |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent voltage supervision | Simultaneously monitors 3.3 V, 1.8 V, and user-defined supply with dedicated comparators-eliminates need for multiple discrete supervisors. |
| Dual RESET outputs | Provides both active-low (open-drain) and active-high (push-pull) signals-supports legacy and modern processor reset interface requirements without level-shifting. |
| Automotive qualification | AEC-Q100 Grade 1 qualified (−40°C to 125°C) with ESD protection >2 kV HBM and >200 V MM-meets stringent reliability requirements for automotive ECUs. |
| No external timing capacitor | 200 ms power-on reset delay generated by internal oscillator and counter-reduces BOM count, PCB area, and failure modes associated with capacitor aging. |
| Low supply current | 40 µA maximum IDD enables use in always-on domains such as CAN wake-up circuits and battery-backed modules without compromising runtime. |
Applications
| Engine Control Unit (ECU) | Advanced Driver Assistance System (ADAS) Camera Module |
|---|---|
Use Scenario: Real-time engine management requiring synchronized reset of MCU, ADC, and communication peripherals after cold crank. IC Role / Device Role / Timing Role: Triple supervisor ensures all voltage domains (5 V sensor bias, 3.3 V MCU I/O, 1.8 V core) stabilize before releasing RESET to prevent firmware lockup. Use Value: Prevents invalid boot sequences during low-battery cranking events by asserting RESET until all rails exceed their VIT+ thresholds and holding for 200 ms. | Use Scenario: High-resolution image sensor and ISP co-processing in rear-view camera with strict power sequencing. IC Role / Device Role / Timing Role: Monitors 3.3 V analog front-end, 1.8 V ISP core, and 1.2 V sensor digital supply via SENSE3 divider-coordinates multi-rail power-up timing. Use Value: Guarantees clean, glitch-free reset assertion across heterogeneous voltage domains, eliminating image corruption during power transitions. |
| Transmission Control Module (TCM) | Automotive Infotainment Head Unit |
Use Scenario: Gearshift actuation logic powered by isolated 5 V, 3.3 V, and 1.8 V rails in harsh transmission environment. IC Role / Device Role / Timing Role: Detects undervoltage on any monitored rail and immediately reasserts both RESET outputs to halt torque command execution. Use Value: Enables fail-safe shutdown within microseconds of rail collapse-critical for ASIL-B functional safety compliance. | Use Scenario: Multi-core application processor (e.g., TMS470R1Vxxx) with DDR memory, GPU, and audio subsystems requiring coordinated reset. IC Role / Device Role / Timing Role: Provides single-chip supervision of 3.3 V I/O, 1.8 V core, and adjustable 1.1 V DDR termination supply-simplifies reset tree design. Use Value: Reduces system-level reset propagation delay by 40% versus cascaded discrete supervisors, improving boot time predictability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-voltage supervisor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3307-33QDRQ1 | Fixed SENSE1 threshold at 3.02 V (for 3.3 V rail), same SENSE2/SENSE3 architecture and timing. | Designed for systems where 3.3 V rail tolerance is tighter (±3% vs ±4% for TPS3307-18QDRQ1); identical pinout and footprint. | Select when 3.3 V rail stability requirement exceeds ±0.1 V deviation during transients. |
| TLV809E28DBVR | Single-channel 2.8 V supervisor with 200 ms delay; no SENSE2/SENSE3 capability; 5-pin SOT-23 package. | Only monitors one rail; lacks dual RESET outputs and automotive temperature range (−40°C to 125°C not guaranteed). | Use only for cost-sensitive single-rail applications where triple supervision is unnecessary and extended temperature is not required. |
Compared with TPS3307-18QDRQ1, TPS3307-33QDRQ1 offers tighter 3.3 V threshold accuracy but identical functionality and pin compatibility, while TLV809E28DBVR reduces integration level and temperature capability-making it unsuitable for automotive multi-rail systems requiring concurrent domain supervision.
Availability
TPS3307-18QDRQ1 is available at Aetrix Electronics and suitable for automotive engine control units, ADAS camera modules, and transmission control systems requiring stable component supply with AEC-Q100 qualification and long-term production support.
Supply support for TPS3307-18QDRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for automotive, industrial, and consumer markets.
The TPS3307-Q1 product line delivers AEC-Q100 qualified voltage supervisors optimized for safety-critical automotive electronics requiring deterministic multi-rail power sequencing and fail-safe reset generation.
FAQ
What is the minimum VDD required for TPS3307-18QDRQ1 to assert RESET?
The TPS3307-18QDRQ1 asserts RESET when VDD rises above 1.1 V. This ensures early fault detection during brown-out conditions before internal circuitry becomes fully operational. Below 1.1 V, the device remains in undetermined state and RESET is not guaranteed active. The 1.1 V threshold is specified across −40°C to 125°C and does not require external components to function.
Can TPS3307-18QDRQ1 monitor a 2.5 V supply rail?
Yes, TPS3307-18QDRQ1 can monitor a 2.5 V supply using the SENSE3 input with an external resistor divider. Since SENSE3 references the internal 1.25 V bandgap, a 2:1 divider (e.g., 100 kΩ top, 100 kΩ bottom) scales 2.5 V to 1.25 V at the pin. The device will assert RESET if the divided voltage falls below 1.25 V, corresponding to 2.5 V at the source rail.
Does TPS3307-18QDRQ1 support simultaneous assertion of both RESET outputs?
Yes, TPS3307-18QDRQ1 asserts both RESET (active-low) and RESET (active-high) outputs concurrently during any fault condition-including VDD <1.1 V, any SENSEn falling below its VIT− threshold, or MR being pulled low. The outputs are internally synchronized and maintain consistent timing relationships defined in the datasheet's truth table and timing diagrams.
What is the hysteresis value for the SENSE1 input on TPS3307-18QDRQ1?
The SENSE1 input hysteresis on TPS3307-18QDRQ1 is 3–60 mV, with typical value of 30 mV at VIT− = 2.93 V. This hysteresis prevents oscillation during slow-rising or noisy supply transitions and is inherent to the comparator design-no external components are needed to implement it.
Is TPS3307-18QDRQ1 pin-compatible with non-automotive variants like TPS3307-18DR?
Yes, TPS3307-18QDRQ1 shares identical SOIC-8 (D) package, pinout, and electrical characteristics with commercial-grade TPS3307-18DR. The Q1 suffix denotes AEC-Q100 qualification and extended temperature screening, but mechanical and functional compatibility is maintained-enabling drop-in replacement in existing designs requiring automotive qualification.
TPS3307-18QDRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 3
- Voltage - Threshold:
- 1.68V, 2.93V, Adj
- Output:
- Push-Pull, Totem Pole
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TPS3307-18QDRQ1 FAQ
1.How can I place an order for TPS3307-18QDRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS3307-18QDRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS3307-18QDRQ1 reliable?
The price and inventory of TPS3307-18QDRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS3307-18QDRQ1 is usually 5 days.
3.What payment methods are accepted for TPS3307-18QDRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS3307-18QDRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS3307-18QDRQ1?
TPS3307-18QDRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS3307-18QDRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS3307-18QDRQ1?
For technical support, including TPS3307-18QDRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS3307-18QDRQ1 requirements.
6.How does Aetrix verify that TPS3307-18QDRQ1 is sourced from the original manufacturer or authorized distributors?
All TPS3307-18QDRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS3307-18QDRQ1 meets industry standards.
7.What is the process for return or replacement of TPS3307-18QDRQ1?
All TPS3307-18QDRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with TPS3307-18QDRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS3307-18QDRQ1 part is unused and in its original packaging.
Return procedure for TPS3307-18QDRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS3307-18QDRQ1 Tags
-
MIC826SYMT-TR
Microchip Technology
-
APX803S-31SA-7
Diodes Incorporated
-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments
-
V6340RSP3B+
EM Microelectronic
-
EM6325CXSP5B-2.9+
EM Microelectronic
-
MCP120T-300I/TT
Microchip Technology
-
MCP130T-315I/TT
Microchip Technology
-
MCP120T-475I/TT
Microchip Technology
-
MCP111T-300E/TT
Microchip Technology
-
MCP120T-315I/TT
Microchip Technology
-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
