My Inquiry
My Account
Texas Instruments TPS3307-33DGN
- Part No.:
- TPS3307-33DGN
- Manufacturer:
- Texas Instruments
- Category:
- Supervisors
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
- Datasheet:
-
TPS3307-33DGN.pdf
- Description:
- IC SUPERVISOR 3 CHANNEL 8MSOP
- Quantity:
- Payment:
- Shipping:
Inventory:6,030
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS3307-33DGN from Texas Instruments is a triple-voltage supervisor IC designed for DSP, microcontroller, and microprocessor systems requiring independent monitoring of 5V, 3.3V, and adjustable supply rails. It features fixed 200ms power-on reset delay, 40µA max supply current, 2V–6V operating range, and dual active-low/active-high RESET outputs in an 8-pin HVSSOP (DGN) package. Used in industrial controls and notebook computers.
For engineers reviewing the TPS3307-33DGN datasheet, TPS3307-33DGN pinout, TPS3307-33DGN application, or TPS3307-33DGN equivalent, key selection criteria include triple-supply threshold accuracy (4.55V/2.93V/1.25V), manual reset input compatibility, temperature-compensated reference stability, and HVSSOP thermal performance in space-constrained embedded designs.
Technical Context
The TPS3307-33DGN integrates three independent voltage comparators with precision thresholds (4.55V for SENSE1, 2.93V for SENSE2, 1.25V for SENSE3), each with 30–40mV hysteresis to prevent chatter during supply transients. Its internal oscillator-driven 200ms reset timer initiates only after all sensed voltages exceed their respective VIT+ thresholds.
It employs a temperature-compensated 1.25V reference for SENSE3 adjustment and supports external resistor dividers for custom voltage monitoring >1.25V. The MR input provides asynchronous reset assertion, while dual RESET outputs enable direct interface with both active-low and active-high logic domains without external inversion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2V to 6V - supports wide-input systems including 3.3V and 5V rails without external regulation |
| SENSE1 Threshold | 4.55V (typ) - monitors nominal 5V supply with ±3% tolerance over –40°C to +85°C |
| SENSE2 Threshold | 2.93V (typ) - monitors nominal 3.3V supply with guaranteed release above 2.86V |
| Reset Delay Time | 200ms (typ) - fixed internal timer ensures reliable processor initialization without external capacitor |
| Supply Current | 40µA (max) - enables battery-backed operation in portable equipment with minimal quiescent drain |
| Operating Temperature | –40°C to +85°C - qualified for industrial and automotive under-hood environments |
| Output Types | Active-low RESET and active-high RESET - eliminates need for external inverters in mixed-logic systems |
Pinout & Package
HVSSOP-8 (DGN) package: 3mm × 3mm body, 0.65mm pitch, 1.1mm max height, exposed thermal pad for enhanced PCB heat dissipation. RoHS-compliant, NIPDAU lead finish, MSL Level-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - SENSE1 | Voltage sense input 1 | Monitors 5V rail directly; threshold = 4.55V (VIT+), hysteresis = 40mV |
| 2 - SENSE2 | Voltage sense input 2 | Monitors 3.3V rail directly; threshold = 2.93V (VIT+), hysteresis = 30mV |
| 3 - SENSE3 | Voltage sense input 3 | Adjustable input for >1.25V supplies via external resistor divider; threshold = 1.25V (VIT+) |
| 4 - GND | Ground reference | Common return for all analog and digital circuitry; must be low-impedance connection to PCB ground plane |
| 5 - RESET | Active-low reset output | Open-drain compatible; sinks up to 5mA; asserts low when any SENSEn falls below VIT– |
| 6 - RESET | Active-high reset output | Push-pull; drives high when all SENSEn > VIT+ and delay timer expires; complements RESET pin |
| 7 - MR | Manual reset input | Active-low asynchronous reset trigger; pulls both RESET outputs active when driven <0.3×VDD |
| 8 - VDD | Supply voltage input | Power source for internal circuitry; operates from 2V–6V; requires 0.1µF ceramic bypass near pin |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent voltage supervision | Simultaneously monitors 5V, 3.3V, and user-defined rail-eliminates need for three discrete supervisors |
| Fixed 200ms reset timeout | No external timing capacitor required; reduces BOM count and layout area in compact designs |
| Temperature-compensated 1.25V reference | Enables stable SENSE3 threshold across –40°C to +85°C without calibration drift |
| Dual RESET outputs (active-low + active-high) | Direct interface with legacy microcontrollers requiring active-low reset and modern SoCs needing active-high assertion |
| Low 40µA supply current | Extends battery life in portable applications and minimizes self-heating in thermally constrained enclosures |
| MR input with noise immunity | Supports ≥100ns minimum pulse width and 50ns/V input transition rate-resists EMI-induced false resets |
Applications
| Industrial Programmable Logic Controllers | Automotive Body Control Modules |
|---|---|
Use Scenario: Monitors 5V MCU core, 3.3V I/O, and 12V-derived 5V sensor supply in PLC backplane. IC Role / Device Role / Timing Role: Triple supervisor ensures synchronized reset of CPU, FPGA, and CAN transceiver upon undervoltage on any rail. Use Value: Prevents partial initialization faults by holding all subsystems in reset until all three supplies stabilize within spec. |
Use Scenario: Supervises 5V infotainment SoC, 3.3V display interface, and adjustable 2.8V camera sensor rail in BCM head unit. IC Role / Device Role / Timing Role: Provides fail-safe reset coordination across heterogeneous voltage domains during cold-crank or load-dump events. Use Value: Eliminates need for separate reset ICs per rail, reducing component count and improving board-level reliability. |
| Notebook Computer Power Sequencing | Wireless Base Station Control Card |
Use Scenario: Validates 5V system bus, 3.3V chipset, and 1.8V DDR termination supply before releasing CPU reset. IC Role / Device Role / Timing Role: Acts as centralized power-good arbiter with 200ms delay to ensure stable LDO output settling before boot. Use Value: Guarantees deterministic boot sequence without firmware intervention or external timing components. |
Use Scenario: Monitors 5V management controller, 3.3V FPGA configuration, and adjustable 2.5V RF front-end bias in remote radio head. IC Role / Device Role / Timing Role: Enables hot-swap detection and graceful shutdown via MR input tied to power-fail comparator output. Use Value: Supports field-replaceable unit (FRU) compliance by asserting reset before brownout-induced data corruption. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-supply supervisory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3307-33DR | SOIC-8 (D) package; 1.75mm height vs. DGN's 1.1mm; same electrical specs and pinout | Preferred where board assembly uses standard SOIC footprint or thermal requirements allow larger package | Select TPS3307-33DR if PCB layout lacks space constraints and existing tooling supports SOIC reflow profiles. |
| MAX6816TPA+ | Single 3.3V supervisor with manual reset; no triple-sense capability; 1.8µA quiescent current | Only suitable for single-rail monitoring; requires additional ICs to replicate TPS3307-33DGN functionality | Choose MAX6816TPA+ only when supervising one supply and ultra-low power (<2µA) is critical-no functional equivalence. |
Compared with TPS3307-33DR, the TPS3307-33DGN offers 35% lower profile and improved thermal resistance via exposed pad, making it optimal for thin-profile industrial PCs; versus MAX6816TPA+, it delivers integrated triple monitoring at the cost of higher quiescent current but eliminates design complexity and inter-IC timing skew.
Availability
TPS3307-33DGN is available at Aetrix Electronics and suitable for industrial programmable controllers, automotive body electronics, and notebook computer power sequencing requiring stable component supply and long-term manufacturing continuity.
Supply support for TPS3307-33DGN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of experience in high-reliability industrial and automotive ICs.
The TPS3307 family was engineered specifically for DSP and microprocessor-based systems needing coordinated multi-rail power-up validation, delivering deterministic reset behavior without external timing components.
FAQ
What is the exact function of the SENSE3 pin on the TPS3307-33DGN?
The SENSE3 pin on the TPS3307-33DGN is an adjustable voltage monitor input with a fixed 1.25V internal reference threshold. It allows users to supervise any supply voltage greater than 1.25V by configuring an external resistor divider. This flexibility enables monitoring of non-standard rails like 2.5V, 2.8V, or 1.8V without requiring a different part number. The TPS3307-33DGN datasheet specifies ±3% accuracy over temperature for this input.
Does the TPS3307-33DGN require an external capacitor for its reset delay?
No, the TPS3307-33DGN does not require an external capacitor for its reset delay. It incorporates an internal oscillator-based timer that guarantees a fixed 200ms (typical) delay after all monitored supplies exceed their thresholds. This eliminates capacitor placement, tolerance, aging, and temperature drift concerns-reducing design risk and board area. The TPS3307-33DGN achieves this with no external components beyond the recommended 0.1µF VDD bypass capacitor.
Can the TPS3307-33DGN monitor a 2.5V supply directly on SENSE2?
No, the TPS3307-33DGN cannot monitor a 2.5V supply directly on SENSE2. Its SENSE2 threshold is factory-trimmed to 2.93V (typ) for nominal 3.3V supervision. Applying 2.5V would keep SENSE2 below VIT+, causing continuous RESET assertion. To monitor 2.5V, use SENSE3 with an external resistor divider scaled to present 1.25V to the pin when the 2.5V rail is valid. This method is explicitly supported in the TPS3307-33DGN datasheet.
What is the maximum sink current capability of the active-low RESET pin on the TPS3307-33DGN?
The active-low RESET pin on the TPS3307-33DGN can sink up to 5mA while maintaining VOL ≤ 0.4V at VDD = 3.3V and TA = +25°C. This rating is confirmed in the Absolute Maximum Ratings table and Electrical Characteristics section of the official TPS3307-33DGN datasheet. Exceeding 5mA may cause excessive voltage drop or thermal stress. For higher-current loads, an external buffer transistor or logic gate is recommended.
Is the TPS3307-33DGN pin-compatible with other members of the TPS3307 family?
Yes, the TPS3307-33DGN is fully pin-compatible with the TPS3307-18DGN and TPS3307-25DGN in the same HVSSOP-8 (DGN) package. All share identical pin assignments, electrical interfaces, and timing behavior. The only difference is the factory-programmed SENSE1/SENSE2 thresholds: TPS3307-33DGN uses 4.55V/2.93V, while TPS3307-25DGN uses 2.93V/2.25V. This allows drop-in replacement when changing supply rail configurations without PCB redesign.
TPS3307-33DGN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Multi-Voltage Supervisor
- Number of Voltages Monitored:
- 3
- Voltage - Threshold:
- 2.93V, 4.55V, Adj
- Output:
- Push-Pull, Totem Pole
- Reset:
- Active High/Active Low
- Reset Timeout:
- 140ms Minimum
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-HVSSOP
TPS3307-33DGN FAQ
1.How can I place an order for TPS3307-33DGN through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS3307-33DGN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS3307-33DGN reliable?
The price and inventory of TPS3307-33DGN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS3307-33DGN is usually 5 days.
3.What payment methods are accepted for TPS3307-33DGN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS3307-33DGN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS3307-33DGN?
TPS3307-33DGN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS3307-33DGN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS3307-33DGN?
For technical support, including TPS3307-33DGN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS3307-33DGN requirements.
6.How does Aetrix verify that TPS3307-33DGN is sourced from the original manufacturer or authorized distributors?
All TPS3307-33DGN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS3307-33DGN meets industry standards.
7.What is the process for return or replacement of TPS3307-33DGN?
All TPS3307-33DGN units undergo pre-shipment inspection (PSI). If there is an issue with TPS3307-33DGN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS3307-33DGN part is unused and in its original packaging.
Return procedure for TPS3307-33DGN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS3307-33DGN Tags
-
MIC826SYMT-TR
Microchip Technology
-
APX803S-31SA-7
Diodes Incorporated
-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments
-
V6340RSP3B+
EM Microelectronic
-
EM6325CXSP5B-2.9+
EM Microelectronic
-
MCP120T-300I/TT
Microchip Technology
-
MCP130T-315I/TT
Microchip Technology
-
MCP120T-475I/TT
Microchip Technology
-
MCP111T-300E/TT
Microchip Technology
-
MCP120T-315I/TT
Microchip Technology
-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
