Texas Instruments TPS3420DDRYR

Overview

TPS3420DDRYR from Texas Instruments is a dual-input, ultralow-power push-button reset controller in a 1.45-mm × 1.00-mm USON-6 package. It monitors PB1 and PB2 inputs, asserts an active-low open-drain RST output only after both are held low ≥7.5 s (TS = GND), deasserts RST when either input returns high, and draws just 250 nA typical standby current at 3.3 V - enabling reliable system reset in space-constrained portable electronics.

For engineers reviewing the TPS3420DDRYR datasheet, TPS3420DDRYR pinout, TPS3420DDRYR application, or TPS3420DDRYR equivalent, this page delivers verified timing behavior (tTIMER = 7.5 s / 12.5 s, tRST not fixed), true supply range (1.6 V–6.5 V), thermal specs (–40°C to +125°C), and validated alternatives for dual-push-button reset control in battery-powered systems.

Technical Context

The TPS3420DDRYR implements dual NMOS-based threshold inputs with VIH ≥ 0.85 V and VIL ≤ 0.3 V, requiring external pullups. Its digital delay generator uses internal oscillator timing, with TS pin selection between two factory-trimmed tTIMER options (7.5 s or 12.5 s). Reset assertion is synchronous to input state, and deassertion is input-dependent - not time-fixed.

Unlike TPS3421/TPS3422, the TPS3420DDRYR has no fixed tRST; RST remains low until PB1 or PB2 transitions high. Its open-drain RST output supports wire-OR with other reset sources and operates up to 6.5 V regardless of VCC, enabling flexible voltage-domain interfacing in mixed-rail systems.

Key Specifications

Pinout & Package

TPS3420DDRYR is housed in a 6-pin 1.45-mm × 1.00-mm USON (DRY) package with wettable flanks, optimized for automated optical inspection and high-density routing.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-input push-button reset applications.

Compared with TPS3420DDRYR, TPS3421EGDRYR provides fixed reset timing but loses manual abort capability, while MAX6816EUT+T lacks configurable delay and dual-input logic - making TPS3420DDRYR uniquely suited for user-intended, input-terminated hard resets.

Availability

TPS3420DDRYR is available at Aetrix Electronics and suitable for smartphone power management, industrial HMI panels, medical wearables, and automotive infotainment systems requiring stable component supply across extended temperature and long product lifecycles.

Supply support for TPS3420DDRYR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader designing analog, embedded processing, and connectivity solutions for industrial, automotive, and consumer markets.

The TPS342x family was engineered specifically for ultralow-power, space-constrained push-button reset control - delivering precise timing, dual-input logic, and wide supply range in sub-1.5-mm² packages.

FAQ

What is the exact tTIMER value for TPS3420DDRYR when TS is grounded?

The TPS3420DDRYR has a nominal push-button timer (tTIMER) of 7.5 s when the TS pin is connected to GND. This value is factory-trimmed and specified over –40°C to +125°C with ±20% tolerance. At 25°C and 3.3 V VCC, the typical measured value is 7.5 s, as confirmed in the Electrical Characteristics table and Figure 6 of the SBVS211B datasheet. The TPS3420DDRYR does not support dynamic TS switching - the pin must remain static during operation.

Does TPS3420DDRYR provide a fixed reset pulse duration like TPS3421?

No, the TPS3420DDRYR does not generate a fixed reset pulse. Unlike TPS3421 or TPS3422, its RST output remains asserted (low) only for as long as at least one of PB1 or PB2 stays low - deasserting immediately upon either input returning high. This input-dependent behavior is intrinsic to the TPS3420DDRYR's architecture and is explicitly documented in the Pin Functions table and Functional Block Diagram.

Can TPS3420DDRYR operate from a 1.8-V supply and interface with a 5-V microcontroller reset input?

Yes, the TPS3420DDRYR supports VCC from 1.6 V to 6.5 V, so 1.8 V operation is fully within specification. Its RST output is open-drain with 6.5 V absolute maximum rating, allowing direct connection to a 5-V pullup resistor. This enables safe level translation: the TPS3420DDRYR can be powered from a low-voltage rail while driving a higher-voltage reset line - a key feature confirmed in the Electrical Characteristics section under VOL and Ilkg(OD) parameters.

What is the maximum sink current capability of the RST pin on TPS3420DDRYR?

The RST pin of the TPS3420DDRYR can sink up to 8 mA while maintaining VOL ≤ 0.4 V (at VCC ≥ 4.5 V), per the Electrical Characteristics table. At lower supply voltages (≥1.6 V), it sustains 3 mA with VOL ≤ 0.3 V. These values are tested across temperature and voltage ranges and define the upper limit for external pullup resistor selection - ensuring reliable logic-low assertion under worst-case load conditions.

Is a decoupling capacitor required for TPS3420DDRYR, and what value is recommended?

Yes, a 0.1-µF ceramic decoupling capacitor is required on the VCC pin of the TPS3420DDRYR, as explicitly stated in the Pin Functions description and Power Supply Recommendations section. It must be placed as close as possible to the VCC pin to suppress high-frequency noise and ensure stable internal oscillator operation - especially critical given the device's nanoscale timing accuracy and ultralow-current design.