Texas Instruments TPS3420DDRYT

Overview

TPS3420DDRYT from Texas Instruments is a dual-input, low-power push-button reset controller in a 1.45-mm × 1.00-mm USON-6 package. It monitors PB1 and PB2 inputs, asserts an active-low open-drain RST signal only after both are held low for ≥7.5 s (TS = GND), consumes just 250 nA typical standby current at 3.3 V, and operates across –40°C to +125°C - enabling robust system reset in space-constrained portable electronics.

For engineers reviewing the TPS3420DDRYT datasheet, TPS3420DDRYT pinout, TPS3420DDRYT application, or TPS3420DDRYT equivalent, key selection criteria include dual-push-button timing validation, fixed vs. input-dependent reset deassertion behavior, open-drain RST sink capability up to 8 mA, TS pin configuration impact on tTIMER, and compatibility with 1.6–6.5 V supply rails in battery-powered systems.

Technical Context

The TPS3420DDRYT implements a digital delay generator with two NMOS-based threshold inputs (PB1, PB2) requiring simultaneous low assertion for ≥7.5 s (TS = GND) or ≥12.5 s (TS = VCC) before RST activation. Its reset deassertion is input-dependent: RST returns high-impedance only when either PB1 or PB2 transitions high - unlike TPS3421/TPS3422 which use fixed-duration pulses.

It features a two-state logic TS pin that selects between two factory-trimmed timer options without external components, and an open-drain RST output rated for 6.5 V pullup voltage independent of VCC. The device includes internal input hysteresis and supports operation down to 1.6 V with 300 µs start-up delay after VCC rise.

Key Specifications

Pinout & Package

TPS3420DDRYT uses a 6-pin 1.45-mm × 1.00-mm USON (DRY) package with wettable flanks, optimized for automated optical inspection and high-density PCB layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar push-button reset controller applications.

Compared with TPS3420DDRYT, TPS3421EGDRYT provides guaranteed reset pulse width but loses firmware coordination capability, while TPS3422EGDRYT reduces BOM count by eliminating one external switch but forfeits dual-input safety enforcement.

Availability

TPS3420DDRYT is available at Aetrix Electronics and suitable for smartphone power sequencing, industrial HMI safety interlocks, and medical wearable wake-up circuits requiring stable component supply across extended temperature ranges and multi-year production cycles.

Supply support for TPS3420DDRYT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and personal electronics markets.

The TPS342x family was designed specifically for ultra-low-power, space-constrained push-button reset applications - prioritizing sub-µA quiescent current, sub-millimeter packaging, and configurable timing without external RC networks.

FAQ

What is the function of the TS pin on the TPS3420DDRYT?

The TS pin on the TPS3420DDRYT selects between two factory-trimmed push-button timer durations: connecting TS to GND configures tTIMER = 7.5 s (typical), while connecting TS to VCC sets tTIMER = 12.5 s (typical). This pin is sampled at power-up and when PB inputs are high; it must remain static during normal operation to avoid false resets. The TPS3420DDRYT does not support dynamic TS switching during active reset sequences.

How does reset deassertion work on the TPS3420DDRYT compared to TPS3421EGDRYT?

On the TPS3420DDRYT, RST deasserts immediately when either PB1 or PB2 transitions high - enabling firmware-controlled reset duration. In contrast, TPS3421EGDRYT deasserts RST after a fixed 400 ms pulse regardless of PB input state. This makes TPS3420DDRYT ideal for applications where system software must determine reset length, while TPS3421EGDRYT suits cases requiring strict timing bounds like FPGA configuration.

Can the TPS3420DDRYT operate from a 1.8-V supply?

Yes, the TPS3420DDRYT operates across 1.6 V to 6.5 V, making it fully compatible with 1.8-V logic rails. At 1.8 V, standby current remains below 1 µA (typical), and input thresholds scale proportionally (VIH ≥ 1.53 V, VIL ≤ 0.54 V). The RST output can still be pulled up to 3.3 V or 5 V independently, supporting mixed-voltage system interfaces without level shifters.

What is the maximum sink current supported by the TPS3420DDRYT RST pin?

The TPS3420DDRYT RST pin supports up to 8 mA sink current while maintaining VOL ≤ 0.4 V at VCC ≥ 4.5 V. At lower supply voltages, the limit scales: 5 mA at VCC ≥ 3.3 V (VOL ≤ 0.3 V), and 3 mA at VCC ≥ 1.6 V (VOL ≤ 0.3 V). This allows direct drive of standard microcontroller reset inputs with common 10-kΩ pullups, and eliminates need for external buffer transistors.

Does the TPS3420DDRYT require external passive components for basic operation?

No, the TPS3420DDRYT requires only a 0.1-µF ceramic decoupling capacitor on VCC for stable operation - no external resistors or capacitors are needed for timing, pullups, or reset pulse shaping. PB1 and PB2 have NMOS threshold inputs requiring external pullups (typically 10–100 kΩ), but these are system-level interface components, not timing elements. The core timing and reset functions are fully integrated and factory-trimmed.