Texas Instruments TPS3421EGDRYT

Overview

TPS3421EGDRYT from Texas Instruments is a dual-input, low-power push-button reset controller with fixed 400-ms active-low open-drain RST output, 7.5-s (TS = GND) or 0-s (TS = VCC) programmable input hold time, and 1.6 V to 6.5 V supply range - used in portable consumer devices to prevent spurious resets from brief button presses.

For engineers reviewing the TPS3421EGDRYT datasheet, TPS3421EGDRYT pinout, TPS3421EGDRYT application, or TPS3421EGDRYT equivalent, key selection factors include dual PB input logic, factory-programmed fixed tRST, ultra-low 250 nA standby current at 3.3 V, USON-6 package compatibility, and open-drain interface flexibility across voltage domains.

Technical Context

The TPS3421EGDRYT implements a two-stage digital timing architecture: first, a configurable push-button timer (tTIMER) requiring both PB1 and PB2 to remain low for ≥7.5 s (TS = GND) before asserting RST; second, a fixed-duration reset pulse generator (tRST = 400 ms typical) independent of input release timing. Its NMOS-based inputs require external pullups to VCC, and its open-drain RST output supports wire-OR with other reset sources.

Operation is validated across –40°C to +125°C with 1.6 V–6.5 V supply, featuring 300 µs start-up delay after VCC rise and <150 µs detection delay from valid input transition to RST assertion. The TS pin selects between two tTIMER options but must be statically tied to GND or VCC - not dynamically switched during operation.

Key Specifications

Pinout & Package

TPS3421EGDRYT is housed in a 1.45-mm × 1.00-mm, 6-pin USON (DRY) package with wettable flanks for automated optical inspection. Pin 1 (RST) is top-left in top-view orientation; pin 2 (GND) is top-center; pin 3 (PB1) is top-right; pin 4 (VCC) is bottom-right; pin 5 (TS) is bottom-center; pin 6 (PB2) is bottom-left.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar push-button reset controller applications.

Compared with TPS3420EGDRYT and MAX6369KA29+T, the TPS3421EGDRYT uniquely combines dual-input validation, factory-fixed 400-ms reset pulse, and sub-µA standby current in a 1.45-mm footprint - making it optimal for space- and battery-constrained portable systems requiring deterministic, user-confirmed reset behavior.

Availability

TPS3421EGDRYT is available at Aetrix Electronics and suitable for smartphone power management, gaming console hard reset, portable medical monitor, and industrial handheld terminal applications requiring stable component supply, long-term lifecycle support, and AEC-Q200-aligned reliability.

Supply support for TPS3421EGDRYT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions, with leadership in power management, signal chain, and real-time control ICs.

The TPS342x family was designed specifically for ultra-low-power, space-constrained portable electronics requiring robust, user-validated reset functionality - addressing demand for reliable human-interface-initiated system recovery without software intervention.

FAQ

What is the function of the TS pin on the TPS3421EGDRYT?

The TS pin on the TPS3421EGDRYT selects between two push-button timer durations: tying TS to GND configures tTIMER = 7.5 s (typical), while tying TS to VCC configures tTIMER = 0 s (factory test mode). It must be statically connected - not dynamically switched - and is sampled at power-up or when PBx inputs are high. This pin enables flexible system-level timing without changing firmware or layout.

Does the TPS3421EGDRYT require external pullup resistors on PB1 and PB2?

Yes, the TPS3421EGDRYT requires external pullup resistors on both PB1 and PB2 pins to VCC. Its inputs are NMOS-based with VIH ≥0.85×VCC and VIL ≤0.3×VCC, and no internal pullups are provided. Typical values range from 10 kΩ to 100 kΩ, selected to ensure clean logic transitions while minimizing standby current contribution.

How long does the RST output stay active on the TPS3421EGDRYT?

The RST output of the TPS3421EGDRYT remains active-low for a factory-programmed fixed duration of 400 ms (typical), with min/max of 320 ms/480 ms across temperature and voltage. This fixed pulse is independent of PB1/PB2 release timing - unlike the TPS3420 - ensuring deterministic reset window for microprocessor initialization regardless of user behavior.

Can the TPS3421EGDRYT operate from a 1.8-V supply?

Yes, the TPS3421EGDRYT operates from 1.6 V to 6.5 V, fully supporting 1.8-V systems. At 1.8 V, standby current remains ≤1 µA (–40°C to +85°C), tTIMER retains ±20% accuracy, and RST output maintains VOL ≤0.3 V at 3 mA sink - enabling direct interface with 1.8-V logic without level shifting.

Is the TPS3421EGDRYT pin-compatible with other devices in the TPS342x family?

Yes, the TPS3421EGDRYT shares identical USON-6 (DRY) package, pinout, and footprint with TPS3420EGDRYT and TPS3422EGDRYT. All three devices have RST, GND, PB1, VCC, TS, and PB2 (or TST on TPS3422) in the same physical locations - enabling drop-in replacement during design iteration or qualification, provided timing and input configuration requirements align.